Patents by Inventor Todd J. Rosedahl

Todd J. Rosedahl has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11073891
    Abstract: A distributed power management system is configured determine a node power consumption of a node during a first time interval. The system can determine a node power cap. The system can determine a proportional component power budget for a component of the node based, at least in part, on the node power consumption and a component power consumption. The system can determine a power budget for the component for a second time interval based, at least in part on the proportional component power budget.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: July 27, 2021
    Assignee: International Business Machines Corporation
    Inventors: Alan Drake, Guillermo J. Silva, Timothy G. Hallett, Heather L. Hanson, Jordan Keuseman, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Malcolm S. Allen-Ware
  • Patent number: 10599207
    Abstract: A method and apparatus for adjusting a frequency of a processor is disclosed herein. In one embodiment, the method includes inhibiting one or more processor cores from exiting an idle state. The method further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The method also includes selecting a maximum frequency for the inhibited processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The method includes setting the maximum frequency for the inhibited processor cores, and then uninhibiting the processor cores requesting exit from the idle state.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: March 24, 2020
    Assignee: International Business Machines Corporation
    Inventors: Malcolm S. Allen-Ware, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Guillermo J. Silva, Gregory S. Still, Victor Zyuban
  • Publication number: 20190272019
    Abstract: A distributed power management system is configured determine a node power consumption of a node during a first time interval. The system can determine a node power cap. The system can determine a proportional component power budget for a component of the node based, at least in part, on the node power consumption and a component power consumption. The system can determine a power budget for the component for a second time interval based, at least in part on the proportional component power budget.
    Type: Application
    Filed: May 10, 2019
    Publication date: September 5, 2019
    Inventors: Alan Drake, Guillermo J. Silva, Timothy G. Hallett, Heather L. Hanson, Jordan Keuseman, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Malcolm S. Allen-Ware
  • Patent number: 10331192
    Abstract: A distributed power management system is configured determine a node power consumption of a node during a first time interval. The system can determine a node power cap. The system can determine a proportional component power budget for a component of the node based, at least in part, on the node power consumption and a component power consumption. The system can determine a power budget for the component for a second time interval based, at least in part on the proportional component power budget.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: June 25, 2019
    Assignee: International Business Machines Corporation
    Inventors: Alan Drake, Guillermo J. Silva, Timothy G. Hallett, Heather L. Hanson, Jordan Keuseman, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Malcolm S. Allen-Ware
  • Patent number: 9952651
    Abstract: A system for adjusting a frequency of a processor is disclosed herein. The system includes a processor and a memory, where the memory includes a program configured to adjust a frequency of a multi-core processor. The operations include determining a total current and a temperature of the multi-core processor and estimating a leakage current for the multi-core processor. The operations also include calculating a switching current by subtracting the leakage current from the total current and calculating an effective switching capacitance based at least in part on the switching current. The operations also include calculating a workload activity factor by dividing the effective switching capacitance by a predetermined effective switching capacitance stored in vital product data, and enforcing a turbo frequency limit of the multi-core processor based on the workload activity factor.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: April 24, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Malcolm S. Allen-Ware, Michael S. Floyd, Joshua D. Friedrich, Charles R. Lefurgy, Kirk D. Peterson, Karthick Rajamani, Srinivasan Ramani, Todd J. Rosedahl, Gregory S. Still, Brian W. Thompto, Victor Zyuban
  • Publication number: 20180101217
    Abstract: A method and apparatus for adjusting a frequency of a processor is disclosed herein. In one embodiment, the method includes inhibiting one or more processor cores from exiting an idle state. The method further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The method also includes selecting a maximum frequency for the inhibited processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The method includes setting the maximum frequency for the inhibited processor cores, and then uninhibiting the processor cores requesting exit from the idle state.
    Type: Application
    Filed: December 7, 2017
    Publication date: April 12, 2018
    Inventors: Malcolm S. ALLEN-WARE, Charles R. LEFURGY, Karthick RAJAMANI, Todd J. ROSEDAHL, Guillermo J. SILVA, Gregory S. STILL, Victor ZYUBAN
  • Patent number: 9933836
    Abstract: A method for adjusting a frequency of a processor is disclosed herein. In one embodiment, the method includes inhibiting one or more processor cores from exiting an idle state. The method further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The method also includes selecting a maximum frequency for the inhibited and non-idle processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The method includes setting the maximum frequency for both the inhibited and the non-idle processor cores, and then uninhibiting the processor cores requesting exit from the idle state.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: April 3, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Malcolm S. Allen-Ware, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Guillermo J. Silva, Gregory S. Still, Victor Zyuban
  • Patent number: 9778726
    Abstract: A method for adjusting a frequency of a processor is disclosed herein. In one embodiment, the method includes determining a total current and a temperature of the multi-core processor and estimating a leakage current for the multi-core processor. The method also includes calculating a switching current by subtracting the leakage current from the total current. The method also includes calculating an effective switching capacitance based at least in part on the switching current. The method also includes calculating a workload activity factor by dividing the effective switching capacitance by a predetermined effective switching capacitance stored in vital product data, and enforcing a turbo frequency limit of the multi-core processor based on the workload activity factor.
    Type: Grant
    Filed: August 24, 2015
    Date of Patent: October 3, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Malcolm S. Allen-Ware, Michael S. Floyd, Joshua D. Friedrich, Charles R. Lefurgy, Kirk D. Peterson, Karthick Rajamani, Srinivasan Ramani, Todd J. Rosedahl, Gregory S. Still, Brian W. Thompto, Victor Zyuban
  • Patent number: 9746909
    Abstract: It is determined that a current node power consumption for a node is greater than a node power cap that defines a limit of power consumption for the node. Responsive to the current node power consumption being greater than the node power cap and until the current node power consumption is less than the node power cap, power reduction operations are performed. The power reduction operations comprise determining a power management zone of a plurality of power management zones having a lowest priority among the power management zones and having a power cap greater than a minimum power cap for the power management zone. The power reduction operations further comprise setting the power cap for the power management zone to a value less than a prior value assigned as the power cap for the power management zone.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: August 29, 2017
    Assignee: International Business Machines Corporation
    Inventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J Silva
  • Patent number: 9740275
    Abstract: It is determined that a current node power consumption for a node is greater than a node power cap that defines a limit of power consumption for the node. Responsive to the current node power consumption being greater than the node power cap and until the current node power consumption is less than the node power cap, power reduction operations are performed. The power reduction operations comprise determining a power management zone of a plurality of power management zones having a lowest priority among the power management zones and having a power cap greater than a minimum power cap for the power management zone. The power reduction operations further comprise setting the power cap for the power management zone to a value less than a prior value assigned as the power cap for the power management zone.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: August 22, 2017
    Assignee: International Business Machines Corporation
    Inventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J Silva
  • Patent number: 9684366
    Abstract: A zone power cap for a power management zone that defines a limit of power consumption for the power management zone is determined. The power management zone comprises a plurality of components, wherein the power management zone is associated with a controller. A set of one or more characteristics of a workload associated with the power management zone is determined. A component power cap for one or more of the plurality of components is set based, at least in part, on the set of one or more characteristics of the workload and the zone power cap.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: June 20, 2017
    Assignee: International Business Machines Corporation
    Inventors: Malcolm S. Allen-Ware, Martha A. Broyles, Timothy G. Hallett, James D. Jordan, Jordan R. Keuseman, Benjamin W. Mashak, Glenn R. Miles, Todd J. Rosedahl, Guillermo J Silva
  • Patent number: 9568982
    Abstract: A system for adjusting a frequency of a processor is disclosed herein. The system includes a processor and a memory. The memory stores program code, which, when executed on the processor, performs an operation for adjusting a frequency of a processor. The operation includes inhibiting one or more processor cores from exiting an idle state. The operation further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The operation also includes selecting a maximum frequency for the inhibited and non-idle processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The operation includes setting the maximum frequency for both the inhibited and the non-idle processor cores, and then uninhibiting the processor cores requesting exit from the idle state.
    Type: Grant
    Filed: July 31, 2015
    Date of Patent: February 14, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Malcolm S. Allen-Ware, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Guillermo J. Silva, Gregory S. Still, Victor Zyuban
  • Publication number: 20170031418
    Abstract: A method for adjusting a frequency of a processor is disclosed herein. In one embodiment, the method includes inhibiting one or more processor cores from exiting an idle state. The method further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The method also includes selecting a maximum frequency for the inhibited and non-idle processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The method includes setting the maximum frequency for both the inhibited and the non-idle processor cores, and then uninhibiting the processor cores requesting exit from the idle state.
    Type: Application
    Filed: August 24, 2015
    Publication date: February 2, 2017
    Inventors: Malcolm S. ALLEN-WARE, Charles R. LEFURGY, Karthick RAJAMANI, Todd J. ROSEDAHL, Guillermo J. SILVA, Gregory S. STILL, Victor ZYUBAN
  • Publication number: 20170031415
    Abstract: A system for adjusting a frequency of a processor is disclosed herein. The system includes a processor and a memory, where the memory includes a program configured to adjust a frequency of a multi-core processor. The operations include determining a total current and a temperature of the multi-core processor and estimating a leakage current for the multi-core processor. The operations also include calculating a switching current by subtracting the leakage current from the total current and calculating an effective switching capacitance based at least in part on the switching current. The operations also include calculating a workload activity factor by dividing the effective switching capacitance by a predetermined effective switching capacitance stored in vital product data, and enforcing a turbo frequency limit of the multi-core processor based on the workload activity factor.
    Type: Application
    Filed: July 31, 2015
    Publication date: February 2, 2017
    Inventors: Malcolm S. ALLEN-WARE, Michael S. FLOYD, Joshua D. FRIEDRICH, Charles R. LEFURGY, Kirk D. PETERSON, Karthick RAJAMANI, Srinivasan RAMANI, Todd J. ROSEDAHL, Gregory S. STILL, Brian W. THOMPTO, Victor ZYUBAN
  • Publication number: 20170031417
    Abstract: A method for adjusting a frequency of a processor is disclosed herein. In one embodiment, the method includes determining a total current and a temperature of the multi-core processor and estimating a leakage current for the multi-core processor. The method also includes calculating a switching current by subtracting the leakage current from the total current. The method also includes calculating an effective switching capacitance based at least in part on the switching current. The method also includes calculating a workload activity factor by dividing the effective switching capacitance by a predetermined effective switching capacitance stored in vital product data, and enforcing a turbo frequency limit of the multi-core processor based on the workload activity factor.
    Type: Application
    Filed: August 24, 2015
    Publication date: February 2, 2017
    Inventors: Malcolm S. ALLEN-WARE, Michael S. FLOYD, Joshua D. FRIEDRICH, Charles R. LEFURGY, Kirk D. PETERSON, Karthick RAJAMANI, Srinivasan RAMANI, Todd J. ROSEDAHL, Gregory S. STILL, Brian W. THOMPTO, Victor ZYUBAN
  • Publication number: 20170031427
    Abstract: A system for adjusting a frequency of a processor is disclosed herein. The system includes a processor and a memory. The memory stores program code, which, when executed on the processor, performs an operation for adjusting a frequency of a processor. The operation includes inhibiting one or more processor cores from exiting an idle state. The operation further includes determining a number of processor cores requesting exit from the idle state and a number of non-idle processor cores. The operation also includes selecting a maximum frequency for the inhibited and non-idle processor cores based on the number of inhibited processor cores requesting exit from the idle state and the number of non-idle processor cores. The operation includes setting the maximum frequency for both the inhibited and the non-idle processor cores, and then uninhibiting the processor cores requesting exit from the idle state.
    Type: Application
    Filed: July 31, 2015
    Publication date: February 2, 2017
    Inventors: Malcolm S. ALLEN-WARE, Charles R. LEFURGY, Karthick RAJAMANI, Todd J. ROSEDAHL, Guillermo J. SILVA, Gregory S. STILL, Victor ZYUBAN
  • Patent number: 9354943
    Abstract: According to an aspect, power management of a multi-core processing system includes determining workload characteristics in the multi-core processing system. A power adjustment scenario is identified based on the workload characteristics. A predetermined actuation order for at least two power adjustment actuators is identified based on the power adjustment scenario. Based on the predetermined actuation order, it is determined whether there is an adequate adjustment capacity for a power adjustment action associated with one of the at least two power adjustment actuators. The power adjustment action is initiated based on the predetermined actuation order and determining that the adequate adjustment capacity is available.
    Type: Grant
    Filed: March 19, 2014
    Date of Patent: May 31, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Pradip Bose, Alper Buyuktosunoglu, Michael S. Floyd, Heather L. Hanson, Hans M. Jacobson, Karthick Rajamani, Srinivasan Ramani, Todd J. Rosedahl, Augusto J. Vega
  • Publication number: 20160124486
    Abstract: A distributed power management system is configured determine a node power consumption of a node during a first time interval. The system can determine a node power cap. The system can determine a proportional component power budget for a component of the node based, at least in part, on the node power consumption and a component power consumption. The system can determine a power budget for the component for a second time interval based, at least in part on the proportional component power budget.
    Type: Application
    Filed: January 13, 2016
    Publication date: May 5, 2016
    Inventors: Alan Drake, Guillermo J. Silva, Timothy G. Hallett, Heather L. Hanson, Jordan Keuseman, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Malcolm S. Allen-Ware
  • Patent number: 9329670
    Abstract: A mechanism is provided for estimating energy/power consumption of a fixed-frequency operating mode while system is running in dynamic power management mode. For each time interval in a plurality of time intervals within a time period: a first processor identifies a modeled total nominal power value for at least one second processor during a current time interval, stores the modeled total nominal power value for the current time interval in a storage, identifies a dynamic power management mode power value for the at least one second processor in the data processing system during the current interval, and stores the dynamic power management mode power value for the current time interval in the storage. Responsive to the time period expiring, a comparison is produced of a plurality of modeled total nominal power values and a plurality of dynamic power management mode power values over the time period.
    Type: Grant
    Filed: June 5, 2012
    Date of Patent: May 3, 2016
    Assignee: International Business Machines Corporation
    Inventors: Malcolm S. Allen-Ware, Wei Huang, Fadi M. Kassem, Karthick Rajamani, Todd J. Rosedahl, Guillermo J. Silva
  • Patent number: 9298247
    Abstract: A distributed power management computer program product is configured to collect power consumption data that indicates power consumption by at least a plurality of the components of a node. The program code can be configured to provide, to each of a plurality of controllers associated with a respective one of the plurality of components, the power consumption data. The program code can be configured to determine a node power consumption. The program code can be configured to determine a power differential as a difference between the node power consumption and an upper power consumption threshold of the node. The program code can be configured to determine a proportion of the node power consumption consumed by a first component. The program code can be configured to compute a local power budget for the first component.
    Type: Grant
    Filed: November 27, 2012
    Date of Patent: March 29, 2016
    Assignee: International Business Machines Corporation
    Inventors: Alan Drake, Guillermo J. Silva, Timothy G. Hallett, Heather L. Hanson, Jordan Keuseman, Charles R. Lefurgy, Karthick Rajamani, Todd J. Rosedahl, Malcom S. Allen-Ware