Patents by Inventor Tomas Fredrik Edso

Tomas Fredrik Edso has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240062063
    Abstract: Data processing systems, methods, and storage medium for implementing convolutional processes are provided. The data processing system includes a convolution engine and a set of weight decoders including a first weight decoder and a second weight decoder that implement a first decompression function and a second decompression function respectively. A weight decoder selection module for selecting a weight decoder from the set of weight decoders is provided. The data processing system, receives a compressed set of weight values, selects a weight decoder using the weight decoder selection module, and processes the compressed set of weight values using the selected weight decoder to obtain an uncompressed set of weight values. The uncompressed set of weight values are provided to the convolution engine. A corresponding data processing system, method, and storage medium for generating the compressed set of weight values is also provided.
    Type: Application
    Filed: August 16, 2022
    Publication date: February 22, 2024
    Inventors: Tomas Fredrik EDSÖ, Rajanarayana Priyanka MARIGI
  • Publication number: 20230186045
    Abstract: A sequence of operations to process an initial input data array for the sequence of operations to generate a final output data array of the sequence of operations on a processor operable to execute neural network processing, the sequence are performed for respective blocks of the initial input data array on a block-by-block basis, and when performing an operation in the sequence whose output data is input data for another operation in the sequence, the output data is used as input data for another operation of the sequence is stored in local storage of the processor that is performing the neural network processing, and provided as input data for the another operation in the sequence from the local storage, but for the final operation in the sequence, the final output data array is stored in a main memory of the data processing system.
    Type: Application
    Filed: October 5, 2022
    Publication date: June 15, 2023
    Inventors: Dominic Hugo SYMES, Robert NORBERG, Tomas Fredrik EDSÖ, Rajanarayana Priyanka MARIGI, Douglas William TROHA
  • Patent number: 10938411
    Abstract: A method for compressing activation data of a neural network to be written to a storage is provided. The activation data is formed into a plurality of groups and a state indicator indicates whether there are any data elements within each group that have a non-zero value. A second state indicator indicates, for groups having a non-zero value, whether sub-groups within the group contain a data element having a non-zero value. A sub-group state indicator indicates, for each sub-group having a non-zero value, which data elements within that sub-group have a non-zero value. Non-zero values of data elements in the activation data are encoded and a compressed data set is formed comprising the first state indicators, any second state indicators, any sub-group state indicators and the encoded non-zero values.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: March 2, 2021
    Assignee: Arm Limited
    Inventors: Derek David Whiteman, Erik Persson, Tomas Fredrik Edsö
  • Patent number: 10931964
    Abstract: An apparatus for encoding frames of a sequence of source frames of video image data to be encoded. The apparatus includes encoding circuitry configured to encode the source frames using reference frames. The apparatus also includes monitoring circuitry configured to, when the encoding circuitry is encoding a source frame using one or more reference frames, monitor the memory bandwidth being used when using the one or more reference frames when encoding the source frame. The apparatus further includes encoding circuitry that is operable to, in response to the monitored memory bandwidth being greater than a threshold, to control the encoding circuitry to encode a subsequent part of the source frame using a modified video encoding process to restrict the memory bandwidth usage when using one or more reference frames when encoding a subsequent part of a source frame.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: February 23, 2021
    Assignee: Arm Limited
    Inventors: Dominic Hugo Symes, Sven Ola Johannes Hugosson, Tomas Fredrik Edso
  • Patent number: 10771792
    Abstract: When encoding an array of data elements, or a stream of such arrays, using an encoder comprising encoding circuitry operable to encode the array(s) of data elements as a plurality of independent segments, wherein each independent segment can be decoded independently; a header is generated for output with an encoded data stream including the plurality of independent segments wherein the header contains information indicative of the location of each of the plurality of independent segments within the encoded data stream. When an encoded data stream associated with such a header is to be decoded, a decoder may thus read the header to identify the location of the independent segment within the data stream and then read and decode the identified segments from the identified location(s) in the data stream.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: September 8, 2020
    Assignee: Arm Limited
    Inventors: Sven Ola Johannes Hugosson, Tomas Fredrik Edso, Dominic Hugo Symes
  • Patent number: 10552307
    Abstract: In a data processing system that comprises a memory 8 comprising N memory banks 11, a memory controller is configured to store one or more N data unit×N data unit arrays of data in the memory 8 such that each data unit in each row of each N×N data unit array is stored in a different memory bank of the N memory banks 11, and such that each data unit in each column of each N×N data unit array is stored in a different memory bank of the N memory banks 11.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: February 4, 2020
    Assignee: Arm Limited
    Inventors: Tomas Fredrik Edsö, Fredrik Peter Stolt
  • Publication number: 20190246117
    Abstract: When encoding an array of data elements, or a stream of such arrays, using an encoder comprising encoding circuitry operable to encode the array(s) of data elements as a plurality of independent segments, wherein each independent segment can be decoded independently; a header is generated for output with an encoded data stream including the plurality of independent segments wherein the header contains information indicative of the location of each of the plurality of independent segments within the encoded data stream. When an encoded data stream associated with such a header is to be decoded, a decoder may thus read the header to identify the location of the independent segment within the data stream and then read and decode the identified segments from the identified location(s) in the data stream.
    Type: Application
    Filed: February 4, 2019
    Publication date: August 8, 2019
    Applicant: Arm Limited
    Inventors: Sven Ola Johannes Hugosson, Tomas Fredrik Edso, Dominic Hugo Symes
  • Publication number: 20180270499
    Abstract: An apparatus for encoding frames of a sequence of source frames of video image data to be encoded. The apparatus includes encoding circuitry configured to encode the source frames using reference frames. The apparatus also includes monitoring circuitry configured to, when the encoding circuitry is encoding a source frame using one or more reference frames, monitor the memory bandwidth being used when using the one or more reference frames when encoding the source frame. The apparatus further includes encoding circuitry that is operable to, in response to the monitored memory bandwidth being greater than a threshold, to control the encoding circuitry to encode a subsequent part of the source frame using a modified video encoding process to restrict the memory bandwidth usage when using one or more reference frames when encoding a subsequent part of a source frame.
    Type: Application
    Filed: March 7, 2018
    Publication date: September 20, 2018
    Applicant: Arm Limited
    Inventors: Dominic Hugo Symes, Sven Ola Johannes Hugosson, Tomas Fredrik Edso
  • Publication number: 20170357570
    Abstract: In a data processing system that comprises a memory 8 comprising N memory banks 11, a memory controller is configured to store one or more N data unit×N data unit arrays of data in the memory 8 such that each data unit in each row of each N×N data unit array is stored in a different memory bank of the N memory banks 11, and such that each data unit in each column of each N×N data unit array is stored in a different memory bank of the N memory banks 11.
    Type: Application
    Filed: June 7, 2017
    Publication date: December 14, 2017
    Applicant: ARM Limited
    Inventors: Tomas Fredrik Edsö, Fredrik Peter Stolt