Patents by Inventor Tomoaki Shoda

Tomoaki Shoda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor integrated circuit
    Patent number: 8083404
    Abstract: A temperature detection circuit includes: a voltage generator that is connected to a first voltage line having first voltage and a second voltage line having second voltage and to output a third voltage to a third voltage line, the third voltage being obtained by transforming the first voltage to be stepped down as an ambient temperature becomes higher; and a detecting unit that includes: a delay section that is connected to the second voltage line and the third voltage line and to receive a pulse signal, the delay section being configured to output a delayed pulse signal that is obtained by delaying the pulse signal for a delay time set to be longer as the third voltage becomes lower; and a temperature detecting section that is configured to: receive the delayed pulse signal and the pulse signal; latch the delayed pulse signal based on the pulse signal; output the latched signal as a detection result.
    Type: Grant
    Filed: August 27, 2008
    Date of Patent: December 27, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tomoaki Shoda
  • SEMICONDUCTOR INTEGRATED CIRCUIT
    Publication number: 20090059999
    Abstract: A temperature detection circuit includes: a voltage generator that is connected to a first voltage line having first voltage and a second voltage line having second voltage and to output a third voltage to a third voltage line, the third voltage being obtained by transforming the first voltage to be stepped down as an ambient temperature becomes higher; and a detecting unit that includes: a delay section that is connected to the second voltage line and the third voltage line and to receive a pulse signal, the delay section being configured to output a delayed pulse signal that is obtained by delaying the pulse signal for a delay time set to be longer as the third voltage becomes lower; and a temperature detecting section that is configured to: receive the delayed pulse signal and the pulse signal; latch the delayed pulse signal based on the pulse signal; output the latched signal as a detection result.
    Type: Application
    Filed: August 27, 2008
    Publication date: March 5, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tomoaki Shoda
  • Instruction code conversion unit and information processing system and instruction code generation method
    Patent number: 6801996
    Abstract: An instruction code conversion unit, an information processing system provided with the instruction code conversion unit and an instruction code generation method for generating instruction codes which are converted by the instruction code conversion unit are described. The efficiency of coding of the program is improved by making use of an existing processor as selected is used without modification. An instruction code conversion unit performs conversion of the address of a native instruction code to the address of the corresponding compressed instruction code in a program memory by shifting the address of the native instruction code as outputted from the processor to the right by one bit.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: October 5, 2004
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Moriyasu Banno, Tomoaki Shoda, Hiroshi Itaya, Tomotaka Saito
  • Instruction code conversion unit and information processing system and instruction code generation method
    Publication number: 20010013093
    Abstract: An instruction code conversion unit, an information processing system provided with the instruction code conversion unit and an instruction code generation method for generating instruction codes which are converted by the instruction code conversion unit are described. The efficiency of coding of the program is improved by making use of an existing processor as selected is used without modification. An instruction code conversion unit performs conversion of the address of a native instruction code to the address of the corresponding compressed instruction code in a program memory by shifting the address of the native instruction code as outputted from the processor to the right by one bit.
    Type: Application
    Filed: February 7, 2001
    Publication date: August 9, 2001
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Moriyasu Banno, Tomoaki Shoda, Hiroshi Itaya, Tomotaka Saito