Abstract: A first correction voltage generation circuit provides a first positive or negative correction voltage for correcting an input voltage. A second correction voltage generation circuit provides a second correction voltage identical in polarity to the first correction voltage in accordance with the first correction voltage. The second correction voltage is generated to have a temperature coefficient reverse in polarity to a temperature coefficient of the first correction voltage.

Abstract: A first output transistor is connected between an output node connected to an output terminal and a ground terminal, and a second output transistor is connected between a power supply terminal and the output node. When disconnection of the ground terminal occurs, at least the first output transistor is turned off in response to a disconnection detection signal from a disconnection detection circuit, and a signal input to each circuit changes, causing a semiconductor device to transition to a power-off state.

Abstract: A differential amplifying unit includes a first input transistor and a second input transistor forming a differential pair, and a first tail current source and a second tail current source. An output stage includes a first output transistor and a second output transistor that can be driven by an output of the differential amplifying unit. A controller performs control such that during startup, a load is driven by the first tail current source and the first output transistor, and such that after startup, the load is driven by the first tail current source, the second tail current source, the first output transistor, and the second output transistor.

Abstract: A current mirror circuit and a current generation circuit are connected in series between a power supply node and a ground node through a first node and a second node. Gates of transistors constituting the current mirror circuit are connected to the node that supplies an off-voltage of the transistors through a first switch, and is connected to the second node through a second switch. The second node is connected to the node that supplies an on-voltage of the transistors through a third switch. Before starting of the circuit, the first switch and the third switch are turned on while the second switch is turned off. After starting of the circuit, on and off of the first to third switches are switched.

Abstract: First and second output transistors are connected in series between a power supply terminal and a ground terminal through an output node connected to an output terminal. An output transistor control circuit is arranged corresponding to at least one of the first and second output transistors and is configured to input a voltage at the output terminal to the gate of the first output transistor at a time of occurrence of disconnection of the power supply terminal and input the same to the gate of the second output transistor at a time of occurrence of disconnection of the ground terminal. The first output transistor has a conductivity type to turn off when a power supply voltage is input to the gate, and the second output transistor has a conductivity type to turn off when a ground voltage is input to the gate.

Abstract: A differential amplifier circuit generates a first current and a second current having a current difference obtained by amplifying a voltage difference between an input voltage and a reference voltage. An output stage supplies current proportional to the first current to an output node. A current conversion circuit discharges current proportional to the second current from the output node. After connecting the output node to a ground node in response to a reset signal, a latch circuit disconnects the output node from the ground node after reset cancellation. Thereafter, when voltage at the output node rises from the ground voltage in a case where a level relationship between the input voltage and the reference voltage is reversed from a reset cancellation time point, the latch circuit fixes the voltage at the output node to a power supply voltage by a positive feedback latch operation.

Abstract: A differential amplifier circuit generates a first current and a second current having a current difference obtained by amplifying a voltage difference between an input voltage and a reference voltage. An output stage supplies current proportional to the first current to an output node. A current conversion circuit discharges current proportional to the second current from the output node. After connecting the output node to a ground node in response to a reset signal, a latch circuit disconnects the output node from the ground node after reset cancellation. Thereafter, when voltage at the output node rises from the ground voltage in a case where a level relationship between the input voltage and the reference voltage is reversed from a reset cancellation time point, the latch circuit fixes the voltage at the output node to a power supply voltage by a positive feedback latch operation.

Abstract: A current mirror circuit and a current generation circuit are connected in series between a power supply node and a ground node through a first node and a second node. Gates of transistors constituting the current mirror circuit are connected to the node that supplies an off-voltage of the transistors through a first switch, and is connected to the second node through a second switch. The second node is connected to the node that supplies an on-voltage of the transistors through a third switch. Before starting of the circuit, the first switch and the third switch are turned on while the second switch is turned off. After starting of the circuit, on and off of the first to third switches are switched.

Abstract: A first correction voltage generation circuit provides a first positive or negative correction voltage for correcting an input voltage. A second correction voltage generation circuit provides a second correction voltage identical in polarity to the first correction voltage in accordance with the first correction voltage. The second correction voltage is generated to have a temperature coefficient reverse in polarity to a temperature coefficient of the first correction voltage.

Abstract: A first correction voltage generation circuit provides a first positive or negative correction voltage for correcting an input voltage. A second correction voltage generation circuit provides a second correction voltage identical in polarity to the first correction voltage in accordance with the first correction voltage. The second correction voltage is generated to have a temperature coefficient reverse in polarity to a temperature coefficient of the first correction voltage.

Abstract: First and second output transistors are connected in series between a power supply terminal and a ground terminal through an output node connected to an output terminal. An output transistor control circuit is arranged corresponding to at least one of the first and second output transistors and is configured to input a voltage at the output terminal to the gate of the first output transistor at a time of occurrence of disconnection of the power supply terminal and input the same to the gate of the second output transistor at a time of occurrence of disconnection of the ground terminal. The first output transistor has a conductivity type to turn off when a power supply voltage is input to the gate, and the second output transistor has a conductivity type to turn off when a ground voltage is input to the gate.

Abstract: An operational amplifier operates in the entire voltage range of supplied first and second voltages as an input and output range. An active load is formed with a field-effect transistor of a first conductivity type. First and second differential pairs are formed with a field-effect transistor of a second conductivity type. The first differential pair is configured such that differential amplification is possible when an input voltage is the second voltage, and the second differential pair is configured such that differential amplification is possible when the input voltage is the first voltage. A selection circuit selectively connects one of the first and second differential pairs to the active load through a differential node in accordance with the input voltage.

Abstract: A first correction voltage generation circuit provides a first positive or negative correction voltage for correcting an input voltage. A second correction voltage generation circuit provides a second correction voltage identical in polarity to the first correction voltage in accordance with the first correction voltage. The second correction voltage is generated to have a temperature coefficient reverse in polarity to a temperature coefficient of the first correction voltage.

Abstract: A differential amplifying unit includes a first input transistor and a second input transistor forming a differential pair, and a first tail current source and a second tail current source. An output stage includes a first output transistor and a second output transistor that can be driven by an output of the differential amplifying unit. A controller performs control such that during startup, a load is driven by the first tail current source and the first output transistor, and such that after startup, the load is driven by the first tail current source, the second tail current source, the first output transistor, and the second output transistor.

Abstract: Described herein are a protecting circuit and an integrated circuit capable of discharging electric current sufficient for an input voltage having a large time variation while suppressing power consumption. The protecting circuit includes: a first shunt circuit including a first shunt pathway connected to an input terminal, the first shunt circuit being configured to have a relatively low discharge capacity of the first shunt pathway and a relatively long response time; a second shunt circuit including a second shunt pathway connected to the input terminal, the second shunt circuit being configured to have a relatively high discharge capacity of the second shunt pathway and a relatively short response time; and a control circuit configured to enable the second shunt pathway to discharge based on a time variation of an input voltage at the input terminal.

Abstract: Described herein are a protecting circuit and an integrated circuit capable of discharging electric current sufficient for an input voltage having a large time variation while suppressing power consumption. The protecting circuit includes: a first shunt circuit including a first shunt pathway connected to an input terminal, the first shunt circuit being configured to have a relatively low discharge capacity of the first shunt pathway and a relatively long response time; a second shunt circuit including a second shunt pathway connected to the input terminal, the second shunt circuit being configured to have a relatively high discharge capacity of the second shunt pathway and a relatively short response time; and a control circuit configured to enable the second shunt pathway to discharge based on a time variation of an input voltage at the input terminal.

Abstract: A power on reset circuit including: a startup circuit keeping an operation signal in an operating state during a power supply rises; a bias circuit keeping the operation signal in the operating state; a BGR circuit being activated during the operating state, and outputting a fixed voltage after a predetermined time elapses; a power supply divided voltage generation circuit outputting a reference voltage; an activation detection circuit generating a control signal which becomes inactive when a power supply rises and becomes active when the fixed voltage reaches a predetermined level; a comparator circuit outputting a power on signal and detecting as the power on signal when the reference voltage is greater than the fixed voltage; and a switch turning on and fixing an output of the comparator circuit to an inactive logical value while the control signal is inactive, and turning off while the control signal is active.

Abstract: A power on reset circuit including: a startup circuit keeping an operation signal in an operating state during a power supply rises; a bias circuit keeping the operation signal in the operating state; a BGR circuit being activated during the operating state, and outputting a fixed voltage after a predetermined time elapses; a power supply divided voltage generation circuit outputting a reference voltage; an activation detection circuit generating a control signal which becomes inactive when a power supply rises and becomes active when the fixed voltage reaches a predetermined level; a comparator circuit outputting a power on signal and detecting as the power on signal when the reference voltage is greater than the fixed voltage; and a switch turning on and fixing an output of the comparator circuit to an inactive logical value while the control signal is inactive, and turning off while the control signal is active.

Abstract: A voltage generating circuit according to the present invention comprises a voltage converter which voltage-converts a reference voltage, and an output unit which impedance-converts the voltage outputted from the voltage converter. The voltage converter and the output unit each comprise a low-voltage-side power supply and a high-voltage-side power supply. A voltage level of the high-voltage-side power supply in the output unit is set to be higher than a voltage level of the high-voltage-side power supply in the voltage converter.

Abstract: (M+N) drive circuits each perform impedance conversion on an input voltage to output the resultant voltage. A selector selects M drive circuits having a predetermined output voltage accuracy from the (M+N) drive circuits, supplies M display voltages to inputs of the selected M drive circuits, and outputs, as M drive voltages, outputs of the selected M drive circuits.