Patents by Inventor Tomokazu Yokoi

Tomokazu Yokoi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8048749
    Abstract: A method for manufacturing a semiconductor device, by which a bottom gate thin film transistor that has an improved S value and a channel forming region with a smaller thickness than that of a source region and a drain region can be manufactured in a simple process. An island-like conductive film is formed over a surface of an insulating substrate in a portion corresponding to a channel forming region, and is covered with an insulating film to form a projection portion. After an amorphous semiconductor film is deposited to cover the projection portion, the amorphous semiconductor film is irradiated with laser light so as to be melted and crystallized. Part of the melted semiconductor over the projection portion flows into regions adjacent to both sides of the projection portion, which results in reduction in thickness of the semiconductor film over the projection portion (channel forming region).
    Type: Grant
    Filed: July 23, 2008
    Date of Patent: November 1, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Atsuo Isobe, Motomu Kurata, Takeshi Shichi, Daisuke Ohgarane, Takashi Shingu
  • Patent number: 8048771
    Abstract: A non-single-crystal semiconductor layer is formed over a substrate, and then a single crystal semiconductor layer is formed over part of the non-single-crystal semiconductor layer. Thus, a semiconductor element of a region which requires a large area (e.g. a pixel region in a display device) can be formed using the non-single-crystal semiconductor layer, and a semiconductor element of a region which requires high speed operation (e.g. a driver circuit region in a display device) can be formed using the single crystal semiconductor layer.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: November 1, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Yujiro Sakurada
  • Patent number: 8049215
    Abstract: A thin film transistor has a gate electrode; a gate insulating layer provided so as to cover the gate electrode layer; a pair of impurity semiconductor layers forming source and drain regions which is provided so that at least part of each of them overlaps the gate electrode layer and which are provided with a space therebetween; a microcrystalline semiconductor layer provided over the gate insulating layer in part of a channel length; a semiconductor layer provided over the gate insulating layer so as to cover at least the microcrystalline semiconductor layer; and an amorphous semiconductor layer provided between the semiconductor layer and the pair of impurity semiconductor layers. An impurity element which reduces the coordination number of silicon and generates dangling bonds is made to exist in the semiconductor layer.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: November 1, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiro Jinbo, Tomokazu Yokoi
  • Publication number: 20110217811
    Abstract: A method for manufacturing a microcrystalline semiconductor film having high crystallinity is provided. A method for manufacturing a semiconductor device which has favorable electric characteristics with high productivity is provided. After a first microcrystalline semiconductor film is formed over a substrate, treatment for flattening a surface of the first microcrystalline semiconductor film is performed. Then, treatment for removing an amorphous semiconductor region on a surface side of the flattened first microcrystalline semiconductor film is performed so that a second microcrystalline semiconductor film having high crystallinity and flatness is formed. After that, a third microcrystalline semiconductor film is formed over the second microcrystalline semiconductor film.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 8, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tetsuhiro TANAKA, Tomokazu YOKOI, Koji DAIRIKI
  • Publication number: 20110193087
    Abstract: To provide a photoelectric conversion device with improved photoelectric conversion characteristics and cost competitiveness. A photoelectric conversion device including a semiconductor junction has a semiconductor layer in which a needle-like crystal is made to grow over an impurity semiconductor layer. The impurity semiconductor layer is formed of a microcrystalline semiconductor and includes an impurity imparting one conductivity type. An amorphous semiconductor layer is deposited on a microcrystalline semiconductor layer by setting the flow rate of a dilution gas (typically silane) to 1 time to 6 times the flow rate of a semiconductor source gas (typically hydrogen) at the time of deposition. Thus, a crystal with a three-dimensional shape tapered in a direction of the deposition of a film, i.e., in a direction from the microcrystalline semiconductor layer to the amorphous semiconductor layer is made to grow.
    Type: Application
    Filed: February 9, 2011
    Publication date: August 11, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Satoshi TORIUMI, Tomokazu YOKOI, Makoto FURUNO
  • Patent number: 7989325
    Abstract: A crystalline semiconductor film is manufactured by a first step in which a crystalline semiconductor film is formed on and in contact with an insulating film and a second step in which the crystalline semiconductor film is grown in a condition where a generation frequency of nuclei is lower than in the first step. The second step is conducted in a condition where a flow ratio of a semiconductor material gas to a deposition gas is lower than in the first step. Thus, a crystalline semiconductor film whose crystal grains are large and uniform can be obtained and plasma damage to a base film of the crystalline semiconductor film can be reduced compared with a crystalline semiconductor film in a conventional method.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: August 2, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Ryota Tajima
  • Publication number: 20110097877
    Abstract: A technique for manufacturing a microcrystalline semiconductor layer with high mass productivity is provided. In a reaction chamber of a plasma CVD apparatus, an upper electrode and a lower electrode are provided in almost parallel to each other. A hollow portion is formed in the upper electrode, and the upper electrode includes a shower plate having a plurality of holes formed on a surface of the upper electrode which faces the lower electrode. A substrate is provided over the lower electrode. A gas containing a deposition gas and hydrogen is supplied to the reaction chamber from the shower plate through the hollow portion of the upper electrode, and a rare gas is supplied to the reaction chamber from a portion different from the upper electrode. Accordingly, high-frequency power is supplied to the upper electrode to generate plasma, so that a microcrystalline semiconductor layer is formed over the substrate.
    Type: Application
    Filed: October 20, 2010
    Publication date: April 28, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mitsuhiro ICHIJO, Kazutaka KURIKI, Tomokazu YOKOI, Toshiya ENDO
  • Publication number: 20110053358
    Abstract: An object of one embodiment of the present invention is to provide a technique for manufacturing a dense crystalline semiconductor film (e.g., a microcrystalline semiconductor film) without a cavity between crystal grains. A plasma region is formed between a first electrode and a second electrode by supplying high-frequency power of 60 MHz or less to the first electrode under a condition where a pressure of a reactive gas in a reaction chamber of a plasma CVD apparatus is set to 450 Pa to 13332 Pa, and a distance between the first electrode and the second electrode of the plasma CVD apparatus is set to 1 mm to 20 mm; crystalline deposition precursors are formed in a gas phase including the plasma region; a crystal nucleus of 5 nm to 15 nm is formed by depositing the deposition precursors; and a microcrystalline semiconductor film is formed by growing a crystal from the crystal nucleus.
    Type: Application
    Filed: August 20, 2010
    Publication date: March 3, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Satoshi TORIUMI, Ryota TAJIMA, Takashi OHTSUKI, Tetsuhiro TANAKA, Ryo TOKUMARU, Mitsuhiro ICHIJO, Kazutaka KURIKI, Tomokazu YOKOI, Toshiya ENDO, Shunpei YAMAZAKI
  • Patent number: 7888167
    Abstract: To provide a photoelectric conversion device with improved photoelectric conversion characteristics and cost competitiveness. A photoelectric conversion device including a semiconductor junction has a semiconductor layer in which a needle-like crystal is made to grow over an impurity semiconductor layer. The impurity semiconductor layer is formed of a microcrystalline semiconductor and includes an impurity imparting one conductivity type. An amorphous semiconductor layer is deposited on a microcrystalline semiconductor layer by setting the flow rate of a dilution gas (typically silane) to 1 time to 6 times the flow rate of a semiconductor source gas (typically hydrogen) at the time of deposition. Thus, a crystal with a three-dimensional shape tapered in a direction of the deposition of a film, i.e., in a direction from the microcrystalline semiconductor layer to the amorphous semiconductor layer is made to grow.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: February 15, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Satoshi Toriumi, Tomokazu Yokoi, Makoto Furuno
  • Publication number: 20100327281
    Abstract: An object is to provide a thin film transistor with small off current, large on current, and high field-effect mobility. A silicon nitride layer and a silicon oxide layer which is formed by oxidizing the silicon nitride layer are stacked as a gate insulating layer, and crystals grow from an interface of the silicon oxide layer of the gate insulating layer to form a microcrystalline semiconductor layer; thus, an inverted staggered thin film transistor is manufactured. Since crystals grow from the gate insulating layer, the thin film transistor can have a high crystallinity, large on current, and high field-effect mobility. In addition, a buffer layer is provided to reduce off current.
    Type: Application
    Filed: June 22, 2010
    Publication date: December 30, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Miyako NAKAJIMA, Hidekazu MIYAIRI, Toshiyuki ISA, Erika KATO, Mitsuhiro ICHIJO, Kazutaka KURIKI, Tomokazu YOKOI
  • Publication number: 20100216285
    Abstract: A crystalline semiconductor film is manufactured by a first step in which a crystalline semiconductor film is formed on and in contact with an insulating film and a second step in which the crystalline semiconductor film is grown in a condition where a generation frequency of nuclei is lower than in the first step. The second step is conducted in a condition where a flow ratio of a semiconductor material gas to a deposition gas is lower than in the first step. Thus, a crystalline semiconductor film whose crystal grains are large and uniform can be obtained and plasma damage to a base film of the crystalline semiconductor film can be reduced compared with a crystalline semiconductor film in a conventional method.
    Type: Application
    Filed: December 23, 2009
    Publication date: August 26, 2010
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tomokazu Yokoi, Ryota Tajima
  • Publication number: 20100124804
    Abstract: An object is to provide a method for manufacturing a thin film transistor having favorable electric characteristics, with high productivity. A gate electrode is formed over a substrate and a gate insulating layer is formed over the gate electrode. A first semiconductor layer is formed over the gate insulating layer by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a rare gas. Next, a second semiconductor layer including an amorphous semiconductor and a microcrystal semiconductor is formed in such a manner that the first semiconductor layer is partially grown as a seed crystal by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a gas containing nitrogen. Then, a semiconductor layer to which an impurity imparting one conductivity is added is formed and a conductive film is formed. Thus, a thin film transistor is manufactured.
    Type: Application
    Filed: November 12, 2009
    Publication date: May 20, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Erika TAKAHASHI, Takayuki KATO, Hidekazu MIYAIRI, Yasuhiro JINBO, Mitsuhiro ICHIJO, Tomokazu YOKOI
  • Publication number: 20090267066
    Abstract: To provide a photoelectric conversion device with improved photoelectric conversion characteristics and cost competitiveness. A photoelectric conversion device including a semiconductor junction has a semiconductor layer in which a needle-like crystal is made to grow over an impurity semiconductor layer. The impurity semiconductor layer is formed of a microcrystalline semiconductor and includes an impurity imparting one conductivity type. An amorphous semiconductor layer is deposited on a microcrystalline semiconductor layer by setting the flow rate of a dilution gas (typically silane) to 1 time to 6 times the flow rate of a semiconductor source gas (typically hydrogen) at the time of deposition. Thus, a crystal with a three-dimensional shape tapered in a direction of the deposition of a film, i.e., in a direction from the microcrystalline semiconductor layer to the amorphous semiconductor layer is made to grow.
    Type: Application
    Filed: April 13, 2009
    Publication date: October 29, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Satoshi TORIUMI, Tomokazu YOKOI, Makoto FURUNO
  • Publication number: 20090267067
    Abstract: A thin film transistor has a gate electrode; a gate insulating layer provided so as to cover the gate electrode layer; a pair of impurity semiconductor layers forming source and drain regions which is provided so that at least part of each of them overlaps the gate electrode layer and which are provided with a space therebetween; a microcrystalline semiconductor layer provided over the gate insulating layer in part of a channel length; a semiconductor layer provided over the gate insulating layer so as to cover at least the microcrystalline semiconductor layer; and an amorphous semiconductor layer provided between the semiconductor layer and the pair of impurity semiconductor layers. An impurity element which reduces the coordination number of silicon and generates dangling bonds is made to exist in the semiconductor layer.
    Type: Application
    Filed: April 21, 2009
    Publication date: October 29, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yasuhiro JINBO, Tomokazu YOKOI
  • Publication number: 20090134397
    Abstract: A non-single-crystal semiconductor layer is formed over a substrate, and then a single crystal semiconductor layer is formed over part of the non-single-crystal semiconductor layer. Thus, a semiconductor element of a region which requires a large area (e.g. a pixel region in a display device) can be formed using the non-single-crystal semiconductor layer, and a semiconductor element of a region which requires high speed operation (e.g. a driver circuit region in a display device) can be formed using the single crystal semiconductor layer.
    Type: Application
    Filed: November 21, 2008
    Publication date: May 28, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tomokazu YOKOI, Yujiro Sakurada
  • Publication number: 20090029514
    Abstract: A method for manufacturing a semiconductor device, by which a bottom gate thin film transistor that has an improved S value and a channel forming region with a smaller thickness than that of a source region and a drain region can be manufactured in a simple process. An island-like conductive film is formed over a surface of an insulating substrate in a portion corresponding to a channel forming region, and is covered with an insulating film to form a projection portion. After an amorphous semiconductor film is deposited to cover the projection portion, the amorphous semiconductor film is irradiated with laser light so as to be melted and crystallized. Part of the melted semiconductor over the projection portion flows into regions adjacent to both sides of the projection portion, which results in reduction in thickness of the semiconductor film over the projection portion (channel forming region).
    Type: Application
    Filed: July 23, 2008
    Publication date: January 29, 2009
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tomokazu YOKOI, Atsuo ISOBE, Motomu KURATA, Takeshi SHICHI, Daisuke OHGARANE, Takashi SHINGU
  • Publication number: 20080020528
    Abstract: An object is to provide a technique for manufacturing an insulating layer with favorable withstand voltage. Another object is to provide a technique for manufacturing a semiconductor device having an insulating layer with favorable withstand voltage. By subjecting a semiconductor layer or semiconductor substrate mainly containing silicon to a high density plasma treatment, an insulating layer is formed on a surface of the semiconductor layer or a top surface of the semiconductor substrate. At this time, the high density plasma treatment is performed by switching a supply gas in the middle of the treatment from a gas containing a rare gas, oxygen, and hydrogen, to a gas containing a rare gas and oxygen.
    Type: Application
    Filed: July 13, 2007
    Publication date: January 24, 2008
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tetsuya Kakehata, Tomokazu Yokoi