Patents by Inventor Tomoki Maruichi

Tomoki Maruichi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230104672
    Abstract: An information processing apparatus and an information processing method capable of fulfilling an image processing function expected in a selected power control mode are provided. The information processing apparatus includes a first processor, a second processor, and a power control unit that determines one power control mode from among a plurality of stages of power control modes different in rated power, and controls power consumption of the first processor and the second processor in the determined power control mode, wherein the power control unit stops an operation of the second processor in response to the determined power control mode being a low power control mode which is a power control mode with the rated power lower than predetermined rated power.
    Type: Application
    Filed: August 25, 2022
    Publication date: April 6, 2023
    Applicant: Lenovo (Singapore) Pte. Ltd.
    Inventors: Atsunobu Nakamura, Akinori Uchino, Hiroki Oda, Tomoki Maruichi
  • Patent number: 8364138
    Abstract: The invention broadly contemplates locking methods and arrangements for electronic devices, including laptop personal computing (PC) devices. The invention provides methods and arrangements for authorizing remote devices, such as cellular phones, to control the locking of electronic devices, such as laptop PCs. After receipt of a lock message from an authorized device at a guaranteed buffer, the laptop PC becomes locked such that only an authorized user may enable the functionality of the device.
    Type: Grant
    Filed: December 22, 2008
    Date of Patent: January 29, 2013
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Philip L. Childs, Michael T. Vanover, Tomoki Maruichi, Terry A. Buschbach, Adam M. Smith, Lisa L. Carter, Joseph M. Pennisi, Masahiko Shinomura
  • Publication number: 20100159911
    Abstract: The invention broadly contemplates locking methods and arrangements for electronic devices, including laptop personal computing (PC) devices. The invention provides methods and arrangements for authorizing remote devices, such as cellular phones, to control the locking of electronic devices, such as laptop PCs. After receipt of a lock message from an authorized device at a guaranteed buffer, the laptop PC becomes locked such that only an authorized user may enable the functionality of the device.
    Type: Application
    Filed: December 22, 2008
    Publication date: June 24, 2010
    Inventors: Philip L. Childs, Michael T. Vanover, Tomoki Maruichi, Terry A. Buschbach, Adam M. Smith, Lisa L. Carter, Joseph M. Pennisi, Masahiko Shinomura
  • Patent number: 7502635
    Abstract: A computer and a method for enabling remote communication to a computer operating in a power-saving mode in which one or more one power sources to internal devices are disabled. The computer is equipped with a power management control circuit which is responsive to a first signal indicating that a device used to receive remote communication is to receive power while operating in a power-saving mode. In the event that a remote communications is detected which is targeted for the computer, a second signal is asserted by the remote communications device. The power management control circuit responds by exiting the power-saving mode and restoring power to the disabled power source to enable the computer to process the incoming communication. The remote communication may be through a wireless source such as a radio frequency channel or through a fixed wire such as a telephone network or LAN.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: March 10, 2009
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Hideto Horikoshi, Mitsuhiro Yamazaki, Tomoki Maruichi, Masaki Oie, Keiji Suzuki
  • Patent number: 7325151
    Abstract: Disclosed is a program product for directing the information processing apparatus to control an execution mode of a central processing unit(CPU) provided, the CPU having a plurality of execution modes, whose types and power consumptions of executable processing are different from one another, the program product comprising: an apparatus readable medium; recovery time acquisition means for acquiring a recovery time which is a time required for the CPU to recover from a low power mode to a high power mode of which power consumption is higher than that of the low power mode; allowed time acquisition means for acquiring the longest allowed time from a request for processing unprocessable in the low power mode and processable in the high power mode to a start of the processing after the CPU recovers to the high power mode, the request being made by an input/output device; and execution mode setting means for settingthe CPU in a state of being shiftable to the low power mode if it is determined that the CPU is able
    Type: Grant
    Filed: February 17, 2005
    Date of Patent: January 29, 2008
    Assignee: Lenovo (Singapore) Pte. Ltd.
    Inventors: Tomoki Maruichi, Yuhko Ohmori, Atsuo Sugiura, Noritoshi Yoshiyama
  • Publication number: 20050210312
    Abstract: Disclosed is a program product for directing the information processing apparatus to control an execution mode of a central processing unit(CPU) provided, the CPU having a plurality of execution modes, whose types and power consumptions of executable processing are different from one another, the program product comprising: an apparatus readable medium; recovery time acquisition means for acquiring a recovery time which is a time required for the CPU to recover from a low power mode to a high power mode of which power consumption is higher than that of the low power mode; allowed time acquisition means for acquiring the longest allowed time from a request for processing unprocessable in the low power mode and processable in the high power mode to a start of the processing after the CPU recovers to the high power mode, the request being made by an input/output device; and execution mode setting means for settingthe CPU in a state of being shiftable to the low power mode if it is determined that the CPU is able
    Type: Application
    Filed: February 17, 2005
    Publication date: September 22, 2005
    Applicant: International Business Machines Corporation
    Inventors: Tomoki Maruichi, Yuhko Ohmori, Atsuo Sugiura, Noritoshi Yoshiyama
  • Patent number: 6823459
    Abstract: To provide a method whereby unauthorized data access by an RFID data processing system is prohibited without any degradation of performance being incurred. An RFID data processing system 30 comprises a CPU 35, a EEPROM 34, communication devices 31 and 32, and power controllers 40 and 41. When an RFID data processing system 30 in the power-ON state that does not have access authorization passes through a portal gate located at the entrance to an unauthorized data access protection area, the portal gate transmits a signal to set ON a tamper bit 44 in the EEPROM 34. When the tamper bit 44 has been set ON, a tamper bit interrupt request signal is output by the EEPROM 34. Upon receiving this signal, the power controllers 40 and 41 power off the RFID data processing system 30.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: November 23, 2004
    Assignee: International Business Machines Corporation
    Inventors: Hideto Horikoshi, Naoki Abe, Jun Tanaka, Tomoki Maruichi
  • Patent number: 6751741
    Abstract: A method to reduce the power dissipation of a system by omitting an unnecessary CPU throttling operation in a power management apparatus that performs the CPU throttling operation. A power management apparatus 10 is constituted by an event detecting section 12 to detect an event in a system, an activity detecting section 14 to decide whether the system is in a busy state or in an idle state by checking whether or not there is activity in the system, and a clock control section 16 to execute CPU-clock control. The control section 16 does not perform an unnecessary CPU throttling operation, by stopping the CPU throttling operation when the system is in the idle state and performing the CPU throttling operation only when the system is in the busy state. With this, the power dissipation of the system can be considerably reduced.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: June 15, 2004
    Assignee: International Business Machines Corporation
    Inventors: Kohji Kawahara, Tsuyoshi Miyamura, Tomoki Maruichi, Takashi Sugawara
  • Patent number: 5822597
    Abstract: A information processing system which enters power management mode when a predetermined time has elapsed since a last user input (or a last processing operation), adjusts the predetermined time according to the action of the operator in response to entering the power mode. If the user transfers back to normal mode quickly the predetermined reference time is increased. If the user responds only after a delay period the predetermined reference time is decreased. By so adjusting the predetermined time a better balance is achieved between energy saving and user convenience for a current level of operator attention to the computer.
    Type: Grant
    Filed: May 23, 1996
    Date of Patent: October 13, 1998
    Assignee: International Business Machines Corp.
    Inventors: Seiichi Kawano, Kohsuke Ohtani, Tomoki Maruichi, Yasunori Maezawa, Takashi Oshiyama