Patents by Inventor Tomonori Yamashita
Tomonori Yamashita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250072151Abstract: An imaging device of an embodiment has a first substrate, a second substrate, a wire, and a trench. The first substrate has a pixel having a photodiode and a floating diffusion that holds a charge converted by the photodiode. The second substrate has a pixel circuit that reads a pixel signal based on the charge held in the floating diffusion in the pixel, and is stacked on the first substrate. The wire penetrates the first substrate and the second substrate in a stacking direction, and electrically connects the floating diffusion in the first substrate to an amplification transistor in the pixel circuit of the second substrate. The trench is formed at least in the second substrate, runs in parallel with the wire, and has a depth equal to or greater than the thickness of a semiconductor layer in the second substrate.Type: ApplicationFiled: November 13, 2024Publication date: February 27, 2025Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Takeyoshi KOMOTO, Masahiko NAKAMIZO, Toshiaki ONO, Tomonori YAMASHITA
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Patent number: 12219282Abstract: Provided is an image sensor including: a pixel section configured to include a plurality of pixels arranged therein; and an AD conversion unit configured to perform analog-to-digital (AD) conversion on a pixel signal on the basis of a result of comparison between a first voltage of a signal, which is obtained by adding, via capacitances, the pixel signal of the pixel and a reference signal that linearly changes in a direction opposite to the pixel signal, with a second voltage serving as a reference.Type: GrantFiled: April 7, 2023Date of Patent: February 4, 2025Assignee: Sony Semiconductor Solutions CorporationInventors: Atsumi Niwa, Tomonori Yamashita, Takashi Moue, Yosuke Ueno
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Patent number: 12185009Abstract: Provided is an image sensor including: a pixel section configured to include a plurality of pixels arranged therein; and an AD conversion unit configured to perform analog-to-digital (AD) conversion on a pixel signal on the basis of a result of comparison between a first voltage of a signal, which is obtained by adding, via capacitances, the pixel signal of the pixel and a reference signal that linearly changes in a direction opposite to the pixel signal, with a second voltage serving as a reference.Type: GrantFiled: May 20, 2021Date of Patent: December 31, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Atsumi Niwa, Tomonori Yamashita, Takashi Moue, Yosuke Ueno
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Patent number: 12183760Abstract: An imaging device of an embodiment has a first substrate, a second substrate, a wire, and a trench. The first substrate has a pixel having a photodiode and a floating diffusion that holds a charge converted by the photodiode. The second substrate has a pixel circuit that reads a pixel signal based on the charge held in the floating diffusion in the pixel, and is stacked on the first substrate. The wire penetrates the first substrate and the second substrate in a stacking direction, and electrically connects the floating diffusion in the first substrate to an amplification transistor in the pixel circuit of the second substrate. The trench is formed at least in the second substrate, runs in parallel with the wire, and has a depth equal to or greater than the thickness of a semiconductor layer in the second substrate.Type: GrantFiled: December 28, 2023Date of Patent: December 31, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Takeyoshi Komoto, Masahiko Nakamizo, Toshiaki Ono, Tomonori Yamashita
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Patent number: 12185012Abstract: Imaging devices with increased numbers of parallel analog-digital converters with maintained chip size are disclosed. In one example, an imaging device has a stacked chip structure including semiconductor chips of first through third layers. A pixel array is formed on the semiconductor chip of the first layer. An analog circuit of an analog-digital converter is disposed on the semiconductor chip of the second or third layer. A digital circuit of the analog-digital converter is disposed on the other of the semiconductor chip of the second or third layer.Type: GrantFiled: May 19, 2021Date of Patent: December 31, 2024Assignee: Sony Semiconductor Solutions CorporationInventors: Tomonori Yamashita, Atsushi Muto
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Patent number: 12143742Abstract: Solid-state imaging elements are disclosed. In one example, a solid-state imaging element includes a plurality of pixels. A pixel signal line transmits a pixel signal of a pixel, a reference signal line transmits a reference signal to be compared with the pixel signal, a first comparator outputs a first output signal according to the pixel signal on the basis of a voltage difference between the pixel signal and the reference signal, a second comparator outputs a second output signal according to the pixel signal on the basis of the voltage difference between the pixel signal and the reference signal, a first capacitor unit between the pixel signal line or the reference signal line and the first comparator and set to a first gain, and a second capacitor unit between the pixel signal line or the reference signal line and the second comparator and set to a second gain.Type: GrantFiled: May 11, 2021Date of Patent: November 12, 2024Assignee: Sony Semiconductor Solutions CorporationInventor: Tomonori Yamashita
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Publication number: 20240373149Abstract: An imaging device according to an embodiment includes: photoelectric conversion elements (300) configured to generate a charge according to received light; a pixel circuit configured to read the charge from the photoelectric conversion element and to convert the charge into an analog type pixel signal; and a conversion circuit (20) configured to convert, based on a reference signal, the pixel signal into digital type pixel data, in which the conversion circuit includes a first circuit connected to the pixel circuit and a second circuit connected to an output of the first circuit, the photoelectric conversion elements are arranged in a matrix array and are provided on a first layer (2010a) of a first substrate, and the pixel circuit provided for each of the photoelectric conversion elements on a one-to-one basis and the first circuit are provided on a second layer (2010b) of the first substrate.Type: ApplicationFiled: October 6, 2022Publication date: November 7, 2024Inventors: Tomonori Yamashita, Yosuke Ueno, Takashi Moue, Shinichirou Etou, Youhei Oosako
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Patent number: 12129891Abstract: Provided is a sintered bearing formed mainly of an iron structure (33) and a copper structure (31) which are formed of a partially diffusion-alloyed powder (11) of an iron powder (12) and a copper powder (13). The sintered bearing includes a copper structure (31d) formed of a granular elemental copper powder (13?) having a grain diameter of 45 ?m or less, the ratio of the copper structure (31d) being 10 mass % or less. With this, a further increase in strength of the sintered bearing can be realized.Type: GrantFiled: April 29, 2021Date of Patent: October 29, 2024Assignee: NTN CORPORATIONInventors: Tomonori Yamashita, Yoshinori Ito, Daisuke Takeda, Yuta Ohashi
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Publication number: 20240348947Abstract: [Problem] An imaging device that can increase the dynamic range of pixel signals is provided. [Means of Solution] An imaging device according to an embodiment of the present disclosure includes: a plurality of pixels that are exposed during a same period; and an AD converter that digitizes an analog pixel signal output from each of the plurality of pixels. Further, each of the plurality of pixels includes a photoelectric conversion circuit that photoelectrically converts incident light, a first source follower circuit that amplifies an output signal of the photoelectric conversion circuit, a signal holding circuit that holds an output signal of the first source follower circuit, and a second source follower circuit that amplifies a signal read out from the signal holding circuit and outputs the signal as the pixel signal. Furthermore, a ramp signal including a slope portion in which a voltage level changes like a ramp is supplied to the signal holding circuit.Type: ApplicationFiled: March 24, 2022Publication date: October 17, 2024Inventors: Masako Hasegawa, Takashi Moue, Youhei Oosako, Tomonori Yamashita
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Patent number: 12066060Abstract: A sintered metal connecting rod (10) includes as an integrated body, a large end portion (11), a small end portion (12), and a stem portion (13). In the sintered metal connecting rod (10), division marks (14a, 14b) of a molding die by a compression molding are formed between the large end portion (11) and the stem portion (13) and between the small end portion (12) and the stem portion (13) on one of front and back surface (11c to 13c) in which the through-holes (11a, 12a) are formed, respectively. The large end portion (11) and the stem portion (13) have a density difference of 4% or less, and the small end portion (12) and the stem portion (13) have a density difference of 4% or less.Type: GrantFiled: February 26, 2020Date of Patent: August 20, 2024Assignee: NTN CORPORATIONInventor: Tomonori Yamashita
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Publication number: 20240204028Abstract: An imaging device of an embodiment has a first substrate, a second substrate, a wire, and a trench. The first substrate has a pixel having a photodiode and a floating diffusion that holds a charge converted by the photodiode. The second substrate has a pixel circuit that reads a pixel signal based on the charge held in the floating diffusion in the pixel, and is stacked on the first substrate. The wire penetrates the first substrate and the second substrate in a stacking direction, and electrically connects the floating diffusion in the first substrate to an amplification transistor in the pixel circuit of the second substrate. The trench is formed at least in the second substrate, runs in parallel with the wire, and has a depth equal to or greater than the thickness of a semiconductor layer in the second substrate.Type: ApplicationFiled: December 28, 2023Publication date: June 20, 2024Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Takeyoshi KOMOTO, Masahiko NAKAMIZO, Toshiaki ONO, Tomonori YAMASHITA
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Patent number: 11901391Abstract: An imaging device of an embodiment has a first substrate, a second substrate, a wire, and a trench. The first substrate has a pixel having a photodiode and a floating diffusion that holds a charge converted by the photodiode. The second substrate has a pixel circuit that reads a pixel signal based on the charge held in the floating diffusion in the pixel, and is stacked on the first substrate. The wire penetrates the first substrate and the second substrate in a stacking direction, and electrically connects the floating diffusion in the first substrate to an amplification transistor in the pixel circuit of the second substrate. The trench is formed at least in the second substrate, runs in parallel with the wire, and has a depth equal to or greater than the thickness of a semiconductor layer in the second substrate.Type: GrantFiled: June 26, 2020Date of Patent: February 13, 2024Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Takeyoshi Komoto, Masahiko Nakamizo, Toshiaki Ono, Tomonori Yamashita
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Publication number: 20230421927Abstract: To provide an image capturing device capable of suppressing a decrease of a dynamic range of the entire image capturing device caused by an input transistor of a comparator inserted between a signal line and a load current source in an analog-digital converter. The image capturing device of the present disclosure includes: a load current source; a comparator that includes an input transistor connected between a signal line that transmits a signal read from a pixel and the load current source; and a reference signal supply section that supplies a predetermined reference signal to a charge-voltage conversion section of the pixel.Type: ApplicationFiled: October 25, 2021Publication date: December 28, 2023Inventors: Takashi Moue, Yosuke Ueno, Tomonori Yamashita, Youhei Oosako, Kengo Umeda
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Patent number: 11800257Abstract: In a solid-state imaging element in which AD conversion using a reference signal is performed, power consumption of a circuit that generates the reference signal is reduced. A pixel section outputs a pixel signal based on the light amount of incident light. A reference signal supply section generates a first reference signal and a second reference signal. A comparison section includes a first differential pair transistor to which the pixel signal and a signal based on the first reference signal are inputted and a second differential pair transistor to which the second reference signal is inputted. A counter section performs counting on the basis of a signal from the comparison section.Type: GrantFiled: April 26, 2019Date of Patent: October 24, 2023Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Masahiro Segami, Tomonori Yamashita, Youhei Oosako
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Publication number: 20230247329Abstract: Provided is an image sensor including: a pixel section configured to include a plurality of pixels arranged therein; and an AD conversion unit configured to perform analog-to-digital (AD) conversion on a pixel signal on the basis of a result of comparison between a first voltage of a signal, which is obtained by adding, via capacitances, the pixel signal of the pixel and a reference signal that linearly changes in a direction opposite to the pixel signal, with a second voltage serving as a reference.Type: ApplicationFiled: April 7, 2023Publication date: August 3, 2023Applicant: Sony Semiconductor Solutions CorporationInventors: Atsumi Niwa, Tomonori Yamashita, Takashi Moue, Yosuke Ueno
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Publication number: 20230247324Abstract: Solid-state imaging elements are disclosed. In one example, a solid-state imaging element includes a plurality of pixels. A pixel signal line transmits a pixel signal of a pixel, a reference signal line transmits a reference signal to be compared with the pixel signal, a first comparator outputs a first output signal according to the pixel signal on the basis of a voltage difference between the pixel signal and the reference signal, a second comparator outputs a second output signal according to the pixel signal on the basis of the voltage difference between the pixel signal and the reference signal, a first capacitor unit between the pixel signal line or the reference signal line and the first comparator and set to a first gain, and a second capacitor unit between the pixel signal line or the reference signal line and the second comparator and set to a second gain.Type: ApplicationFiled: May 11, 2021Publication date: August 3, 2023Inventor: Tomonori Yamashita
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Publication number: 20230209227Abstract: Imaging devices with increased numbers of parallel analog-digital converters with maintained chip size are disclosed. In one example, an imaging device has a stacked chip structure including semiconductor chips of first through third layers. A pixel array is formed on the semiconductor chip of the first layer. An analog circuit of an analog-digital converter is disposed on the semiconductor chip of the second or third layer. A digital circuit of the analog-digital converter is disposed on the other of the semiconductor chip of the second or third layer.Type: ApplicationFiled: May 19, 2021Publication date: June 29, 2023Inventors: Tomonori Yamashita, Atsushi Muto
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Patent number: 11567485Abstract: A substrate processing system includes: an acquiring unit configured to acquire process data of each step when each step included in a predetermined process is executed under different control conditions; an extracting unit configured to divide each step into a first section in which the process data fluctuates and a second section in which the process data is converged, and extract first data belonging to the first section and second data belonging to the second section from the process data; and a monitoring unit configured to monitor the process data by comparing one or both of an evaluation value that evaluates the first data and an evaluation value that evaluates the second data with corresponding upper and lower limit values.Type: GrantFiled: July 2, 2020Date of Patent: January 31, 2023Assignee: TOKYO ELECTRON LIMITEDInventors: Nobutoshi Terasawa, Noriaki Koyama, Tomonori Yamashita, Takazumi Tanaka, Takehiro Kinoshita, Fumiaki Nagai, Eiji Kikama
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Publication number: 20220367555Abstract: An imaging device of an embodiment has a first substrate, a second substrate, a wire, and a trench. The first substrate has a pixel having a photodiode and a floating diffusion that holds a charge converted by the photodiode. The second substrate has a pixel circuit that reads a pixel signal based on the charge held in the floating diffusion in the pixel, and is stacked on the first substrate. The wire penetrates the first substrate and the second substrate in a stacking direction, and electrically connects the floating diffusion in the first substrate to an amplification transistor in the pixel circuit of the second substrate. The trench is formed at least in the second substrate, runs in parallel with the wire, and has a depth equal to or greater than the thickness of a semiconductor layer in the second substrate.Type: ApplicationFiled: June 26, 2020Publication date: November 17, 2022Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATIONInventors: Takeyoshi KOMOTO, Masahiko NAKAMIZO, Toshiaki ONO, Tomonori YAMASHITA
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Patent number: 11454282Abstract: A sintered bearing includes, on an inner peripheral surface, a cylindrical portion and a one-side increased-diameter portion, which are provided so as to be continuous in the axial direction. An end portion of one side in the axial direction of the cylindrical portion and an end portion of another side in the axial direction of the increased-diameter portion coincide, and the cylindrical portion and the increased-diameter portion are molded by performing sizing on a sintered compact having a tubular shape, which is introduced into a die.Type: GrantFiled: May 19, 2020Date of Patent: September 27, 2022Assignee: NTN CORPORATIONInventors: Tomonori Yamashita, Yoshinori Ito, Takashi Yamaguchi