Patents by Inventor Tomoya Kodama

Tomoya Kodama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10728566
    Abstract: According to an embodiment, a decoding device includes an acquiring unit configured to acquire first format information, encoded data, and first filter information, the first format information indicating a resolution of a color-difference component of the encoded data; a decoding unit configured to decode the encoded data to obtain a decoded image; and a converting unit configured to convert a color-difference format of the decoded image represented by a first color-difference format by using a filter identified by the filter information.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: July 28, 2020
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Chujoh, Tomoya Kodama
  • Patent number: 10649675
    Abstract: According to an embodiment, a storage controller comprises a circuitry configured to implement an address generator, a reader, and a duplication detector. The address generator is configured to generate a scan address indicating each storage area of a storage that stores therein externally written data, according to a particular scan pattern for defining an order of an address of data to be read. The reader is configured to read data from the storage area of the storage indicated by the scan address. The duplication detector is configured to detect whether the data read by the reader is a duplicate of any one of a past predetermined number of pieces of data.
    Type: Grant
    Filed: September 8, 2016
    Date of Patent: May 12, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tomoya Kodama, Takayuki Itoh, Katsuyuki Nomura
  • Publication number: 20200106420
    Abstract: Aspects of this disclosure relate to an acoustic wave device that includes a multi-layer interdigital transducer electrode. The acoustic wave device includes a piezoelectric layer and an interdigital transducer electrode on the piezoelectric layer. The interdigital transducer electrode includes a first interdigital transducer electrode layer positioned between a second interdigital transducer electrode layer and the piezoelectric layer. The second interdigital transducer electrode layer can include aluminum and having a thickness of at least 200 nanometers. The acoustic wave device can include a temperature compensation layer arranged such that the interdigital transducer electrode is positioned between the piezoelectric layer and at least a portion of the temperature compensation layer. Related filters, modules, wireless communication devices, and methods are disclosed.
    Type: Application
    Filed: September 24, 2019
    Publication date: April 2, 2020
    Inventors: Tomoya Kodama, Shinichi Hakamada, Hironori Fukuhara, Yosuke Hamaoka
  • Patent number: 10600489
    Abstract: According to one embodiment, a memory system includes memory cells capable of having data written therein at different write levels. A memory controller is configured to detect first data of the memory cells, then apply a first voltage that is lower than a voltage used for writing the data to the plurality of memory cells, detect second data of the memory cells after the first voltage has been applied, and estimate a write level for the data written to the memory cells based on a comparison of the first data and the second data.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: March 24, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tomoya Kodama, Takayuki Itoh
  • Publication number: 20190279724
    Abstract: According to one embodiment, a memory system includes a nonvolatile memory and a memory controller. The nonvolatile memory includes a first word line including a plurality of first cells and a second word line adjacent to the first word line and including a plurality of second cells. The memory controller determines a read voltage to be used with respect to the plurality of the first cells, according to a plurality of adjacent voltages representing respective threshold voltages of the plurality of the second cells. The memory controller reads data from the first word line using a plurality of determined read voltages.
    Type: Application
    Filed: August 31, 2018
    Publication date: September 12, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Takayuki ITOH, Tomoya KODAMA
  • Publication number: 20190279728
    Abstract: According to one embodiment, a memory system includes memory cells capable of having data written therein at different write levels. A memory controller is configured to detect first data of the memory cells, then apply a first voltage that is lower than a voltage used for writing the data to the plurality of memory cells, detect second data of the memory cells after the first voltage has been applied, and estimate a write level for the data written to the memory cells based on a comparison of the first data and the second data.
    Type: Application
    Filed: August 31, 2018
    Publication date: September 12, 2019
    Inventors: Tomoya KODAMA, Takayuki ITOH
  • Patent number: 10360101
    Abstract: According to one embodiment, a memory controller includes one or more processors configured to function as a writing unit and a reading unit. The writing unit writes data as threshold voltages of individual memory cells. The reading unit reads the written data by detecting threshold voltages of the individual memory cells. The reading unit includes a selecting unit, a detecting unit, and an estimating unit. The selecting unit selects a read-target memory cell. The detecting unit detects a first threshold voltage at a time of reading of the read-target memory cell, and a second threshold voltage at a time of reading of at least one of adjacent memory cells that are adjacent to the read-target memory cell. The estimating unit estimates a third threshold voltage as a threshold voltage at a time of writing in the read-target memory cell based on the first threshold voltage and the second threshold voltage.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: July 23, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Tomoya Kodama, Takayuki Itoh, Atsushi Matsumura, Takuya Matsuo
  • Patent number: 10341660
    Abstract: According to an embodiment, a video compression apparatus includes a first compressor, a second compressor, a partitioner and a communicator. The first compressor compresses a first video to generate a first bitstream. The second compressor sets regions in a second video and compresses the regions so as to enable each region to be independently decoded, to generate a second bitstream. The partitioner partitions the second bitstream according to the set regions to obtain a partitioned second bitstream. The communicator receives region information indicating a specific region that corresponds to one or more regions and selects and transmits a bitstream corresponding to the specific region from the partitioned second bitstream.
    Type: Grant
    Filed: August 26, 2015
    Date of Patent: July 2, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Akiyuki Tanizawa, Tomoya Kodama, Takeshi Chujoh, Shunichi Gondo, Wataru Asano, Takayuki Itoh
  • Publication number: 20190194502
    Abstract: Conventionally, when an adherend is nickel or the like, it has been difficult to realize an electroconductive adhesive that lowers connection resistance in various kinds of thermocurable curing resins. However, it is possible to provide an electroconductive adhesive, in the case where the adherend is nickel or the like, which reduces connection resistance in various kinds of thermocurable curing resins while simultaneously maintaining storage stability to have good handleability. The present description provides a thermocurable electroconductive adhesive including the following components (A) to (D): Component (A): a curable resin, Component (B): a thermal curing agent that cures Component (A), Component (C): an organometallic complex, and Component (D): electroconductive particles.
    Type: Application
    Filed: August 17, 2017
    Publication date: June 27, 2019
    Applicant: THREEBOND CO., LTD.
    Inventors: Soichi OTA, Hitoshi MAFUNE, Makoto KATO, Tomoya KODAMA
  • Publication number: 20190194443
    Abstract: In the (meth)acrylic resin composition of the present invention, when a sealed container is used, it is possible to achieve both storage stability in an atmosphere at 25° C. and low temperature curability in an atmosphere at 60 to 140° C., and further, properties thereof can be exhibited even in an electroconductive adhesive including electroconductive particles. The present invention is a (meth)acrylic resin composition including the following components (A) to (C): component (A): a urethane modified oligomer having a (meth)acrylic group, component (B): a monomer having a hydroxyl group and/or a carboxylic group and one (meth)acrylic group in a molecule in which a surface tension is 25 to 45 mN/m, and component (C): an organic peroxide having a specific structure.
    Type: Application
    Filed: August 24, 2017
    Publication date: June 27, 2019
    Applicant: THREEBOND CO., LTD.
    Inventors: Soichi OTA, Yusuke KUWAHARA, Hitoshi MAFUNE, Tomoya KODAMA, Makoto KATO, Masayuki OSADA
  • Patent number: 10306247
    Abstract: According to an embodiment, an image decoding apparatus includes a memory, a decoder and a first filter. The memory stores reference pixels based on pixels included in a decoded pixel block. The decoder decodes encoded data in units of pixel blocks using the reference pixels to generate a first decoded pixel block, the first decoded pixel block being adjacent to the reference pixels. The first filter performs a first filtering on only the first decoded pixel block using the first decoded pixel block and part of the reference pixels perpendicularly adjacent to the first decoded pixel block in a scan direction of image decoding processing.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: May 28, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takuya Matsuo, Takayuki Itoh, Takashi Watanabe, Atsushi Matsumura, Tomoya Kodama
  • Publication number: 20190158862
    Abstract: According to an embodiment, a decoding device includes an acquiring unit configured to acquire first format information, encoded data, and first filter information, the first format information indicating a resolution of a color-difference component of the encoded data; a decoding unit configured to decode the encoded data to obtain a decoded image; and a converting unit configured to convert a color-difference format of the decoded image represented by a first color-difference format by using a filter identified by the filter information.
    Type: Application
    Filed: January 24, 2019
    Publication date: May 23, 2019
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takeshi CHUJOH, Tomoya KODAMA
  • Publication number: 20190124343
    Abstract: According to an embodiment, an image decoding apparatus includes a memory, a decoder and a first filter. The memory stores reference pixels based on pixels included in a decoded pixel block. The decoder decodes encoded data in units of pixel blocks using the reference pixels to generate a first decoded pixel block, the first decoded pixel block being adjacent to the reference pixels. The first filter performs a first filtering on only the first decoded pixel block using the first decoded pixel block and part of the reference pixels perpendicularly adjacent to the first decoded pixel block in a scan direction of image decoding processing.
    Type: Application
    Filed: December 19, 2018
    Publication date: April 25, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takuya MATSUO, Takayuki Itoh, Takashi Watanabe, Atsushi Matsumura, Tomoya Kodama
  • Patent number: 10250898
    Abstract: According to an embodiment, a decoding device includes, an acquiring unit configured to acquire first format information, encoded data, and first filter information, the first format information indicating a resolution of a color-difference component of the encoded data; a decoding unit configured to decode the encoded data to obtain a decoded image; and a converting unit configured to convert a color-difference format of the decoded image represented by a first color-difference format by using a filter identified by the filter information.
    Type: Grant
    Filed: April 20, 2018
    Date of Patent: April 2, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Chujoh, Tomoya Kodama
  • Patent number: 10212436
    Abstract: According to an embodiment, an image encoding apparatus includes a background control information generator, a background image generator, and an image encoder. The background control information generator generates background control information based on an input image. The background control information is used for generating a first background image from at least one first image. The background image generator generates the first background image, based on the background control information and at least one first image. The image encoder encodes the input image using the first background image to generate encoded data.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: February 19, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Akiyuki Tanizawa, Takeshi Chujoh, Tomoya Kodama, Shunichi Gondo, Hiroyuki Kobayashi
  • Patent number: 10200704
    Abstract: According to an embodiment, an image decoding apparatus includes a memory, a decoder and a first filter. The memory stores reference pixels based on pixels included in a decoded pixel block. The decoder decodes encoded data in units of pixel blocks using the reference pixels to generate a first decoded pixel block, the first decoded pixel block being adjacent to the reference pixels. The first filter performs a first filtering on only the first decoded pixel block using the first decoded pixel block and part of the reference pixels perpendicularly adjacent to the first decoded pixel block in a scan direction of image decoding processing.
    Type: Grant
    Filed: February 29, 2016
    Date of Patent: February 5, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Takuya Matsuo, Takayuki Itoh, Takashi Watanabe, Atsushi Matsumura, Tomoya Kodama
  • Publication number: 20180276072
    Abstract: According to one embodiment, a memory controller includes one or more processors configured to function as a writing unit and a reading unit. The writing unit writes data as threshold voltages of individual memory cells. The reading unit reads the written data by detecting threshold voltages of the individual memory cells. The reading unit includes a selecting unit, a detecting unit, and an estimating unit. The selecting unit selects a read-target memory cell. The detecting unit detects a first threshold voltage at a time of reading of the read-target memory cell, and a second threshold voltage at a time of reading of at least one of adjacent memory cells that are adjacent to the read-target memory cell. The estimating unit estimates a third threshold voltage as a threshold voltage at a time of writing in the read-target memory cell based on the first threshold voltage and the second threshold voltage.
    Type: Application
    Filed: September 13, 2017
    Publication date: September 27, 2018
    Applicant: Toshiba Memory Corporation
    Inventors: Tomoya KODAMA, Takayuki ITOH, Atsushi MATSUMURA, Takuya MATSUO
  • Publication number: 20180267746
    Abstract: According to an embodiment, a readout control device includes a memory and one or more processors configured to function as a converter, a reader and an analyzer. The converter converts a logical address of a compressed cluster that is a readout target into a physical address in a non-volatile memory. The reader reads out, from the non-volatile memory, data included in a packing unit at a position indicated by the physical address. The analyzer analyzes header information included in the packing unit, in parallel to reading of the data included in the packing unit, and acquires position information of the compressed cluster that is the readout target in the packing unit.
    Type: Application
    Filed: August 24, 2017
    Publication date: September 20, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takayuki ITOH, Atsushi MATSUMURA, Tomoya KODAMA
  • Publication number: 20180242010
    Abstract: According to an embodiment, a decoding device includes, an acquiring unit configured to acquire first format information, encoded data, and first filter information, the first format information indicating a resolution of a color-difference component of the encoded data; a decoding unit configured to decode the encoded data to obtain a decoded image; and a converting unit configured to convert a color-difference format of the decoded image represented by a first color-difference format by using a filter identified by the filter information.
    Type: Application
    Filed: April 20, 2018
    Publication date: August 23, 2018
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Takeshi CHUJOH, Tomoya KODAMA
  • Patent number: 9998747
    Abstract: According to an embodiment, a decoding device includes an acquiring unit configured to acquire first format information, encoded data, and first filter information, the first format information indicating a resolution of a color-difference component of the encoded data; a decoding unit configured to decode the encoded data to obtain a decoded image; and a converting unit configured to convert a color-difference format of the decoded image represented by a first color-difference format by using a filter identified by the filter information.
    Type: Grant
    Filed: August 17, 2017
    Date of Patent: June 12, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Takeshi Chujoh, Tomoya Kodama