Patents by Inventor Tomoya Tanaka

Tomoya Tanaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120255508
    Abstract: A valve lifter including a cylindrical portion, a crown portion having a crown surface, a chamfered portion formed on an outer periphery of the crown portion adjacent to an outer peripheral edge of the crown surface and tapered toward the crown surface, and a hard carbon film covering only the crown surface and the chamfered portion. The chamfered portion has a taper angle with respect to an outer peripheral surface of the cylindrical portion on which the hard carbon film is not formed, the taper angle being set to not more than 26.5°. The chamfered portion has a length extending from on a side of the crown surface toward a side of the cylindrical portion in an axial direction of the cylindrical portion, the length being set to not less than 1 mm.
    Type: Application
    Filed: April 6, 2012
    Publication date: October 11, 2012
    Applicant: Hitachi Automotive Systems, Ltd.
    Inventors: Atsushi TACHIBANA, Noriomi Hosaka, Tomoya Tanaka, Tetsuo Yamazaki, Kinichi Hashimoto
  • Publication number: 20120247868
    Abstract: An object of the present invention is to provide a noise absorbing fabric in which electromagnetic waves are not susceptible to being reflected and which has superior noise absorbing ability, a noise absorbing fabric having noise absorbing ability across a wide band, a noise absorbing fabric that is soft, highly flexible, thin, and can be incorporated in intricate portions of electronic components or housings and the like by being bent or folded and the like, and a noise absorbing fabric that can be easily and stably produced without using an expensive soft magnetic material, is inexpensive and demonstrates high performance. In the noise absorbing fabric, a metal is subjected to metal processing on at least one side of a fabric, and the common logarithmic value of the surface resistivity of the surface subjected to metal processing is within the range of 0 to 4.
    Type: Application
    Filed: December 15, 2010
    Publication date: October 4, 2012
    Inventors: Kazufumi Kato, Tomoya Tanaka, Rumina Obi
  • Publication number: 20120189796
    Abstract: The present invention relates to a sheet-shaped patch including a pressure-sensitive adhesive layer on one surface of a backing to provide a pressure-sensitive adhesive surface showing adhesiveness at ordinary temperature and further including a release liner covering the pressure-sensitive adhesive surface. More specifically, the present invention relates to a sheet-shaped patch where the release liner is formed in a state of being splittable by a parting line. The patch ensures that the pressure-sensitive adhesive surface can be kept from being largely exposed due to slight stress before use and at the same time, the release liner can be easily split when using the patch.
    Type: Application
    Filed: January 25, 2012
    Publication date: July 26, 2012
    Applicant: NITTO DENKO CORPORATION
    Inventors: Kazuhiro AOYAGI, Yoshihiro IWAO, Kensuke MATSUOKA, Tomoya TANAKA
  • Publication number: 20120073534
    Abstract: A valve lifter for an internal combustion engine includes a skirt portion formed in a tubular shape; and a crown portion formed integrally with an axially one end side of the skirt portion. The crown portion includes a crown surface configured to slide in contact with an outer circumferential surface of a cam. An axis of the crown portion is eccentric from a center of the cam in a width direction of the cam. The crown surface is formed in a spherical protruding shape to have its uppermost portion at a center of the crown surface. A protruding amount of the spherical protruding shape is set to range from 11 ?m to 50 ?m.
    Type: Application
    Filed: March 31, 2011
    Publication date: March 29, 2012
    Inventors: Tomoya TANAKA, Noriomi Hosaka, Seiji Tsuruta
  • Publication number: 20110315106
    Abstract: There are provided first and second extending oil passages supplying operational oil to intake-side and exhaust-side lash adjustors, a first connection oil passage interconnecting one end portions of the oil passages, and an oil-pressure control valve selecting a first state in which the first extending oil passage does not connect to a drain oil passage or a second state in which the first extending oil passage connects to the drain oil passage. An orifice is provided in an oil passage which is located on the side of the first connection oil passage relative to a supply portion of the operational oil supplied to the lash adjustor and located on the side of the first connection oil passage relative to another supply portion of the operational oil supplied to the lash adjustor.
    Type: Application
    Filed: June 22, 2011
    Publication date: December 29, 2011
    Applicant: MAZDA MOTOR CORPORATION
    Inventors: Akihiro NODA, Tomoya TANAKA
  • Patent number: 8062970
    Abstract: The present invention is a production method for a semiconductor device equipped with a conductive film with predetermined film thickness on a sidewall of a concave portion formed in an insulating film, and comprises a step of forming the concave portion in the insulation film formed on a semiconductor substrate. Herein, the concave portion is a generic name of a via-hole and a trench. This production method comprises a step of forming a conductive film with film thickness, which is film thickness of a conductive film to be formed in the concave portion, and which is film thickness, calculated based upon the depth of the concave portion and a projected area of the sidewall of said concave portion when viewing the concave portion from the upper surface, and to be formed over the upper surface of the insulating film where the concave portion is formed. In other words, a film is formed taking the variation of configuration of these based upon a projected area of a via-hole or a trench into consideration.
    Type: Grant
    Filed: September 11, 2008
    Date of Patent: November 22, 2011
    Assignee: Panasonic Corporation
    Inventor: Tomoya Tanaka
  • Publication number: 20110170305
    Abstract: A door handle apparatus includes: a handle base (2) secured to a vehicle door (1); an operation handle (3) freely rotatably coupled to the handle base (2); and a lighting device (6) including a light emitting element (5) that emits light by being fed with power through wire harnesses (4) inserted through an inside of the operation handle (3). An irradiation opening (7) is formed on a sidewall of the operation handle (3), which is opposite to the ground in a state where the operation handle (3) is attached onto the door (1). The lighting device (6) is formed in a lens portion (9) sealing the light emitting element (5) in cooperation with sealing resin (8), and is secured to the operation handle (3) by fitting, to the irradiation opening (7), a fitting protruding portion (10) having a shape coinciding with the irradiation opening (7).
    Type: Application
    Filed: March 29, 2010
    Publication date: July 14, 2011
    Applicant: ALPHA CORPORATION
    Inventors: Tomoya Tanaka, Makoto Igeta
  • Publication number: 20100081219
    Abstract: In the method of manufacturing a semiconductor device, first, values of diffusion parameters of a semiconductor device are acquired in a middle of manufacturing the semiconductor device. Next, a target value of another diffusion parameter to be determined by a processing implemented in a subsequent process of the semiconductor device manufacturing process is calculated. The another diffusion parameter is calculated by substituting the acquired values of diffusion parameters and a desired value of an electrical characteristic of the semiconductor device into a predetermined prediction expression. The prediction expression is an expression showing a corresponding relationship between the electrical characteristic and a plurality of types of diffusion parameters of the semiconductor device. Subsequently, processing conditions for the processing implemented in the subsequent process to realize the target value is determined.
    Type: Application
    Filed: September 21, 2009
    Publication date: April 1, 2010
    Inventors: Tomoya TANAKA, Shin-ichi Imai
  • Patent number: 7632357
    Abstract: A silicon wafer cleaning method, comprising a first cleaning process, in which, after completion of mirror polishing of the surface, the silicon wafer is immersed in a non-ionic surfactant aqueous solution; a second cleaning process, in which the wafer, after completion of the first cleaning process, is immersed in a dissolved-ozone aqueous solution; and, a third cleaning process, in which the wafer, after completion of the second cleaning process, is immersed in an aqueous solution containing ammonia and hydrogen peroxide; and in which the processes are performed in succession.
    Type: Grant
    Filed: August 4, 2006
    Date of Patent: December 15, 2009
    Assignee: Sumco Corporation
    Inventors: Shigeru Okuuchi, Mitsuhiro Endou, Tomoya Tanaka
  • Publication number: 20090229985
    Abstract: A semiconductor device production method of the present invention first collects data including an initial volume of plating solution, volume of replenished solution, number of wafers processed, value of current applied and volume of waste solution in a step of filling a metal plating film in a via hole or a trench formed in an insulating film on a semiconductor substrate. Then, a cumulative charge during the plating is calculated based on the obtained current value. Also, a total volume of plating solution is calculated. Furthermore, an amount of decomposition products of suppressors contained in the plating solution based on the calculated total volume of plating solution, the volume of waste solution and the calculated cumulative charge. The semiconductor substrate is plated only when the amount of decomposition products is equal to or smaller than a predetermined threshold.
    Type: Application
    Filed: March 9, 2009
    Publication date: September 17, 2009
    Inventors: Shin-ichi IMAI, Tomoya Tanaka, Masakai Kitabata
  • Publication number: 20090081812
    Abstract: The present invention is a production method for a semiconductor device equipped with a conductive film with predetermined film thickness on a sidewall of a concave portion formed in an insulating film, and comprises a step of forming the concave portion in the insulation film formed on a semiconductor substrate. Herein, the concave portion is a generic name of a via-hole and a trench. This production method comprises a step of forming a conductive film with film thickness, which is film thickness of a conductive film to be formed in the concave portion, and which is film thickness, calculated based upon the depth of the concave portion and a projected area of the sidewall of said concave portion when viewing the concave portion from the upper surface, and to be formed over the upper surface of the insulating film where the concave portion is formed. In other words, a film is formed taking the variation of configuration of these based upon a projected area of a via-hole or a trench into consideration.
    Type: Application
    Filed: September 11, 2008
    Publication date: March 26, 2009
    Inventor: Tomoya TANAKA
  • Patent number: 7239571
    Abstract: In a memory cell array in a hierarchical bit line mode in which sub-arrays in a virtual ground line mode are arranged in a column direction, data is read out at high speed, preventing fluctuation in wiring capacity of a main bit line. In each sub-array, one of a source electrode or a drain electrode in each of the memory cells in the same column is connected to a common first bit line, and the other thereof is connected to a second bit line. The first bit lines of one half of the sub-arrays positioned in the same column are connected to the first main bit line through selection transistors and the second bit lines thereof are connected to the second main bit line through selection transistors, and the first bit lines of the other half of the sub-arrays positioned in the same column are connected to the second main bit line through selection transistors and the second bit lines thereof are connected to the first main bit line through selection transistors.
    Type: Grant
    Filed: May 31, 2005
    Date of Patent: July 3, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Tomoya Tanaka
  • Publication number: 20070034229
    Abstract: A silicon wafer cleaning method, comprising a first cleaning process, in which, after completion of mirror polishing of the surface, the silicon wafer is immersed in a non-ionic surfactant aqueous solution; a second cleaning process, in which the wafer, after completion of the first cleaning process, is immersed in a dissolved-ozone aqueous solution; and, a third cleaning process, in which the wafer, after completion of the second cleaning process, is immersed in an aqueous solution containing ammonia and hydrogen peroxide; and in which the processes are performed in succession.
    Type: Application
    Filed: August 4, 2006
    Publication date: February 15, 2007
    Inventors: Shigeru Okuuchi, Mitsuhiro Endou, Tomoya Tanaka
  • Patent number: 7037371
    Abstract: After distributing a nonmetal element in a region in the vicinity of a surface portion of a semiconductor layer, a metal film is deposited on the semiconductor layer. Next, a semiconductor-metal compound layer is epitaxially grown in the surface portion of the semiconductor layer by causing a reaction between an element included in the semiconductor layer and a metal included in the metal film through annealing carried out on the metal film.
    Type: Grant
    Filed: October 3, 2000
    Date of Patent: May 2, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shin Hashimoto, Takenobu Kishida, Kyoko Egashira, Yoshifumi Hata, Toru Nishiwaki, Tomoya Tanaka
  • Patent number: 7029254
    Abstract: There are provided a shaft adapted for introduction into a tubular member made of refractory material and an expander provided on a leading edge of the shaft. The expander has both ends provided with a repairing material container and a seat plate. With the repairing material container having monolithic refractory material loaded therein confronted to a damaged portion in an inner wall of the tubular member, the expander is expanded by a driving motor to push the repairing material container toward the damaged portion while pushing the seat plate in contact with a wall surface opposite to the damaged portion in behind. Thus, the monolithic refractory material is filled and deposited in the damaged portion under remote control.
    Type: Grant
    Filed: October 10, 2002
    Date of Patent: April 18, 2006
    Assignee: Plibrico Japan Company Ltd.
    Inventors: Keisuke Gozu, Tomoya Tanaka, Katsumi Nonaka
  • Publication number: 20050265107
    Abstract: In a memory cell array in a hierarchical bit line mode in which sub-arrays in a virtual ground line mode are arranged in a column direction, data is read out at high speed, preventing fluctuation in wiring capacity of a main bit line. In each sub-array, one of a source electrode or a drain electrode in each of the memory cells in the same column is connected to a common first bit line, and the other thereof is connected to a second bit line. The first bit lines of one half of the sub-arrays positioned in the same column are connected to the first main bit line through selection transistors and the second bit lines thereof are connected to the second main bit line through selection transistors, and the first bit lines of the other half of the sub-arrays positioned in the same column are connected to the second main bit line through selection transistors and the second bit lines thereof are connected to the first main bit line through selection transistors.
    Type: Application
    Filed: May 31, 2005
    Publication date: December 1, 2005
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Tomoya Tanaka
  • Publication number: 20050178328
    Abstract: The object of the present invention is provide a film forming method and a film forming apparatus for suppressing mixing of an organic type foreign material into a film forming chamber when forming a film, thereby reducing a defect density after a film formation. In order to achieve the object, the film forming apparatus comprises a load lock for placing a cassette for holding a wafer, a film forming chamber for forming a thin film on the wafer, and an arm for conveying the wafer from the load lock to the film forming chamber, wherein a mass spectrograph for measuring a partial pressure of an organic substance under an atmosphere in the load lock is placed in the load lock. In the film forming method, an atmosphere in the load lock in which a cassette holding the wafer is placed is firstly exhausted. In this exhaust, the exhaust is performed until a partial pressure of the organic substance under the atmosphere in the load lock reaches 7.5×10?5 mTorr or less.
    Type: Application
    Filed: February 2, 2005
    Publication date: August 18, 2005
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Hiroki Imamura, Tomoya Tanaka, Yoshinori Takamori
  • Publication number: 20030067087
    Abstract: There are provided a shaft adapted for introduction into a tubular member made of refractory material and an expander provided on a leading edge of the shaft. The expander has both ends provided with a repairing material container and a seat plate. With the repairing material container having monolithic refractory material loaded therein confronted to a damaged portion in an inner wall of the tubular member, the expander is expanded by a driving motor to push the repairing material container toward the damaged portion while pushing the seat plate in contact with a wall surface opposite to the damaged portion in behind. Thus, the monolithic refractory material is filled and deposited in the damaged portion under remote control.
    Type: Application
    Filed: October 10, 2002
    Publication date: April 10, 2003
    Applicant: Pilbrico Japan Company Ltd.
    Inventors: Keisuke Gozu, Tomoya Tanaka, Katsumi Nonaka
  • Patent number: 6355232
    Abstract: A skin protective agent which comprises as a sole ceramide component the erythro (2S, 3R) type of a ceramide and has a remarkably excellent water-barrier ability.
    Type: Grant
    Filed: June 21, 1999
    Date of Patent: March 12, 2002
    Assignee: Takasago International Corporation
    Inventors: Teruhisa Kaneko, Tomoya Tanaka, Masaaki Nagase
  • Patent number: 6024503
    Abstract: A photograph developing apparatus includes a main processing tank and a sub-tank which is connected to the main processing tank. The sub-tank is provided with a filter, a sensor, and the like in order to filter processing solution and feed the filtered processing solution back to the main processing tank. The sub-tank has a lid for covering the top of the sub-tank. The lid has an evaporation prevention block which is extended to a point below the surface of the processing solution. Cavity portions are formed in the evaporation prevention block at least at positions corresponding to the filter and the sensor. Alternatively, evaporation of the processing solution is suppressed through employment of an evaporation prevention block which floats on the surface of the processing solution. In this case as well, cavity portions are formed in the block at least at positions corresponding to the filter and the sensor.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: February 15, 2000
    Assignee: Noritsu Koki Co,. Ltd.
    Inventors: Tsukasa Nakano, Tomoya Tanaka, Takafumi Kimura, Yoshifumi Nakamura, Junichi Miyai