Patents by Inventor Tomoyuki Ishii

Tomoyuki Ishii has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11934366
    Abstract: An information processing apparatus according to an embodiment includes: a common data model management unit that manages information indicating a common data model corresponding to a plurality of modules in common; a unique data model management unit that manages information indicating a unique data model corresponding to at least one of the modules; and a common management unit that manages a version of a module corresponding to the common data model managed by the common data model management unit, a version of a module corresponding to the unique data model managed by the unique data model management unit, and a version of a module corresponding to a newly installed data model, and verifies compatibility of the versions.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: March 19, 2024
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Keiichiro Kashiwagi, Hisaharu Ishii, Koki Mitani, Kenji Umakoshi, Tomoyuki Fujino, Yui Saito
  • Publication number: 20240021439
    Abstract: A wiring board manufacturing method including a step A of forming a laser-modified portion in a glass substrate by applying laser light to the glass substrate from a first surface toward an opposite surface thereof; a step B of forming, on the first surface of the glass substrate, a first surface wiring layer including a hydrofluoric acid resistant metal film and a copper layer; a step C of etching a surface of the glass substrate opposite to the first surface to form a through via in the laser-modified portion and form a second surface of the glass substrate, the second surface being an opposite surface to the first surface; a through via treatment step D of removing an etching residue of glass adhered to the hydrofluoric acid resistant metal film; and a step E of forming a through electrode in the through via.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 18, 2024
    Applicant: TOPPAN INC.
    Inventors: Tomoyuki ISHII, Takehisa TAKADA, Yuki UMEMURA
  • Publication number: 20240014047
    Abstract: A method for manufacturing a wiring board, including a step A of forming a laser-modified portion in a glass substrate by applying laser light to the glass substrate from a first surface to an opposite surface of the glass substrate; a step B of forming a first surface wiring layer including a MIM capacitor on the first surface of the glass substrate; a step C of performing an etching process on a surface of the glass substrate opposite to the first surface to form a through via in the laser-modified portion and form a second surface of the glass substrate opposite to the first surface; and a step D of forming a through electrode in the through via and forming, on the second surface, a second surface wiring layer that is connected to the first surface wiring layer via the through electrode.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 11, 2024
    Applicant: TOPPAN INC.
    Inventors: Yuki UMEMURA, Takehisa TAKADA, Tomoyuki ISHII
  • Patent number: 10671619
    Abstract: An information processing system includes a storing unit that stores evaluation data in which a plurality of subjects are associated with a plurality of evaluation expressions respectively and evaluation expression relationship data indicating relationships between the evaluation expressions, a question generating unit that generates and outputs questions on the basis of the evaluation data and the evaluation expression relationship data, and a matching unit that outputs information relating to the subject included in the evaluation data on the basis of responses when the responses with respect to the questions are input.
    Type: Grant
    Filed: February 25, 2015
    Date of Patent: June 2, 2020
    Assignee: HITACHI, LTD.
    Inventors: Toshinori Miyoshi, Kiyoto Ito, Tomoyuki Ishii, Mineo Senda, Yoshiharu Nagashima
  • Publication number: 20200155008
    Abstract: The biological information detecting apparatus includes a face detecting section detecting the face of a person from an image signal, an expression detecting section detecting an expression of the person from the image signal of the region of the face to calculate an expression feature amount, a pulse wave detecting section detecting a pulse wave of a blood flow of the person from the image signal of the region of the face, a scoring section calculating a score of the expression of the person based on the expression feature amount, a coaching section generating an expression guide, and a display section displaying the expression guide, and the display section further displays biological information indicating a state of the autonomic nerve of the person calculated based on the pulse wave after displaying the expression guide, and the score calculated based on the expression feature amount.
    Type: Application
    Filed: October 29, 2019
    Publication date: May 21, 2020
    Inventors: Nobuhiro FUKUDA, Tomoyuki ISHII, Masayoshi ISHIBASHI
  • Publication number: 20190027060
    Abstract: A food proposing system includes a storage section storing symptom and nutrient information and food and nutrient information, a symptom receiving and processing section that receives symptoms input by a user; an required nutrient determining section that searches the symptom and nutrient information on the input symptoms and then retrieves the effect degree of each nutrient for improving the symptoms; a food candidate determining section that computes a score of each food on the basis of the effect degree of the retrieved nutrient and the content thereof in the food included by the food and nutrient information and determines the foods by an arbitrarily preset number, the foods being to be proposed to the user, based on how large computed scores are; and a food candidate indicating and processing section that indicates the determined foods.
    Type: Application
    Filed: November 17, 2015
    Publication date: January 24, 2019
    Applicant: HITACHI, LTD.
    Inventor: Tomoyuki ISHII
  • Publication number: 20180039633
    Abstract: An information processing system includes a storing unit that stores evaluation data in which a plurality of subjects are associated with a plurality of evaluation expressions respectively and evaluation expression relationship data indicating relationships between the evaluation expressions, a question generating unit that generates and outputs questions on the basis of the evaluation data and the evaluation expression relationship data, and a matching unit that outputs information relating to the subject included in the evaluation data on the basis of responses when the responses with respect to the questions are input.
    Type: Application
    Filed: February 25, 2015
    Publication date: February 8, 2018
    Applicant: HITACHI, LTD.
    Inventors: Toshinori MIYOSHI, Kiyoto ITO, Tomoyuki ISHII, Mineo SENDA, Yoshiharu NAGASHIMA
  • Patent number: 9728060
    Abstract: The present invention is a system for monitoring a health state of a subject. The system is provided with: a measuring unit that chronologically measures the position of the subject in a facility in which the subject resides or stays; and an information processing unit that determines a health state of the subject by determining whether a chronological change in the position of the subject satisfies a predetermined determination condition.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: August 8, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Tomoyuki Ishii, Tatsuo Nakagawa, Masayoshi Ishibashi, Midori Kato
  • Patent number: 9572491
    Abstract: A vital signal measurement system including a plurality of terminals aims to facilitate synchronization of each terminal with respect to other terminals. Each of the plurality of terminals (102) is provided with a first vital signal sensor (201) for measuring a vital signal, a first memory (205) for storing a first data which is based on the vital signal, and a first radio communication unit (206) for communicating with other terminals by radio. The first data is applied with a sequence number corresponding to the first data and the number indicates an order in which the first data is acquired. A first terminal (102b) included in the plurality of terminals performs resetting of the sequence number triggered by the synchronous signal which is received by the first radio communication unit.
    Type: Grant
    Filed: September 3, 2012
    Date of Patent: February 21, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Tatsuo Nakagawa, Tomoyuki Ishii, Akira Kotabe
  • Publication number: 20150356849
    Abstract: The present invention is a system for monitoring a health state of a subject. The system is provided with: a measuring unit that chronologically measures the position of the subject in a facility in which the subject resides or stays; and an information processing unit that determines a health state of the subject by determining whether a chronological change in the position of the subject satisfies a predetermined determination condition.
    Type: Application
    Filed: February 26, 2013
    Publication date: December 10, 2015
    Inventors: Tomoyuki ISHII, Tatsuo NAKAGAWA, Masayoshi ISHIBASHI, Midori KATO
  • Publication number: 20150230706
    Abstract: A vital signal measurement system including a plurality of terminals aims to facilitate synchronization of each terminal with respect to other terminals. Each of the plurality of terminals (102) is provided with a first vital signal sensor (201) for measuring a vital signal, a first memory (205) for storing a first data which is based on the vital signal, and a first radio communication unit (206) for communicating with other terminals by radio. The first data is applied with a sequence number corresponding to the first data and the number indicates an order in which the first data is acquired. A first terminal (102b) included in the plurality of terminals performs resetting of the sequence number triggered by the synchronous signal which is received by the first radio communication unit.
    Type: Application
    Filed: September 3, 2012
    Publication date: August 20, 2015
    Inventors: Tatsuo Nakagawa, Tomoyuki Ishii, Akira Kotabe
  • Publication number: 20140346515
    Abstract: Detection accuracy of a semiconductor device for detecting various kinds of substances including biological matter such as DNA is to be increased. This semiconductor device includes: a channel region CH placed on a first surface of a silicon oxide film 110; source/drain regions placed on both sides of the channel region CH; a gate electrode G placed on the first surface at a distance from the channel region CH, the gate electrode G being located to face a side surface xz1 of the channel region CH; an insulating film Z located between the channel region CH and the gate electrode G; and a pore P extending parallel to the side surface xz1 of the channel region CH, the pore P being perpendicular to the first surface. A test object such as DNA 200 is introduced into the pore P, and field changes caused by the test object in an inversion layer 10 formed in the side surface xz1 of the channel region CH is detected as changes in the current flowing between the source/drain regions.
    Type: Application
    Filed: November 19, 2012
    Publication date: November 27, 2014
    Inventors: Itaru Yanagi, Masahiko Ando, Toshiyuki Mine, Taro Osabe, Tomoyuki Ishii
  • Publication number: 20120319187
    Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
    Type: Application
    Filed: August 29, 2012
    Publication date: December 20, 2012
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Taro Osabe, Tomoyuki Ishii, Kazuo Yano, Takashi Kobayashi
  • Patent number: 8278700
    Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
    Type: Grant
    Filed: March 25, 2011
    Date of Patent: October 2, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Taro Osabe, Tomoyuki Ishii, Kazuo Yano, Takashi Kobayashi
  • Patent number: 8106449
    Abstract: To achieve a stable reading operation in a memory cell having a gain-cell structure, a write transistor is configured, which has a source and a drain that are formed on the insulating layer, a channel formed on the insulating layer and between the source and the drain and made of a semiconductor, and a gate formed on an upper portion of the insulating layer and between the source and the drain and electrically insulated from the channel by a gate insulating film and controlling the potential of the channel. The channel electrically connects the source and the drain on the side surfaces of the source and the drain.
    Type: Grant
    Filed: July 27, 2006
    Date of Patent: January 31, 2012
    Assignee: Renesas Electronics Corporation
    Inventors: Toshiaki Sano, Tomoyuki Ishii, Norifumi Kameshiro, Toshiyuki Mine
  • Publication number: 20110261405
    Abstract: The distance between an information processing terminal and each image forming apparatus is detected based on the position information of the information processing terminal and each image forming apparatus, and the difference in elevation and layout drawing are checked to determine whether or not the image forming apparatus is located in the same floor or room with the information processing terminal, whereby the image forming apparatus is selected, and a request to shift the power state to the power-on side is sent to the selected image forming apparatus. Further, the server device provides such power control as to acquire the information on the position and number of terminal devices in the started-up state and the information of the position of each image forming apparatus, and to select the image forming apparatus to be set to the power-on state out of plural image forming apparatuses, based on this information.
    Type: Application
    Filed: April 18, 2011
    Publication date: October 27, 2011
    Applicant: KONICA MINOLTA BUSINESS TECHNOLOGIES, INC.
    Inventors: Shuichi Ito, Tomoyuki Ishii, Masayuki Yusukaga, Tomohiro Iwase, Syunji Kamei
  • Publication number: 20110252336
    Abstract: A management information visualization device (management provider server 30) according to the present invention includes: an information registration management unit (information management unit 304) that registers service information transmitted from a service providing device (service provider server 20), associating the service information with user identification information and service content identification information which are related to the service information; and an information input/output unit (user GUI providing unit 303) that receives, from a user device, a request for viewing service information, creates management information (a top screen) including a service content list associated with service content identification information and transmits the management information to the user device, and, when one of the service content list displayed on the user device being selected by operation, searches in a management information DB300 and transmits corresponding service information to the user d
    Type: Application
    Filed: October 22, 2008
    Publication date: October 13, 2011
    Inventors: Tomoyuki Ishii, Keiichi Sato
  • Publication number: 20110235386
    Abstract: The invention provides a voltage applying structure having a reduced area penalty with respect to a data line. A wiring forming a global data line and a local data line formed in a p-type well region are connected via a select transistor. Two select lines are formed on a gate electrode of the select transistor. One select line is electrically connected to the gate electrode of the select transistor, however, the other select line is not connected to the select transistor. That is, an insulator film is formed between the select line and the gate electrode. As mentioned above, two select lines shorter than a gate length are provided on one select transistor. The select line is structured such as to be connected to the other select transistor.
    Type: Application
    Filed: June 6, 2011
    Publication date: September 29, 2011
    Inventors: Tomoyuki Ishii, Yoshitaka Sasago, Hideaki Kurata, Toshiyuki Mine
  • Publication number: 20110169070
    Abstract: For providing a cheap semiconductor memory device with improving reliability by level of a cell, in the place of escaping from defects on memory cells electrically, through such as ECC, and further for providing a cell structure enabling scaling-down in the vertical direction with maintaining the reliability, in a semiconductor memory device, upon which high-speeded read-out operation is required, a charge storage region is constructed with particles made from a large number of semiconductor charge storage small regions, each being independent, thereby increasing the reliability by the cell level.
    Type: Application
    Filed: March 25, 2011
    Publication date: July 14, 2011
    Applicant: RENESAS ELECTRONICS CORPORATION
    Inventors: Taro Osabe, Tomoyuki Ishii, Kazuo Yano, Takashi Kobayashi
  • Patent number: 7969760
    Abstract: The invention provides a voltage applying structure having a reduced area penalty with respect to a data line. A wiring forming a global data line and a local data line formed in a p-type well region are connected via a select transistor. Two select lines are formed on a gate electrode of the select transistor. One select line is electrically connected to the gate electrode of the select transistor, however, the other select line is not connected to the select transistor. That is, an insulator film is formed between the select line and the gate electrode. As mentioned above, two select lines shorter than a gate length are provided on one select transistor. The select line is structured such as to be connected to the other select transistor.
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: June 28, 2011
    Assignee: Renesas Electronics Corporation
    Inventors: Tomoyuki Ishii, Yoshitaka Sasago, Hideaki Kurata, Toshiyuki Mine