Patents by Inventor Tord Kvestad Oygard

Tord Kvestad Oygard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230388651
    Abstract: A method of processing data in a graphics processor when performing tile-based rendering in which a render output is sub-divided into a plurality of tiles for rendering. The rendering is performed as two separate processing passes: a first processing pass that sorts primitives into respective regions of the render output and a second processing pass that renders the tiles into which the render output is sub-divided for rendering. During the first processing pass, “tile elimination” data is generated indicative of which of the rendering tiles should be rendered during the second processing pass. The tile elimination data generated in the first processing pass can then be used to control the rendering of tiles during the second processing pass.
    Type: Application
    Filed: May 25, 2023
    Publication date: November 30, 2023
    Inventors: Daniel Fedai LARSEN, Tord Kvestad ØYGARD, Frank Klaeboe LANGTIND, Andreas Due ENGH-HALSTVEDT
  • Publication number: 20220358616
    Abstract: A method of operating a graphics processor that executes a graphics processing pipeline that includes an early culling tester that can access plural different culling test data buffers is disclosed. Information is maintained indicating which of the plural culling test data buffers is expected to be accessed, and the information is used to control the early culling tester. The information may be used to control the early culling tester such that processing delays associated with waiting for dependencies to resolve are reduced.
    Type: Application
    Filed: May 6, 2022
    Publication date: November 10, 2022
    Inventors: Toni Viki BRKIC, Sandeep KAKARLAPUDI, Tord Kvestad ØYGARD, Saurav ARJUN
  • Publication number: 20220308884
    Abstract: A data processor comprising an execution engine 51 for executing programs for execution threads and one or more caches 48, 49 operable to store data values for use when executing program instructions to perform processing operations for execution threads. The data processor further comprises a thread throttling control unit 54 configured to monitor the operation of the caches 48, 49 during execution of programs for execution threads, and to control the issuing of instructions for execution threads to the execution engine for executing a program based on the monitoring of the operation of the caches during execution of the program.
    Type: Application
    Filed: March 24, 2022
    Publication date: September 29, 2022
    Inventors: Tord Kvestad Øygard, Olof Henrik Uhrenholt, Andreas Due Engh-Halstvedt
  • Publication number: 20220276872
    Abstract: A method of operating a data processing system, such as a graphics processing system, is disclosed. A set of plural execution threads performs an iterative data processing operation in which the number of execution threads that perform a respective data processing operation decreases from one iteration to the next. The iterative data processing operation is performed such that at least one execution thread of the set plural execution threads exits the iterative data processing operation when there is at least one iteration of the iterative data processing operation remaining in respect of which the execution thread will not perform a respective data processing operation. A barrier condition may be changed in response to the execution thread exiting the iterative data processing operation.
    Type: Application
    Filed: February 22, 2022
    Publication date: September 1, 2022
    Inventors: Edward HARDY, Tord Kvestad ØYGARD
  • Patent number: 11372691
    Abstract: In a data processor that executes programs to perform data processing operations for groups of execution threads, when the threads of a thread group are all to process a same, common input data value, different portions of the common input data value are loaded into respective registers of different threads of the group of threads, such that the common input data value is stored in a distributed fashion across registers of plural different threads of the thread group. Then, when the threads of the thread group are to process a portion the common input data value, the portion is provided from the thread that stores it to all the threads in the thread group.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: June 28, 2022
    Assignee: Arm Limited
    Inventors: Tord Kvestad Oygard, Samuel Martin
  • Publication number: 20220019486
    Abstract: In a data processor that executes programs to perform data processing operations for groups of execution threads, when the threads of a thread group are all to process a same, common input data value, different portions of the common input data value are loaded into respective registers of different threads of the group of threads, such that the common input data value is stored in a distributed fashion across registers of plural different threads of the thread group. Then, when the threads of the thread group are to process a portion the common input data value, the portion is provided from the thread that stores it to all the threads in the thread group.
    Type: Application
    Filed: July 17, 2020
    Publication date: January 20, 2022
    Applicant: Arm Limited
    Inventors: Tord Kvestad Oygard, Samuel Martin