Abstract: A signal processing device includes: a first subarray that includes power amplifiers and phase shifters and that forms a first beam facing in a first direction; a second subarray that includes power amplifiers and phase shifters and that forms a second beam facing in a second direction; a feedback unit that feeds back at least signals that are output from the power amplifiers included in the first subarray; and a processor that is connected to the first subarray and the second subarray. The processor executes a process including: generating, based on a first feedback signal and a transmission signal output to the first subarray, a cancellation signal corresponding to an interference component applied to the second beam by the first beam; and adding the generated cancellation signal to a transmission signal output to the second subarray.

Abstract: A wireless communication apparatus includes: a processor that performs distortion compensation on a complex number transmission signal by using a distortion compensation coefficient; a power amplifier that amplifies the transmission signal subjected to distortion compensation by the processor; and a feedback path that feeds back a signal output from the power amplifier to supply a real number feedback signal to the processor. The processor executes a process including: estimating a complex number feedback signal by performing linear computation on the complex number transmission signal and the real number feedback signal; and updating the distortion compensation coefficient by using the estimated complex number feedback signal.

Abstract: A signal processing device includes: a first subarray that includes power amplifiers and phase shifters and that forms a first beam facing in a first direction; a second subarray that includes power amplifiers and phase shifters and that forms a second beam facing in a second direction; a feedback unit that feeds back at least signals that are output from the power amplifiers included in the first subarray; and a processor that is connected to the first subarray and the second subarray. The processor executes a process including: generating, based on a first feedback signal and a transmission signal output to the first subarray, a cancellation signal corresponding to an interference component applied to the second beam by the first beam; and adding the generated cancellation signal to a transmission signal output to the second subarray.

Abstract: A wireless communication apparatus includes: a processor that performs distortion compensation on a complex number transmission signal by using a distortion compensation coefficient; a power amplifier that amplifies the transmission signal subjected to distortion compensation by the processor; and a feedback path that feeds back a signal output from the power amplifier to supply a real number feedback signal to the processor. The processor executes a process including: estimating a complex number feedback signal by performing linear computation on the complex number transmission signal and the real number feedback signal; and updating the distortion compensation coefficient by using the estimated complex number feedback signal.

Abstract: A multiantenna communication device forms a directional beam by adding an antenna weight to respective signals of a plurality of antenna elements. The multiantenna communication device includes: a processor that executes performing distortion compensation on a transmission signal by using a distortion compensation coefficient; a plurality of power amplifiers that are provided corresponding to the antenna elements, and that amplify the transmission signal subjected to the distortion compensation by the processor; a multiplexer that multiplexes signals output from the power amplifiers to feed back; and an analog/digital (A/D) converter that A/D converts a multiplex feedback signal that is obtained by the multiplexer, wherein the processor executes updating the distortion compensation coefficient by using the multiplex feedback signal A/D converted by the A/D converter and the transmission signal.

Abstract: A multiantenna communication device forms a directional beam by adding an antenna weight to respective signals of a plurality of antenna elements. The multiantenna communication device includes: a processor that executes performing distortion compensation on a transmission signal by using a distortion compensation coefficient; a plurality of power amplifiers that are provided corresponding to the antenna elements, and that amplify the transmission signal subjected to the distortion compensation by the processor; a multiplexer that multiplexes signals output from the power amplifiers to feed back; and an analog/digital (A/D) converter that A/D converts a multiplex feedback signal that is obtained by the multiplexer, wherein the processor executes updating the distortion compensation coefficient by using the multiplex feedback signal A/D converted by the A/D converter and the transmission signal.

Abstract: A passive intermodulation (PIM) canceller of a communication device includes a combining unit, a replica generating unit, and a delay measuring instrument. The replica generating unit generates an intermodulation signal based on the amount of delay of each transmission signal. The combining unit cancels out the intermodulation signal from the reception signal using the generated intermodulation signal. The delay measuring instrument delays a transmission signal x2 included in a plurality of transmission signals by different first amounts of delay. The delay measuring instrument generates an intermediate signal Sm1 by multiplying the delayed transmission signal x2 to the reception signal. The delay measuring instrument calculates, based on the correlation values of the intermediate signal Sm1 corresponding to each first amount of delay and a transmission signal x1 included in the plurality of transmission signals, the amount of delay of the transmission signal x1 with respect to the intermodulation signal.

Abstract: A distortion cancel device includes: a first acquiring unit that acquires a plurality of transmission signals including at least two transmission signals that are wirelessly transmitted at an identical frequency; a second acquiring unit that acquires a reception signal to which an intermodulation signal generated due to the transmission signals is attached; and a processor that executes a process including: determining a ratio of the transmission signals acquired by the first acquiring unit and wirelessly transmitted at the identical frequency; generating a ratio signal for each frequency from the transmission signals in accordance with the determined ratio; generating a cancel signal corresponding to the intermodulation signal by using an arithmetic expression that uses the generated ratio signal; and combining the generated cancel signal with the reception signal acquired by the second acquiring unit.

Abstract: A distortion cancellation device includes a first acquiring unit that acquires a plurality of transmission signals that are wirelessly transmitted at different frequencies; a second acquiring unit that acquires a reception signal to which an intermodulation signal generated due to the plurality of the transmission signals is added; and a processor that executes a process including acquiring a gain difference between the plurality of the transmission signals generated when the plurality of the transmission signals acquired by the first acquiring unit is sent to a generation source of the intermodulation signal, generating, by an arithmetic expression using both the acquired gain difference and the plurality of the transmission signals, a cancellation signal associated with the intermodulation signal, and combining the generated cancellation signal with the reception signal acquired by the second acquiring unit.

Abstract: A delay measuring instrument includes a generating unit and a calculating unit. The generating unit is, for example, a multiplier. The calculating unit is, for example, a maximum value detecting unit. The generating unit generates an intermediate signal by multiplying one of transmission signals or the complex conjugate of the one of the transmission signals included in the plurality of transmission signals that are transmitted at different frequencies by a reception signal that includes therein an intermodulation signal generated by the plurality of the transmission signals. The calculating unit calculates, based on a correlation value between the intermediate signal and the other one of the transmission signals included in the plurality of the transmission signals, an amount of delay of the other one of the transmission signals with respect to the intermodulation signal.

Abstract: A communication device includes a sending unit that sends a plurality of signals that are to be wirelessly sent with different frequencies; an acquiring unit that acquires a reception signal to which an intermodulation signal that is produced due to intermodulation of the plurality of signals is added; and a processor that is connected to the sending unit and the acquiring unit. The processor generates, on the basis of the plurality of signals sent by the sending unit, a cancellation signal corresponding to the intermodulation signal and combines the generated cancellation signal with the reception signal acquired by the acquiring unit.

Abstract: An amplifying apparatus, including an amplitude-phase conversion unit to separate an input signal into first and second signals, wherein a phase difference between the first and second signals depends on an amplitude of the input signal, a first amplifying unit, a first matching circuit including a main line and a first harmonic processing circuit, wherein a length of the line of the first harmonic processing circuit short-circuits a harmonic, a second amplifying unit, a second matching circuit including a main line and a second harmonic processing circuit, wherein a length of the line of the second harmonic processing circuit short-circuits a harmonic, and an output synthesis unit to synthesize outputs from the first and second matching circuits, wherein a distance from the first amplifying unit to the first harmonic processing circuit differs from a distance from the second amplifying unit to the second harmonic processing circuit.

Abstract: An amplifier includes: an amplifying device configured to amplify an input signal; and a matching circuit coupled to the amplifying device, and including an impedance transformer and a parallel resonance circuit coupled to a wiring which spans from the impedance transformer to the amplifying device, wherein a circuit length of the impedance transformer is longer than one-fourth of wavelength of an electronic wave having a frequency which is substantially equal to a resonance frequency of the parallel resonance circuit.

Abstract: An amplifier includes a signal processing circuit configured to generate an orthogonal signal orthogonal to an input signal; a first D/A converter configured to convert the orthogonal signal into a first analog signal; a second D/A converter configured to convert the input signal into a second analog signal; and an analog computing circuit configured to generate a constant envelope signal based on the first analog signal from the first D/A converter and the second analog signal from the second D/A converter.

Abstract: An amplifying apparatus includes a decomposer, two amplifiers, a combiner, and a controller. The decomposer decomposes an input signal into two signals having different phases. The two amplifiers amplify the decomposed two signals, respectively. The combiner combines output of the amplifiers. The controller controls at least one of waveform information of at least one of the two signals and an operating state of the two amplifiers such that an output characteristic of the combiner matches a desired characteristic.

Abstract: An amplifying apparatus, including an amplitude-phase conversion unit to separate an input signal into first and second signals, wherein a phase difference between the first and second signals depends on an amplitude of the input signal, a first amplifying unit, a first matching circuit including a main line and a first harmonic processing circuit, wherein a length of the line of the first harmonic processing circuit short-circuits a harmonic, a second amplifying unit, a second matching circuit including a main line and a second harmonic processing circuit, wherein a length of the line of the second harmonic processing circuit short-circuits a harmonic, and an output synthesis unit to synthesize outputs from the first and second matching circuits, wherein a distance from the first amplifying unit to the first harmonic processing circuit differs from a distance from the second amplifying unit to the second harmonic processing circuit.

Abstract: A first amplification section and a second amplification section included in an amplification apparatus amplify two constant amplitude signals generated by vector decomposition. An impedance inverting circuit inverts the impedance of the signal amplified by the second amplification section. A combining circuit corrects the phases of the signal amplified by the first amplification section and the signal whose impedance is inverted by the impedance inverting circuit, and combines and outputs these signals. The combining circuit includes a line which is (?/4)+? in length and which is an asymmetrical circuit element and a line which is (?/4)?? in length and which is an asymmetrical circuit element.

Abstract: A power amplifier includes a first matching circuit configured to perform harmonic processing of an input signal, and a second matching circuit configured to perform the harmonic processing of an output signal, the output signal being generated by amplifying a power of the input signal. The power amplifier rotates a phase of output impedance at a matching point of the harmonic included in the generated output signal when the power of the input signal is decreased from a value higher than a certain value to a value lower than the certain value.

Abstract: An amplification device includes: an amplitude adjustment circuit configured to adjust an amplitude level of an input signal so as to keep the amplitude level within a given range; an amplifier configured to amplify the adjusted signal; and a circuitry configured to change an amplitude level of the amplified signal, based on the amplitude level of the input signal and a first distortion compensation corresponding to the amplitude level of the input signal.

Abstract: A control device of a power amplifier includes: a limiter configured to limit a level of an input signal to the power amplifier; and a control unit configured to, when the limiter operates, make an operation voltage of the power amplifier invariable and control load of an output matching circuit of the power amplifier based on an amplitude of the input signal, and, when the limiter does not operate, to make the load of the output matching circuit invariable and control the operation voltage of the power amplifier.