Patents by Inventor Toru Takayama

Toru Takayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10325940
    Abstract: To provide a semiconductor device in which a layer to be peeled is attached to a base having a curved surface, and a method of manufacturing the same, and more particularly, a display having a curved surface, and more specifically a light-emitting device having a light emitting element attached to a base with a curved surface. A layer to be peeled, which contains a light emitting element furnished to a substrate using a laminate of a first material layer which is a metallic layer or nitride layer, and a second material layer which is an oxide layer, is transferred onto a film, and then the film and the layer to be peeled are curved, to thereby produce a display having a curved surface.
    Type: Grant
    Filed: November 10, 2016
    Date of Patent: June 18, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yuugo Goto, Hideaki Kuwabara, Shunpei Yamazaki
  • Publication number: 20190148916
    Abstract: A semiconductor laser device includes: a first semiconductor layer on a first conductivity side; a second semiconductor layer on the first conductivity side; an active layer; a third semiconductor layer on a second conductivity side different from the first conductivity side; and a fourth semiconductor layer on the second conductivity side. Eg2<Eg3 is satisfied, where Eg2 and Eg3 denote maximum values of band gap energy of the second semiconductor layer and the third semiconductor layer, respectively. The third semiconductor layer includes a first region layer in which band gap energy monotonically decreases toward the fourth semiconductor layer. N2>N3 is satisfied, where N2 denotes an impurity concentration of the second semiconductor layer, and N3 denotes an impurity concentration of the third semiconductor layer.
    Type: Application
    Filed: December 20, 2018
    Publication date: May 16, 2019
    Inventors: Tougo NAKATANI, Takahiro OKAGUCHI, Norio IKEDO, Takeshi YOKOYAMA, Tomohito YABUSHITA, Toru TAKAYAMA, Shoichi TAKASUKA
  • Publication number: 20190129214
    Abstract: A structure for preventing deteriorations of a light-emitting device and retaining sufficient capacitor elements (condenser) required by each pixel is provided. A first passivation film, a second metal layer, a flattening film, a barrier film, and a third metal layer are stacked in this order over a transistor. A side face of a first opening provided with the flattening film is covered by the barrier film, a second opening is formed inside the first opening, and a third metal layer is connected to a semiconductor via the first opening and the second opening. A capacitor element that is formed of a lamination of a semiconductor of a transistor, a gate insulating film, a gate electrode, the first passivation film, and the second metal layer is provided.
    Type: Application
    Filed: November 16, 2018
    Publication date: May 2, 2019
    Inventors: Shunpei YAMAZAKI, Toru TAKAYAMA, Satoshi MURAKAMI, Hajime KIMURA
  • Publication number: 20190131770
    Abstract: A semiconductor laser device includes: a first conductivity side semiconductor layer, an active layer; and a second conductivity side semiconductor layer. The second conductivity side semiconductor layer includes a first semiconductor layer and a second semiconductor layer, the first semiconductor layer being closer to the active layer than the second semiconductor layer is. The second semiconductor layer defines a width of a current injection region for injecting current into an optical waveguide. The current injection region includes a width varying region in which a width varies. S1>S2, where S1 denotes a width of the width varying region on a front end face side, and S2 denotes a width of the width varying region on a rear end face side.
    Type: Application
    Filed: December 27, 2018
    Publication date: May 2, 2019
    Inventors: Norio IKEDO, Tougo NAKATANI, Takahiro OKAGUCHI, Takeshi YOKOYAMA, Tomohito YABUSHITA, Toru TAKAYAMA
  • Publication number: 20190074665
    Abstract: A nitride-based light-emitting device includes, on a GaN substrate: a first-conductivity-side first semiconductor layer; an active layer; and a second-conductivity-side first semiconductor layer, in the stated order, and further includes an electron barrier layer of a second conductivity type between the active layer and the second-conductivity-side first semiconductor layer, the electron barrier layer including a nitride-based semiconductor containing at least Al. The electron barrier layer has a first region in which an Al composition changes. The Al composition in the first region monotonically increases in a direction from the active layer to the second-conductivity-side first semiconductor layer. An impurity concentration in the second-conductivity-side first semiconductor layer is lower in a region nearer the electron barrier layer than in a region farther from the electron barrier layer.
    Type: Application
    Filed: November 6, 2018
    Publication date: March 7, 2019
    Inventors: Toru TAKAYAMA, Tougo NAKATANI, Takashi KANO, Katsuya SAMONJI
  • Patent number: 10186682
    Abstract: To realize a high-performance liquid crystal display device or light-emitting element using a plastic film. A CPU is formed over a first glass substrate and then, separated from the first substrate. A pixel portion having a light-emitting element is formed over a second glass substrate, and then, separated from the second substrate. The both are bonded to each other. Therefore, high integration can be achieved. Further, in this case, the separated layer including the CPU serves also as a sealing layer of the light-emitting element.
    Type: Grant
    Filed: May 1, 2017
    Date of Patent: January 22, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Yumiko Ohno
  • Patent number: 10164408
    Abstract: A light emitting element according to the present disclosure includes: a GaN substrate; a first strain correction layer disposed above the GaN substrate and including InxGa1-xN of a first conductivity type where x is greater than 0 and less than or equal to 1; a first low refractive index layer disposed above the first strain correction layer, including In1-a-bGaaAlbN of the first conductivity type, and having relationships of (a/0.98)+(b/0.8)?1, (a/1.02)+(b/0.85)?1, and (a/1.03)+(b/0.68)?1; a first clad layer disposed above the first low refractive index layer, including AlzGa1-zN of the first conductivity type where z is greater than or equal to 0.03 and less than or equal to 0.06, and having a refractive index higher than a refractive index of the first low refractive index layer; and an active layer disposed above the first clad layer.
    Type: Grant
    Filed: December 5, 2017
    Date of Patent: December 25, 2018
    Assignee: Panasonic Intellectual Property Management Co., Ltd.
    Inventor: Toru Takayama
  • Patent number: 10133139
    Abstract: A structure for preventing deteriorations of a light-emitting device and retaining sufficient capacitor elements (condenser) required by each pixel is provided. A first passivation film, a second metal layer, a flattening film, a barrier film, and a third metal layer are stacked in this order over a transistor. A side face of a first opening provided with the flattening film is covered by the barrier film, a second opening is formed inside the first opening, and a third metal layer is connected to a semiconductor via the first opening and the second opening. A capacitor element that is formed of a lamination of a semiconductor of a transistor, a gate insulating film, a gate electrode, the first passivation film, and the second metal layer is provided.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: November 20, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Satoshi Murakami, Hajime Kimura
  • Publication number: 20180308867
    Abstract: A substrate and a delamination film are separated by a physical means, or a mechanical means in a state where a metal film formed over a substrate, and a delamination layer comprising an oxide film including the metal and a film comprising silicon, which is formed over the metal film, are provided. Specifically, a TFT obtained by forming an oxide layer including the metal over a metal film; crystallizing the oxide layer by heat treatment; and performing delamination in a layer of the oxide layer or at both of the interface of the oxide layer is formed.
    Type: Application
    Filed: June 25, 2018
    Publication date: October 25, 2018
    Inventors: Junya MARUYAMA, Toru TAKAYAMA, Yumiko OHNO, Shunpei YAMAZAKI
  • Patent number: 10083823
    Abstract: One object is to provide a deposition technique for forming an oxide semiconductor film. By forming an oxide semiconductor film using a sputtering target including a sintered body of a metal oxide whose concentration of hydrogen contained is low, for example, lower than 1×1016 atoms/cm3, the oxide semiconductor film contains a small amount of impurities such as a compound containing hydrogen typified by H2O or a hydrogen atom. In addition, this oxide semiconductor film is used as an active layer of a transistor.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: September 25, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Keiji Sato
  • Patent number: 10038012
    Abstract: A substrate and a delamination film are separated by a physical means, or a mechanical means in a state where a metal film formed over a substrate, and a delamination layer comprising an oxide film including the metal and a film comprising silicon, which is formed over the metal film, are provided. Specifically, a TFT obtained by forming an oxide layer including the metal over a metal film; crystallizing the oxide layer by heat treatment; and performing delamination in a layer of the oxide layer or at both of the interface of the oxide layer is formed.
    Type: Grant
    Filed: January 3, 2017
    Date of Patent: July 31, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Junya Maruyama, Toru Takayama, Yumiko Ohno, Shunpei Yamazaki
  • Patent number: 9954196
    Abstract: A high-quality light emitting device is provided which has a long-lasting light emitting element free from the problems of conventional ones because of a structure that allows less degradation, and a method of manufacturing the light emitting device is provided. After a bank is formed, an exposed anode surface is wiped using a PVA (polyvinyl alcohol)-based porous substance or the like to level the surface and remove dusts from the surface. An insulating film is formed between an interlayer insulating film on a TFT and the anode. Alternatively, plasma treatment is performed on the surface of the interlayer insulating film on the TFT for surface modification.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: April 24, 2018
    Assignee: Semiconductor Energy Laboratory Co., LTD.
    Inventors: Hirokazu Yamagata, Shunpei Yamazaki, Toru Takayama
  • Publication number: 20180108838
    Abstract: There is provided a peeling method capable of preventing a damage to a layer to be peeled. Thus, not only a layer to be peeled having a small area but also a layer to be peeled having a large area can be peeled over the entire surface at a high yield. Processing for partially reducing contact property between a first material layer (11) and a second material layer (12) (laser light irradiation, pressure application, or the like) is performed before peeling, and then peeling is conducted by physical means. Therefore, sufficient separation can be easily conducted in an inner portion of the second material layer (12) or an interface thereof.
    Type: Application
    Filed: December 7, 2017
    Publication date: April 19, 2018
    Inventors: Toru Takayama, Junya Maruyama, Shunpei Yamazaki
  • Publication number: 20180109076
    Abstract: A light emitting element according to the present disclosure includes: a GaN substrate; a first strain correction layer disposed above the GaN substrate and including InxGa1-xN of a first conductivity type where x is greater than 0 and less than or equal to 1; a first low refractive index layer disposed above the first strain correction layer, including In1-a-bGaaAlbN of the first conductivity type, and having relationships of (a/0.98)+(b/0.8)?1, (a/1.02)+(b/0.85)?1, and (a/1.03)+(b/0.68)?1; a first clad layer disposed above the first low refractive index layer, including AlxGa1-xN of the first conductivity type where z is greater than or equal to 0.03 and less than or equal to 0.06, and having a refractive index higher than a refractive index of the first low refractive index layer; and an active layer disposed above the first clad layer.
    Type: Application
    Filed: December 5, 2017
    Publication date: April 19, 2018
    Inventor: Toru TAKAYAMA
  • Patent number: 9929190
    Abstract: It is an object of the present invention to provide a peeling method that causes no damage to a layer to be peeled and to allow not only a layer to be peeled with a small surface area but also a layer to be peeled with a large surface area to be peeled entirely. Further, it is also an object of the present invention to bond a layer to be peeled to various base materials to provide a lighter semiconductor device and a manufacturing method thereof. Particularly, it is an object to bond various elements typified by a TFT, (a thin film diode, a photoelectric conversion element comprising a PIN junction of silicon, or a silicon resistance element) to a flexible film to provide a lighter semiconductor device and a manufacturing method thereof.
    Type: Grant
    Filed: November 1, 2016
    Date of Patent: March 27, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Junya Maruyama, Yumiko Ohno
  • Publication number: 20180047933
    Abstract: A high-quality light emitting device is provided which has a long-lasting light emitting element free from the problems of conventional ones because of a structure that allows less degradation, and a method of manufacturing the light emitting device is provided. After a bank is formed, an exposed anode surface is wiped using a PVA (polyvinyl alcohol)-based porous substance or the like to level the surface and remove dusts from the surface. An insulating film is formed between an interlayer insulating film on a TFT and the anode. Alternatively, plasma treatment is performed on the surface of the interlayer insulating film on the TFT for surface modification.
    Type: Application
    Filed: September 8, 2017
    Publication date: February 15, 2018
    Inventors: Hirokazu YAMAGATA, Shunpei YAMAZAKI, Toru TAKAYAMA
  • Publication number: 20180019425
    Abstract: A display device with high visibility regardless of the ambient brightness is manufactured at low cost. A method for manufacturing a display device that includes a first display element, a second display element, and an insulating layer is provided. The first display element includes a first pixel electrode that reflects visible light, a liquid crystal layer, and a first common electrode that transmits visible light. The second display element includes a second pixel electrode that transmits visible light, a light-emitting layer, and a second common electrode that reflects visible light. The first common electrode is formed over a first substrate. A separation layer that reflects visible light is formed over a formation substrate, the insulating layer is formed over the separation layer, and the second display element is formed over the insulating layer. The formation substrate and a second substrate are bonded to each other with an adhesive.
    Type: Application
    Filed: July 11, 2017
    Publication date: January 18, 2018
    Inventors: Seiji YASUMOTO, Masataka SATO, Hiroki ADACHI, Toru TAKAYAMA, Natsuko TAKASE
  • Publication number: 20170365810
    Abstract: To realize a high-performance liquid crystal display device or light-emitting element using a plastic film. A CPU is formed over a first glass substrate and then, separated from the first substrate. A pixel portion having a light-emitting element is formed over a second glass substrate, and then, separated from the second substrate. The both are bonded to each other. Therefore, high integration can be achieved. Further, in this case, the separated layer including the CPU serves also as a sealing layer of the light-emitting element.
    Type: Application
    Filed: May 1, 2017
    Publication date: December 21, 2017
    Inventors: Toru TAKAYAMA, Junya MARUYAMA, Yumiko OHNO
  • Patent number: 9847355
    Abstract: An object of the present invention is to apply an insulating film of cure and high quality that is suitably applicable as gate insulating film and protective film to a technique that the insulating film is formed on the glass substrate under a temperature of strain point or lower, and to a semiconductor device realizing high efficiency and high reliability by using it. In a semiconductor device of the present invention, a gate insulating film of a field effect type transistor with channel length of from 0.35 to 2.5 ?m in which a silicon nitride film is formed over a crystalline semiconductor film through a silicon oxide film, wherein the silicon nitride film contains hydrogen with the concentration of 1×1021/cm3 or less and has characteristic of an etching rate of 10 nm/min or less with respect to mixed solution containing an ammonium hydrogen fluoride (NH4HF2) of 7.13% and an ammonium fluoride (NH4F) of 15.4%.
    Type: Grant
    Filed: October 16, 2014
    Date of Patent: December 19, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Shunpei Yamazaki, Kengo Akimoto
  • Patent number: 9842994
    Abstract: There is provided a peeling method capable of preventing a damage to a layer to be peeled. Thus, not only a layer to be peeled having a small area but also a layer to be peeled having a large area can be peeled over the entire surface at a high yield. Processing for partially reducing contact property between a first material layer (11) and a second material layer (12) (laser light irradiation, pressure application, or the like) is performed before peeling, and then peeling is conducted by physical means. Therefore, sufficient separation can be easily conducted in an inner portion of the second material layer (12) or an interface thereof.
    Type: Grant
    Filed: May 2, 2016
    Date of Patent: December 12, 2017
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toru Takayama, Junya Maruyama, Shunpei Yamazaki