Abstract: The present invention provides a novel method for producing an ester group-containing compound and a derivative produced using the compound as a synthetic intermediate. The invention also provides a polymerizable composition containing the compound obtained by the production method and a film-shaped polymer obtained by polymerizing the polymerizable composition. The present invention is a method for producing an ester group-containing compound, the method including a mixing step of mixing a condensing agent, a Bronsted acid, a carboxylic acid, and a phenol or an alcohol to prepare a reaction mixture. The Bronsted acid selected is other than the condensing agent, the carboxylic acid, and the phenol.

Abstract: The polymerizable liquid crystal compound has reverse wavelength dispersion or low wavelength dispersion and has high solubility in various solvents. The polymerizable liquid crystal compound provides an optically anisotropic body having high adhesiveness to substrates (or alignment films), by adding the polymerizable liquid crystal compound to a polymerizable composition and polymerizing the polymerizable composition using ultraviolet light. The invention provides a polymerizable composition containing the polymerizable liquid crystal compound having reverse wavelength dispersion or low wavelength dispersion, a polymer obtained by polymerizing the polymerizable composition, and an optically anisotropic body using the polymer.

Abstract: There are provided particles in which a dispersant can be easily removed from semiconductor nanocrystals, an ink with good storage stability, and a light-emitting device with a long emission lifetime. Particles according to the present invention contain light-emitting semiconductor nanocrystals and a dispersant supported on the semiconductor nanocrystals and having a boiling point of 300° C. or less at atmospheric pressure. An ink according to the present invention contains particles according to the present invention and a dispersion medium having a boiling point equal to or higher than the boiling point of the dispersant at atmospheric pressure and containing a polar compound with a polar group.

Abstract: The method for forming a light-emitting layer includes the steps of: preparing an ink containing particles and a dispersion medium with a boiling point of 200° C. or more at atmospheric pressure, the particles containing light-emitting semiconductor nanocrystals and a dispersant supported on the semiconductor nanocrystals; supplying the ink to a substrate to form a coating film on the substrate; placing the substrate, on which the coating film is formed, in a chamber, and reducing the internal pressure of the chamber to a first pressure in the range of 1 to 500 Pa and holding the first pressure for 2 minutes or more to remove the dispersion medium from the coating film; and reducing the internal pressure of the chamber to a second pressure that is lower than the first pressure and holding the second pressure for a predetermined time to further remove the dispersion medium from the coating film.

Abstract: The polymerizable liquid crystal compound has reverse wavelength dispersion or low wavelength dispersion and has high solubility in various solvents. The polymerizable liquid crystal compound provides an optically anisotropic body having high adhesiveness to substrates (or alignment films), by adding the polymerizable liquid crystal compound to a polymerizable composition and polymerizing the polymerizable composition using ultraviolet light. The invention provides a polymerizable composition containing the polymerizable liquid crystal compound having reverse wavelength dispersion or low wavelength dispersion, a polymer obtained by polymerizing the polymerizable composition, and an optically anisotropic body using the polymer.

Abstract: An image processing device includes: first to third address registers that store three addresses, respectively, the three addresses indicating three bank regions, respectively; an input image bank managing unit that, when the image processing device receives an image from an imaging device, switches, between the first address register and the second address register, and sets a flag and supplies the address stored in the first address register as an address for writing the received image; an imaging processing unit that performs image processing on the received image; and an image processing bank managing unit that, when the flag is in a set state and the processed image is switched to another image to be processed, switches, between the second address register and the third address register, resets the flag and supplies to the image processing unit the address stored in the third address register.

Abstract: An image synthesis apparatus includes an image obtainer obtaining a plurality of images taken by a plurality of cameras; a pixel value corrector which, with respect to each of the images, calculates a correction factor of an average pixel value in overlap regions located at the both ends of an image and, in the adjacent direction of the images, calculates the correction factor of a pixel value in a region other than the overlap regions by a predetermined continuous function connecting the correction factors in the overlap regions and corrects the entire image based on the calculated correction factor; a synthetic image generator synthesizing the images corrected by the pixel value corrector to generate one synthetic image; and an image output outputting the synthetic image to an external apparatus.

Abstract: An image synthesis apparatus includes an image obtainer obtaining a plurality of images taken by a plurality of cameras; a pixel value corrector which, with respect to each of the images, calculates a correction factor of an average pixel value in overlap regions located at the both ends of an image and, in the adjacent direction of the images, calculates the correction factor of a pixel value in a region other than the overlap regions by a predetermined continuous function connecting the correction factors in the overlap regions and corrects the entire image based on the calculated correction factor; a synthetic image generator synthesizing the images corrected by the pixel value corrector to generate one synthetic image; and an image output outputting the synthetic image to an external apparatus.

Abstract: An image processing device includes: first to third address registers that store three addresses, respectively, the three addresses indicating three bank regions, respectively; an input image bank managing unit that, when the image processing device receives an image from an imaging device, switches, between the first address register and the second address register, and sets a flag and supplies the address stored in the first address register as an address for writing the received image; an imaging processing unit that performs image processing on the received image; and an image processing bank managing unit that, when the flag is in a set state and the processed image is switched to another image to be processed, switches, between the second address register and the third address register, resets the flag and supplies to the image processing unit the address stored in the third address register.

Abstract: An image processing apparatus holds a plurality of intermediate smoothed images smoothed at a plurality of preset level values, reduces the N-th frame image of a moving image received from the outside to generate a reduced image, performs a smoothing process on the generated reduced image at the plurality of preset level values to generate a plurality of intermediate smoothed images, stores the generated intermediate smoothed images in an intermediate smoothed image storing unit, acquires, when generating the smoothed images of the frames after the (N+1)-th frame, one or a plurality of intermediate smoothed images from the plurality of intermediate smoothed images of the N-th frame stored in the intermediate smoothed image storing unit, synthesizes the acquired intermediate smoothed images of the N-th frame and the frames after the (N+1)-th frame of the moving image received from the outside, and generates smoothed images.

Abstract: An image processing apparatus includes a low-frequency-component storage unit that stores therein a low-frequency component generated from a frame in an input moving image composed of a plurality of frames, a low-frequency-component generating unit that generates a low-frequency component from an N-th frame of the input moving image, and stores the low-frequency component in the low-frequency-component storage unit, and a dynamic-range correcting unit that corrects a dynamic range by using an (N+1)-th or later frame of the input moving image and the low-frequency component of the N-th frame stored in the low-frequency-component storage unit.

Abstract: A camera control apparatus which controls an exposure time of a camera that takes a moving image, the camera includes a memory for storing the moving image taken by the camera, an image capturing unit for capturing the moving image from the camera and storing the moving image into the memory, a first candidate generator for generating the first candidate of the exposure time on the basis of a speed of the movable body, a second candidate generator for generating a second candidate of the exposure time on the basis of the moving image stored in the memory, and, a setting unit for selecting a shorter time between the first candidate and the second candidate, and for setting the selected candidate as the exposure time.

Abstract: An image processing apparatus includes a low-frequency-component storage unit that stores therein a low-frequency component generated from a frame in an input moving image composed of a plurality of frames, a low-frequency-component generating unit that generates a low-frequency component from an N-th frame of the input moving image, and stores the low-frequency component in the low-frequency-component storage unit, and a dynamic-range correcting unit that corrects a dynamic range by using an (N+1)-th or later frame of the input moving image and the low-frequency component of the N-th frame stored in the low-frequency-component storage unit.

Abstract: An image processing apparatus holds a plurality of intermediate smoothed images smoothed at a plurality of preset level values, reduces the N-th frame image of a moving image received from the outside to generate a reduced image, performs a smoothing process on the generated reduced image at the plurality of preset level values to generate a plurality of intermediate smoothed images, stores the generated intermediate smoothed images in an intermediate smoothed image storing unit, acquires, when generating the smoothed images of the frames after the (N+1)-th frame, one or a plurality of intermediate smoothed images from the plurality of intermediate smoothed images of the N-th frame stored in the intermediate smoothed image storing unit, synthesizes the acquired intermediate smoothed images of the N-th frame and the frames after the (N+1)-th frame of the moving image received from the outside, and generates smoothed images.

Abstract: An image synthesis apparatus includes an image obtainer obtaining a plurality of images taken by a plurality of cameras; a pixel value corrector which, with respect to each of the images, calculates a correction factor of an average pixel value in overlap regions located at the both ends of an image and, in the adjacent direction of the images, calculates the correction factor of a pixel value in a region other than the overlap regions by a predetermined continuous function connecting the correction factors in the overlap regions and corrects the entire image based on the calculated correction factor; a synthetic image generator synthesizing the images corrected by the pixel value corrector to generate one synthetic image; and an image output outputting the synthetic image to an external apparatus.

Abstract: A data transfer control system that can change the way of DMA transfers to meet the requirements of each application. The data transfer control system includes a DMA controller (DMAC) and a DMAC memory dedicated for DMA control purposes. The DMAC performs DMA transfers according to a DMA program stored in the DMAC memory. Each time a new DMA request is received, the DMAC saves its parameters in a DMA request parameter table, and each DMA request parameter table is registered with a DMA request management table. In this way, the received DMA requests are queued in the DMA request management table. They are executed in a first-in first-out fashion. The progress of ongoing DMA transfers are managed in a DMA channel status table disposed for each DMA channel.

Abstract: The present invention relates to a multiprocessor system, which comprises two or more processor elements to be executed by a common program, a control section for switching such plural processor elements one from another for execution by the common program, and a storing section storing handover information relating to the common program which information is to be handover from the one processor element to the another processor element. This not only optimizes each of the functions of the processor elements, but also achieves certain delivery or interchange of the information between these process or elements, and even reduces the power consumption.

Abstract: A data processing apparatus in which DMA transfer is performed. When a processor in a data processing unit outputs a first request to read data managed by a data management unit, a receiver-side DMA controller outputs a second request for DMA transfer, from the data processing unit to the data management unit through a dedicated line. Next, a memory controller in the data management unit reads out from the memory the data designated by the second request, and stores the data in a buffer. Then, a transmitter-side DMA controller acquires a right of use of a bus, and the memory controller transfers the data stored in the buffer, through the bus by DMA, and writes the data in a data storage area in the data processing unit.

Abstract: A reconfigurable integrated circuit device which is dynamically constructed to be an arbitrary operation status based on a configuration data, has a plurality of clusters including operation processor elements, a memory processor element, and an inter-processor element switch group for connecting the elements in an arbitrary status; an inter-cluster switch group for constructing data paths between the clusters in an arbitrary status; and an external memory bus. A direct memory access control section, for executing the data transfer between the memory processor element and the external memory by direct memory access responding to an access request from the memory processor elements of the plurality of clusters, is further provided.

Abstract: A data transfer control system that can change the way of DMA transfers to meet the requirements of each application. The data transfer control system includes a DMA controller (DMAC) and a DMAC memory dedicated for DMA control purposes. The DMAC performs DMA transfers according to a DMA program stored in the DMAC memory. Each time a new DMA request is received, the DMAC saves its parameters in a DMA request parameter table, and each DMA request parameter table is registered with a DMA request management table. In this way, the received DMA requests are queued in the DMA request management table. They are executed in a first-in first-out fashion. The progress of ongoing DMA transfers are managed in a DMA channel status table disposed for each DMA channel.