Patents by Inventor Toshiaki Tarui

Toshiaki Tarui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050154576
    Abstract: Disclosed here is a simulator for simulating the propriety of each created policy less-expensively and fast in an autonomic management system controlled by a policy. The simulator that analyzes the behavior of the above described autonomic management system that receives information inputs of system configuration, load balance setting, system load conditions, software performance, software's transitional performance, and target autonomic management policy to calculate the system behavior (resource utilization rate, software response time, and system throughput) by giving consideration to the system's transitional behavior at a time, then apply an autonomic management policy to the behavior, determine the system configuration and load balance setting at the next time, and use the new system configuration and load balance setting for the next time simulation.
    Type: Application
    Filed: August 27, 2004
    Publication date: July 14, 2005
    Inventors: Toshiaki Tarui, Mineyoshi Masuda, Tatsuo Higuchi
  • Publication number: 20050114507
    Abstract: Changes such as addition or removal of a device in a system composed of a number of devices are automatically detected and the physical location of the devices is managed. A management method of this invention includes a step (S502) of detecting the physical location of servers (S1 through S3) connected to a network switch (2) that is to be monitored, steps (S512 and S513) of collecting a globally unique MAC address which is unique to equipment of the servers (S1 through S3) connected to the network switch (2) and is not shared by the equipments, and a step (S517) of creating configuration information from the MAC address and from the physical connection location of the network switch (2).
    Type: Application
    Filed: October 21, 2004
    Publication date: May 26, 2005
    Inventors: Toshiaki Tarui, Tatsuo Higuchi
  • Publication number: 20050038890
    Abstract: A load distribution method is adopted by a client-server system comprising a plurality of clients 100 and a server cluster 1100, which includes a plurality of servers 800 each used for processing requests made by the clients 100 and allows the number of the servers 800 to be changed dynamically. Each of the clients 100 detects the number of servers 800 composing the server cluster 1100, sets an allocation of requests transmissible out to a newly added server 900 at a value small in comparison with that set for each of the other servers 800 right after detecting an increase in server count and then transmits out requests to the servers on the basis of the set allocation. It is thus possible to provide the clients 100 and the server-cluster system 1100 with the load distribution method suitable for a cluster reconfiguration technology for changing the number of servers composing the server-cluster system 1100 in accordance with an increase and a decrease in demand for a service.
    Type: Application
    Filed: February 23, 2004
    Publication date: February 17, 2005
    Inventors: Mineyoshi Masuda, Toshiaki Tarui, Tatsuo Higuchi
  • Publication number: 20040177143
    Abstract: To provide a method for managing data processing devices, in which the misidentification of a management target can be prevented. The method for managing data processing devices is applied to a system in which a plurality of container mechanisms are provided each of which contains a plurality of data processing devices and a management unit is provided which monitors each data processing device to collect information concerning the state of the data processing devices and orders management operations to be performed on the data processing devices based on the collected information, this method for managing data processing devices including: specifying a container mechanism containing a data processing device on which a management operation needs to be performed; and displaying information about the management operation on a specified container mechanism side.
    Type: Application
    Filed: July 28, 2003
    Publication date: September 9, 2004
    Inventors: Frederico Buchholz Maciel, Shin Kameyama, Toru Shonai, Toshiaki Tarui, Mineyoshi Masuda
  • Publication number: 20030163735
    Abstract: In a data center, when a server is disconnected from the Internet because of illegal manipulation of a file, valid files (not manipulated) are copied to a standby server and the processing is resumed after a short period of disconnection. According to the invention, a control program P10 performs manipulation checks for all files listed in a manipulation checklist. If any of them is manipulated, it issues a request to disconnect from the external network and a request to assign a standby server to a control program P20 of a management server. Upon receipt of a disconnection completion signal and the address of a standby server b0, the control program P10 copies valid files (not manipulated) to the standby server b0, and for invalid files, requests the copies of their backup files. After finishing copying, the management server connects the standby server b0 to the external network to resume processing.
    Type: Application
    Filed: August 14, 2002
    Publication date: August 28, 2003
    Inventors: Shin Kameyama, Toshiaki Tarui, Yutaka Yoshimura
  • Publication number: 20030163734
    Abstract: At a data center, operation for security management, such as tampering checks, is automatically implemented for a server allocated to one user of the data center without declining the user task processing performance of the servers in the data center. If control is exerted to deallocate one of the severs out of the user tasks, a server is deallocated such that no new load is assigned to the server to be checked for security management. At user-specified time intervals at which such operation is to be performed for one of the servers allocated to a user, judgment is made regarding whether an idle server is available. If available, the idle server is allocated to the user to resume the work load of the server to be checked for security management. If it is determined that no idle server is available, the load on the server to be checked for security management is reduced so as to perform the check for security management on the server.
    Type: Application
    Filed: August 14, 2002
    Publication date: August 28, 2003
    Inventors: Yutaka Yoshimura, Toshiaki Tarui, Frederico Buchholz Maciel, Shin Kameyama
  • Publication number: 20030069972
    Abstract: When a load of a user is fluctuated, a data center dynamically changes resource allocation to the user according to the load and holds security for each user.
    Type: Application
    Filed: February 25, 2002
    Publication date: April 10, 2003
    Inventors: Yutaka Yoshimura, Toshiaki Tarui, Frederico Buchholz Maciel, Toru Shonai
  • Patent number: 6546471
    Abstract: A shared memory multiprocessor (SMP) has efficient access to a main memory included in a particular node and a management of partitions that include the nodes. In correspondence with each page of main memory included in a node, a bit stored in a register indicates if the page has been accessed from any other node. In a case where the bit is “0”, a cache coherent command to be sent to the other nodes is not transmitted. The bit is reset by software at the time of initialization and memory allocation, and it is set by hardware when the page of the main memory is accessed from any other node. In a case where the interior of an SMP is divided into partitions, the main memory of each node is divided into local and shared areas, for which respectively separate addresses can be designated. In each node, the configuration information items of the shared area and the local area are stored in registers.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: April 8, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Toshiaki Tarui, Koichi Okazawa, Yasuyuki Okada, Toru Shonai, Toshio Okochi, Hideya Akashi
  • Patent number: 6510496
    Abstract: A symmetric multiprocessor (SMP) of hierarchical connection realizing an inter-partition shared memory has at the gateway of an inter-node connection switch from each node, a translator for translating an address of an access command for an area shared between partitions, between a real address used in a partition and a shared area address used in common between partitions. Thereby, the address of a local area of each partition is freely set, and cache coherent control of a shared area is conducted at high speed by using a snoop command of the hierarchical connection SMP. Fault containment between partitions is realized by checking conformity between the address of the access command issued from another partition and the shared area configuration. Nodes included in other partitions may be reset from each partition. In addition, the configuration information of the shared area between partitions may be dynamically modified.
    Type: Grant
    Filed: February 11, 2000
    Date of Patent: January 21, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Toshiaki Tarui, Toshio Okochi, Shinichi Kawamoto
  • Patent number: 6502136
    Abstract: A computer system including a plurality of processing nodes, at least one resource provided for use by any of the processing nodes and a plurality of register sets. Each register set is provided in each processing node for storing in parallel use status information indicating whether the resource is in exclusive use status. The computer system includes a plurality of request issue circuits, each being provided in each processing node, for issuing requests for exclusive use of the resource, a message exchanging circuit for serializing requests issued by the request issue circuits into a serialized order and broadcasting the request to the processing nodes and a plurality of status control circuits. Each status control circuit is provided in each processing node to update a corresponding register set depending on use status information and each request received at a corresponding node.
    Type: Grant
    Filed: May 2, 2001
    Date of Patent: December 31, 2002
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tatsuo Higuchi, Toshiaki Tarui, Katsuyoshi Kitai, Shigeo Takeuchi, Tatsuru Toba, Machiko Asaie, Yasuhiro Inagami
  • Publication number: 20020112102
    Abstract: A computer controls I/O allocation for partitions independently of CPU allocation and, in each I/O adapter and partition, the computer has a scheduling means controlling allocation for partitions of the I/O adapter by time sharing, a means to allocate the I/O adapter to partitions by space sharing and a means to dynamically change said allocation made by a partition-control program. Further, the computer has a means to monitor input/output performance of each partition, and a means to maintain SLA of a user program according to performance of each partition.
    Type: Application
    Filed: August 30, 2001
    Publication date: August 15, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Toshiaki Tarui, Shin Kameyama, Frederico Buchholz Maciel, Toru Shonai
  • Publication number: 20020087611
    Abstract: A virtual computer system including a reallocation means, in which a plurality of LPAR are operated by logically dividing physical resources composing a physical computer exclusively or in time dividing manner so as to dynamically change reallocation of physical resources among each of LPARs. Based on load conditions measured by an application or an OS of each LPAR, physical resource allocation to each LPAR is determined, thereby conducting reallocation of LPAR.
    Type: Application
    Filed: August 31, 2001
    Publication date: July 4, 2002
    Inventors: Tsuyoshi Tanaka, Naoki Hamanaka, Toshiaki Tarui
  • Patent number: 6404766
    Abstract: In order to execute a flow control and a congestion control in a hop-by-hop manner in a data communication among computers connected to different networks, in a data communication between a client A1 and a remote server B, a communication proxy of the remote server B is located in a local server A in an LAN to which the client A belongs. A communication packet to be routed to the remote server B is stolen (received) and passed to a transport layer. A TCP communication between the client A1 and the remote server B is divided into two; a communication between the client A1 and the communication proxy of the remote server B and a communication between the communication proxy of the remote server B and the remote server B.
    Type: Grant
    Filed: December 24, 1996
    Date of Patent: June 11, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Katsuyoshi Kitai, Yoshimasa Masuoka, Satoshi Yoshizawa, Frederico Buchholz Maciel, Toshiaki Tarui, Tatsuo Higuchi, Hideki Murahashi
  • Publication number: 20020065934
    Abstract: A data transfer method realizing a function similar to Unix's FORK by the following operations: allowing a parent process on a server to issue a request for intermission of communication to a process on a client and allowing the process on the client to issue a report of completion of intermission; allowing the parent process to issue, to a child process created on the server and the process on the client, a request for establishment of a new communication line connection between them; and, if the parent process has received data from the process on the client before the establishment of the new connection, coping the data to the child process.
    Type: Application
    Filed: August 29, 2001
    Publication date: May 30, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Shin Kameyama, Toshiaki Tarui, Tsuneyuki Imaki, Shinichi Kawamoto
  • Publication number: 20020057698
    Abstract: In order to execute a flow control and a congestion control in a hop-by-hop manner in a data communication among computers connected to different networks, in a data communication between a client Al and a remote server B, a communication proxy of the remote server B is located in a local server A in an LAN to which the client A belongs. A communication packet to be routed to the remote server B is stolen (received) and passed to a transport layer. A TCP communication between the client Al and the remote server B is divided into two; a communication between the client Al and the communication proxy of the remote server B and a communication between the communication proxy of the remote server B and the remote server B.
    Type: Application
    Filed: January 22, 2002
    Publication date: May 16, 2002
    Inventors: Katsuyoshi Kitai, Yoshimasa Masuoka, Satoshi Yoshizawa, Frederico Buchholz Maciel, Toshiaki Tarui, Tatsuo Higuchi, Hideki Murahashi
  • Patent number: 6378021
    Abstract: In an information processing apparatus having a crossbar switch, registers are provided for logical division of a connection of the crossbar switch into a plurality of groups, in order to allow a system to change the group division configuration while the system is in an ordinary operation. As an application of this, in a hot standby system, when a fault occurs in an active partition and the active partition is replaced by a standby partition, the standby partition is allowed to include system resources used by the active partition such as CPU's and memories.
    Type: Grant
    Filed: February 16, 1999
    Date of Patent: April 23, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Okazawa, Toshiaki Tarui, Yasuyuki Okada
  • Patent number: 6330604
    Abstract: A computer system including a plurality of processing nodes, at least one resource provided for use by any of the processing nodes and a plurality of register sets. Each register set is provided in each of the processing nodes for storing in parallel use status information indicating whether the resource is in exclusive use status or not. The computer system can also include a plurality of request issue circuits, each being provided in each of the processing nodes, for issuing individually requests for exclusive use of the resource, a message exchanging circuit for serializing requests issued by the request issue circuits into a serialized order and broadcasting the request to all of the processing nodes in the serialized order and a plurality of status control circuits.
    Type: Grant
    Filed: June 23, 1998
    Date of Patent: December 11, 2001
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tatsuo Higuchi, Toshiaki Tarui, Katsuyoshi Kitai, Shigeo Takeuchi, Tatsuru Toba, Machiko Asaie, Yasuhiro Inagami
  • Patent number: 6131169
    Abstract: An information processing apparatus includes a crossbar switch having a plurality of switching circuits for data transfer; connection lines having address data transfer paths of m-bit unit connected to each of the input/output ports of the switching circuits, control signal transfer paths of m-bit unit connected to each of the input/output ports of the control circuits and back-up transfer paths of m-bit unit connected to each of the input/output ports of the back-up circuits; and transfer path processing circuit connected correspondingly to the connection lines constructed by the n-bit provided on each of the processing units, monitored transfer of data and control signal between the processing units through the switching circuit and the control circuit in the crossbar switch, and detected a failure of at least the switching circuit and the control circuit to thereby change the connection of at least one of the failed switching circuit and control circuit to a connection of the back-up circuit.
    Type: Grant
    Filed: December 14, 1999
    Date of Patent: October 10, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Okazawa, Toshiaki Tarui, Yasuyuki Okada
  • Patent number: 6088770
    Abstract: A shared memory multiprocessor (SMP) has efficient access to a main memory included in a particular node and a management of partitions that include the nodes. In correspondence with each page of main memory included in a node, a bit stored in a register indicates if the page has been accessed from any other node. In a case where the bit is "0", a cache coherent command to be sent to the other nodes is not transmitted. The bit is reset by software at the time of initialization and memory allocation, and it is set by hardware when the page of the main memory is accessed from any other node. In a case where the interior of an SMP is divided into partitions, the main memory of each node is divided into local and shared areas, for which respectively separate addresses can be designated. In each node, the configuration information items of the shared area and the local area are stored in registers.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: July 11, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Toshiaki Tarui, Koichi Okazawa, Yasuyuki Okada, Toru Shonai, Toshio Okochi, Hideya Akashi
  • Patent number: 6035414
    Abstract: An information processing apparatus includes a crossbar switch having a plurality of switching circuits for data transfer; connection lines having address data transfer paths of m-bit unit connected to each of the input/output ports of the switching circuits, control signal transfer paths of m-bit unit connected to each of the input/output ports of the control circuits and back-up transfer paths of m-bit unit connected to each of the input/output ports of the back-up circuits; and transfer path processing circuit connected correspondingly to the connection lines constructed by the n-bit provided on each of the processing units, monitored transfer of data and control signal between the processing units through the switching circuit and the control circuit in the crossbar switch, and detected a failure of at least the switching circuit and the control circuit to thereby change the connection of at least one of the failed switching circuit and control circuit to a connection of the back-up circuit.
    Type: Grant
    Filed: November 3, 1997
    Date of Patent: March 7, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Koichi Okazawa, Toshiaki Tarui, Yasuyuki Okada