Patents by Inventor Toshifumi Wakano

Toshifumi Wakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170287957
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Application
    Filed: June 19, 2017
    Publication date: October 5, 2017
    Applicant: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Publication number: 20170287972
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality of pixels to further miniaturize the pixels at low cost without lowering of sensitivity and a conversion efficiency. In a configuration in which a plurality of pixels are arranged with respect to at least either of one of the OCCFs or one of the OCLs, a floating diffusion (FD) is shared by a sharing unit including a plurality of pixels, the plurality of pixels including pixels of at least either of different OCCFs or different OCLs. The present technology is applicable to a CMOS image sensor.
    Type: Application
    Filed: June 22, 2017
    Publication date: October 5, 2017
    Applicant: Sony Corporation
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Tanaka, Yusuke Otake
  • Patent number: 9773835
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality of pixels to further miniaturize the pixels at low cost without lowering of sensitivity and a conversion efficiency. In a configuration in which a plurality of pixels are arranged with respect to at least either of one of the OCCFs or one of the OCLs, a floating diffusion (FD) is shared by a sharing unit including a plurality of pixels, the plurality of pixels including pixels of at least either of different OCCFs or different OCLs. The present technology is applicable to a CMOS image sensor.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: September 26, 2017
    Assignee: Sony Corporation
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Tanaka, Yusuke Otake
  • Publication number: 20170250210
    Abstract: Provided is a solid-state imaging device including a lamination-type backside illumination CMOS (Complementary Metal Oxide Semiconductor) image sensor having a global shutter function. The solid-state imaging device includes a separation film including one of a light blocking film and a light absorbing film between a memory and a photo diode.
    Type: Application
    Filed: May 17, 2017
    Publication date: August 31, 2017
    Inventors: Nanako Kato, Toshifumi Wakano
  • Publication number: 20170236859
    Abstract: The present disclosure relates to a solid-state imaging device and an electronic device that are configured to suppress the occurrence of noise and white blemishes in an amplification transistor having an element separation region which is formed by ion implantation. An amplification transistor has an element separation region formed by ion implantation. A channel region insulating film which is at least a part of a gate insulating film above a channel region of the amplification transistor is thin compared to a gate insulating film of a selection transistor, and an element separation region insulating film which is at least a part of a gate insulating film above the element separation region of the amplification transistor is thick compared to the channel region insulating film. The present disclosure can be applied to, for example, a CMOS image sensor, etc.
    Type: Application
    Filed: August 6, 2015
    Publication date: August 17, 2017
    Inventors: Yusuke OTAKE, Toshifumi WAKANO, Takuya SANO, Yusuke TANAKA, Keiji TATANI, Hideo HARIFUCHI, Eiichi TAUCHI, Hiroki IWASHITA, Akira MATSUMOTO
  • Patent number: 9716122
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Grant
    Filed: October 18, 2016
    Date of Patent: July 25, 2017
    Assignee: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Patent number: 9679932
    Abstract: Provided is a solid-state imaging device including a lamination-type backside illumination CMOS (Complementary Metal Oxide Semiconductor) image sensor having a global shutter function. The solid-state imaging device includes a separation film including one of a light blocking film and a light absorbing film between a memory and a photo diode.
    Type: Grant
    Filed: January 12, 2016
    Date of Patent: June 13, 2017
    Assignee: Sony Corporation
    Inventors: Nanako Kato, Toshifumi Wakano
  • Patent number: 9661246
    Abstract: A solid state image pickup device is provided that includes a pixel array unit having a plurality of pixels and a signal processing circuit that has a capacitor operatively configured to process a respective signal output from each of the plurality of pixels. The capacitor is operatively configured as a stacked capacitor or a trench capacitor.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: May 23, 2017
    Assignee: Sony Corporation
    Inventors: Toshifumi Wakano, Keiji Mabuchi
  • Publication number: 20170110503
    Abstract: The present technology relates to a solid-state image sensor, an imaging device, and electronic equipment configured such that an FD is shared by a plurality of pixels to further miniaturize the pixels at low cost without lowering of sensitivity and a conversion efficiency. In a configuration in which a plurality of pixels are arranged with respect to at least either of one of the OCCFs or one of the OCLs, a floating diffusion (FD) is shared by a sharing unit including a plurality of pixels, the plurality of pixels including pixels of at least either of different OCCFs or different OCLs. The present technology is applicable to a CMOS image sensor.
    Type: Application
    Filed: December 30, 2016
    Publication date: April 20, 2017
    Applicant: Sony Corporation
    Inventors: Nanako Kato, Toshifumi Wakano, Yusuke Tanaka, Yusuke Otake
  • Patent number: 9590007
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: March 7, 2017
    Assignee: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Publication number: 20170040363
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Application
    Filed: October 18, 2016
    Publication date: February 9, 2017
    Applicant: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Publication number: 20170013211
    Abstract: Imaging devices and electronic apparatuses with one or more shared pixel structures are provided. The shared pixel structure includes a plurality of photoelectric conversion devices or photodiodes. Each photodiode in the shared pixel structure is located within a rectangular area. The shared pixel structure also includes a plurality of shared transistors. The shared transistors in the shared pixel structure are located adjacent the photoelectric conversion devices of the shared pixel structure. The rectangular area can have two short sides and two long sides, with the shared transistors located along one of the long sides. In addition, a length of one or more of the transistors can be extended in a direction parallel to the long side of the rectangular area.
    Type: Application
    Filed: February 20, 2015
    Publication date: January 12, 2017
    Inventors: NANAKO KATO, TOSHIFUMI WAKANO, YUSUKE OTAKE
  • Publication number: 20160351606
    Abstract: The present disclosure relates to a solid-state imaging device that can be made smaller in size, a method of manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device includes a photoelectric conversion film that performs photoelectric conversion of light emitted from the back surface side of the semiconductor substrate. Also, in each pixel, a charge accumulation layer is formed to be in contact with the photoelectric conversion film on the back surface of the semiconductor substrate, a transfer path unit is formed to extend from the charge accumulation layer to a point near the front surface of the semiconductor substrate, and a memory unit is disposed near the back surface side of the semiconductor substrate, with a charge transfer gate being interposed between the memory unit and the transfer path unit.
    Type: Application
    Filed: February 5, 2015
    Publication date: December 1, 2016
    Inventors: KENJI AZAMI, YUSUKE OTAKE, YUKO OHGISHI, TOSHIFUMI WAKANO, ATSUSHI TODA
  • Publication number: 20160276391
    Abstract: There is provided a solid-state image sensor including a semiconductor substrate in which a plurality of pixels are arranged, and a wiring layer stacked on the semiconductor substrate and formed in such a manner that a plurality of conductor layers having a plurality of wirings are buried in an insulation film. In the wiring layer, wirings connected to the pixels are formed of two conductor layers.
    Type: Application
    Filed: June 1, 2016
    Publication date: September 22, 2016
    Inventor: Toshifumi Wakano
  • Patent number: 9397133
    Abstract: There is provided a solid-state image sensor including a semiconductor substrate in which a plurality of pixels are arranged, and a wiring layer stacked on the semiconductor substrate and formed in such a manner that a plurality of conductor layers having a plurality of wirings are buried in an insulation film. In the wiring layer, wirings connected to the pixels are formed of two conductor layers.
    Type: Grant
    Filed: November 19, 2015
    Date of Patent: July 19, 2016
    Assignee: SONY CORPORATION
    Inventor: Toshifumi Wakano
  • Publication number: 20160204159
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Application
    Filed: March 24, 2016
    Publication date: July 14, 2016
    Applicant: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Publication number: 20160198106
    Abstract: A solid state image pickup device is provided that includes a pixel array unit having a plurality of pixels and a signal processing circuit that has a capacitor operatively configured to process a respective signal output from each of the plurality of pixels. The capacitor is operatively configured as a stacked capacitor or a trench capacitor.
    Type: Application
    Filed: March 15, 2016
    Publication date: July 7, 2016
    Inventors: Toshifumi Wakano, Keiji Mabuchi
  • Patent number: 9386250
    Abstract: A solid state image pickup device is provided that includes a pixel array unit having a plurality of pixels and a signal processing circuit that has a capacitor operatively configured to process a respective signal output from each of the plurality of pixels. The capacitor is operatively configured as a stacked capacitor or a trench capacitor.
    Type: Grant
    Filed: May 1, 2015
    Date of Patent: July 5, 2016
    Assignee: SONY CORPORATION
    Inventors: Toshifumi Wakano, Keiji Mabuchi
  • Patent number: 9344662
    Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.
    Type: Grant
    Filed: November 6, 2015
    Date of Patent: May 17, 2016
    Assignee: Sony Corporation
    Inventors: Toshifumi Wakano, Fumihiko Koga
  • Publication number: 20160126266
    Abstract: Provided is a solid-state imaging device including a lamination-type backside illumination CMOS (Complementary Metal Oxide Semiconductor) image sensor having a global shutter function. The solid-state imaging device includes a separation film including one of a light blocking film and a light absorbing film between a memory and a photo diode.
    Type: Application
    Filed: January 12, 2016
    Publication date: May 5, 2016
    Inventors: Nanako Kato, Toshifumi Wakano