Patents by Inventor Toshiharu Ishida
Toshiharu Ishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8907475Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: GrantFiled: June 21, 2013Date of Patent: December 9, 2014Assignee: Renesas Electronics CorporationInventors: Hanae Shimokawa, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Publication number: 20130286621Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: ApplicationFiled: June 21, 2013Publication date: October 31, 2013Inventors: Hanae SHIMOKAWA, Tasao SOGA, Hiroaki OKUDAIRA, Toshiharu ISHIDA, Tetsuya NAKATSUKA, Yoshiharu INABA, Asao NISHIMURA
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Patent number: 8503189Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: GrantFiled: May 4, 2010Date of Patent: August 6, 2013Assignee: Renesas Electronics CorporationInventors: Hanae Shimokawa, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Publication number: 20100214753Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: ApplicationFiled: May 4, 2010Publication date: August 26, 2010Inventors: Hanae SHIMOKAWA, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Patent number: 7722962Abstract: A solder foil formed from a material comprising particles of Cu, etc. as metal particles and Sn particles as solder particles by rolling is suitable for solder bonding at a high temperature side in temperature-hierarchical bonding, and semiconductor devices and electronic devices produced by use of such solder bonding have distinguished reliability of mechanical characteristics, etc.Type: GrantFiled: December 19, 2001Date of Patent: May 25, 2010Assignee: Renesas Technology Corp.Inventors: Tasao Soga, Hanae Hata, Toshiharu Ishida, Kanko Ishida, legal representative, Tetsuya Nakatsuka, Masahide Okamoto, Kazuma Miura
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Patent number: 7709746Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: GrantFiled: January 13, 2006Date of Patent: May 4, 2010Assignee: Renesas Technology Corp.Inventors: Hanae Shimokawa, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Publication number: 20060115994Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: ApplicationFiled: January 13, 2006Publication date: June 1, 2006Inventors: Hanae Shimokawa, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Publication number: 20060061974Abstract: A solder foil formed from a material comprising particles of Cu, etc. as metal particles and Sn particles as solder particles by rolling is suitable for solder bonding at a high temperature side in temperature-hierarchical bonding, and semiconductor devices and electronic devices produced by use of such solder bonding have distinguished reliability of mechanical characteristics, etc.Type: ApplicationFiled: December 19, 2001Publication date: March 23, 2006Inventors: Tasao Soga, Hanae Hata, Toshiharu Ishida, Kanko Ishida, Tetsuya Nakatsuka, Masahide Okamoto, Kazuma Miura
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Patent number: 7013564Abstract: A method of producing an electronic device by connecting a lead of a semiconductor device with an electrode of a circuit board to form a bonded structure. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: GrantFiled: October 9, 2001Date of Patent: March 21, 2006Assignee: Hitachi, Ltd.Inventors: Hanae Shimokawa, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Patent number: 6960396Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: GrantFiled: July 3, 2002Date of Patent: November 1, 2005Assignee: Hitachi, Ltd.Inventors: Hanae Shimokawa, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Publication number: 20040177997Abstract: It is an object of the present invention to provide an electronic device using completely new soldered connection, and more particularly to achieve flip chip bonding on a high temperature side in a temperature hierarchy connection as an alternative method for high Pb containing solder including a large mount of Pb. The object can be achieved by using a configuration in which metallic balls including a single metal, an alloy, a chemical compound or a mixture thereof are connected by Sn or In for pads between a chip and a substrate.Type: ApplicationFiled: April 29, 2004Publication date: September 16, 2004Inventors: Hanae Hata, Tasao Soga, Toshiharu Ishida, Kazuma Miura, Kanko Ishida
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Patent number: 6774490Abstract: An electronic equipment is capable of improving falling down shock resistance or impact resistance in an electronic equipment and of improving reliability of a solder joint in a semiconductor device die-bonded Si chip or the like to which thermal shock causing large deformation may act, bump mounting of BGA, CSP, WPP, flip-chip and so forth, a power module acting large stress and so forth. The electronic equipment has a circuit board and an electronic parts to be electrically connected to an electrode of the circuit board. The electrode of the circuit board and an electrode of the electronic part are connected by soldering using a lead free solder consisted of Cu: 0-2.0 mass %, In: 0.1-10 mass %, and Sn: remaining amount.Type: GrantFiled: March 25, 2003Date of Patent: August 10, 2004Assignee: Hitachi, Ltd.Inventors: Tasao Soga, Hanae Shimokawa, Tetsuya Nakatsuka, Masato Nakamura, Yuji Fujita, Toshiharu Ishida, Masahide Okamoto, Koji Serizawa, Toshihiro Hachiya, Hideki Mukuno
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Publication number: 20040128214Abstract: A management computer calculates a predicted inventory amount based on a sales plan amount, a warehousing amount, and a predicted inventory result, of a specific day. Then, the management computer calculates a determining period fluctuation range inventory, physical distribution inventory, and physical distribution fluctuation range inventory. Then, the management computer calculates a standard value of inventory based on the determining period fluctuation range inventory, physical distribution inventory, physical distribution fluctuation range inventory, and a safe inventory amount. Furthermore, the management computer calculates a standard value of lump-sum inventory, calculates a standard value of inventory from the standard value of inventory and standard value of lump-sum inventory, and obtains a supplement amount by the difference of the standard value of inventory and predicted inventory amount.Type: ApplicationFiled: August 19, 2003Publication date: July 1, 2004Inventors: Toshiharu Ishida, Yukihiro Toriyama, Yasuyuki Katsuramoto, Tetsuhiro Yamaguchi, Seiji Hiromatsu, Kazuyuki Yoshida
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Publication number: 20030186072Abstract: An electronic equipment is capable of improving falling down shock resistance or impact resistance in an electronic equipment and of improving reliability of a solder joint in a semiconductor device die-bonded Si chip or the like to which thermal shock causing large deformation may act, bump mounting of BGA, CSP, WPP, flip-chip and so forth, a power module acting large stress and so forth. The electronic equipment has a circuit board and an electronic parts to be electrically connected to an electrode of the circuit board. The electrode of the circuit board and an electrode of the electronic part are connected by soldering using a lead free solder consisted of Cu: 0-2.0 mass %, In: 0.1-10 mass %, and Sn: remaining amount.Type: ApplicationFiled: March 25, 2003Publication date: October 2, 2003Inventors: Tasao Soga, Hanae Shimokawa, Tetsuya Nakatsuka, Masato Nakamura, Yuji Fujita, Toshiharu Ishida, Masahide Okamoto, Koji Serizawa, Toshihiro Hachiya, Hideki Mukuno
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Publication number: 20030184986Abstract: A circuit board has a first electrode and a second electrode connected with respective electrodes of a chip and a first insulating layer with openings provided at respective positions corresponding to the first electrode and the second electrode. The openings of the first insulating layer are shaped so that the first insulating layer does not cover at least a region below the chip on the peripheral edges of the first and second electrodes.Type: ApplicationFiled: February 20, 2003Publication date: October 2, 2003Applicant: Hitachi, Ltd.Inventors: Tasao Soga, Hanae Hata, Toshiharu Ishida, Masahide Okamoto, Syougo Senoo, Toshiyuki Kagami, Akihiro Sakashita
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Patent number: 6563225Abstract: There is provided an electronic device comprising at least one electronic part and a substrate on which said electronic part is mounted, said electronic part and said substrate being bonded by a joint comprising a phase of Al particles and another phase of a Al—Mg—Ge—Zn alloy, said Al particles being connected to each other by said Al—Mg—Ge—Zn alloy phase.Type: GrantFiled: February 27, 2002Date of Patent: May 13, 2003Assignee: Hitachi, Ltd.Inventors: Tasao Soga, Toshiharu Ishida, Kazuma Miura, Hanae Hata, Masahide Okamoto, Tetsuya Nakatsuka
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Patent number: 6555052Abstract: An electronic equipment is capable of improving falling down shock resistance or impact resistance in an electronic equipment and of improving reliability of a solder joint in a semiconductor device die-bonded Si chip or the like to which thermal shock causing large deformation may act, bump mounting of BGA, CSP, WPP, flip-chip and so forth, a power module acting large stress and so forth. The electronic equipment has a circuit board and an electronic parts to be electrically connected to an electrode of the circuit board. The electrode of the circuit board and an electrode of the electronic part are connected by soldering using a lead free solder consisted of Cu: 0˜2.0 mass %, In: 0.1˜10 mass %, and Sn: remaining amount.Type: GrantFiled: March 7, 2001Date of Patent: April 29, 2003Assignee: Hitachi, Ltd.Inventors: Tasao Soga, Hanae Shimokawa, Tetsuya Nakatsuka, Masato Nakamura, Yuji Fujita, Toshiharu Ishida, Masahide Okamoto, Koji Serizawa, Toshihiro Hachiya, Hideki Mukuno
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Publication number: 20020163085Abstract: Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.Type: ApplicationFiled: July 3, 2002Publication date: November 7, 2002Inventors: Hanae Shimokawa, Tasao Soga, Hiroaki Okudaira, Toshiharu Ishida, Tetsuya Nakatsuka, Yoshiharu Inaba, Asao Nishimura
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Publication number: 20020149114Abstract: There is provided an electronic device comprising at least one electronic part and a substrate on which said electronic part is mounted, said electronic part and said substrate being bonded by a joint comprising a phase of Al particles and another phase of a Al—Mg—Ge—Zn alloy, said Al particles being connected to each other by said Al—Mg—Ge—Zn alloy phase.Type: ApplicationFiled: February 27, 2002Publication date: October 17, 2002Inventors: Tasao Soga, Toshiharu Ishida, Kazuma Miura, Hanae Hata, Masahide Okamoto, Tetsuya Nakatsuka
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Patent number: D770329Type: GrantFiled: June 26, 2015Date of Patent: November 1, 2016Assignee: Toyota Jidosha Kabushiki KaishaInventors: Toshiharu Ishida, Kazuo Suyama, Isao Sakata, Takayoshi Mugikura, Hiroshi Sakagame