Patents by Inventor Toshiharu Yanagida

Toshiharu Yanagida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5933752
    Abstract: Disclosed herein is a solder bump forming method and a sputter deposition apparatus used in this method which improves a bonding strength between a metal film having a solder bump forming region and an undercoating for the metal film. This method includes the steps of forming an opening through the undercoating, forming the metal film on the undercoating by a lift-off process so that the metal film is connected through the opening to an electrode pad formed on a substrate of a semiconductor device chip and has the solder bump forming region different from a region on the electrode pad, and forming a solder bump on the solder bump forming region of the metal film.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: August 3, 1999
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5918144
    Abstract: When BLM films as a barrier metal under solder balls are deposited to Al pad electrodes by a lift-off method utilizing a deformed resist pattern, a wafer is heated before sputter-forming of the BLM film, thereby eliminating a water content contained in a first layer polyimide film. In an rearrangement process, a wiring connecting the electrode pad and the solder ball is formed with the BLM film. Since degassing upon sputter forming of the BLM film is suppressed by the elimination of the water content, peeling of the BLM film on the first layer polyimide film is prevented. The wafer may also be heated simultaneously with the formation of the deformed resist pattern by Ar.sup.+ reverse sputtering (into overhang shape). Adhesion between the surface protection film and the BLM film upon rearrangement of the solder balls is thus improved in the flip chip bonding method.
    Type: Grant
    Filed: August 26, 1997
    Date of Patent: June 29, 1999
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5888892
    Abstract: Disclosed is a metal layer pattern forming method which easily allows lift-off. The thickness of the photoresist layer is not less than double the thickness of the metal layer, and the maximum temperature that the surface of the substrate to be processed attains ranges from 100.degree. C. to 150.degree. C. Through appropriate improvement of the quality of the photoresist layer, bonding to the background is prevented and the lift-off is facilitated.
    Type: Grant
    Filed: May 22, 1996
    Date of Patent: March 30, 1999
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5877078
    Abstract: For a resist pattern having an opening for defining a deposition position of a solder film pattern, a dewatering treatment is conducted while controlling the highest temperature to be reached on the surface of the wafer to lower than the heat resistant temperature of the resist pattern. The dewatering treatment is conducted by sputter etching, high vacuum annealing or drying in an inert gas atmosphere. Subsequently, a solder film is deposited over the entire surface of the wafer, the solder film deposited to the portion other than the inside of the opening is removed together with the resist pattern, and the remaining solder film pattern is finished by a heat melting treatment into a solder ball.
    Type: Grant
    Filed: April 7, 1998
    Date of Patent: March 2, 1999
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5866475
    Abstract: An Al electrode pad and a photoresist pattern having an opening portion on the Al electrode pad on a semiconductor substrate on which a surface protective film has been formed are formed. Then, a barrier metal layer is formed on the whole substrate surface, and a resist film and the barrier metal layer on the resist film are removed by lift-off, thus forming a solder bump foundation layer. Furthermore, an adhesive tape is stuck to the substrate surface and then the adhesive tape is peeled off, thereby to perform a residue removing process for removing resist film residues and useless barrier metal residues other than the solder bump foundation layer. With this, it is possible to further remove residues that have remained on the substrate surface without being lifted off and caused a defective device with an adhesive tape, thus making it possible to form a solder bump of high reliability in flip chip bonding.
    Type: Grant
    Filed: May 6, 1997
    Date of Patent: February 2, 1999
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5726097
    Abstract: A method of manufacturing a semiconductor device having multilevel interconnections comprising the steps of forming a lower interconnecting layer on a semiconductor substrate, forming a second interlayer insulation film on the lower interconnecting layer and forming a contact hole so as to expose the surface of the lower interconnecting layer, removing a native oxide film formed to the surface of the lower interconnecting layer by a non-oxidative plasma processing by using a plasma processing device at a plasma density between 1.times.10.sup.11 /cm.sup.3 and 1.times.10.sup.14 /cm.sup.3 while applying a substrate bias voltage of 200 V or higher and lower than 800 V, forming an upper interconnecting layer so as to fill the contact hole after removal of the native oxide film.
    Type: Grant
    Filed: July 25, 1995
    Date of Patent: March 10, 1998
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5591302
    Abstract: A process for dry etching a copper containing film formed on a substrate is performed by using an etching gas while heating at a temperature below 200.degree. C. The etching gas is selectable from the group consisting of a mixed gas of a N containing gas, an O containing gas, a N and O containing gas, or a mixed gas of a N containing gas, an O containing gas and a F containing gas, or a mixed gas of a N and O containing gas and a F containing gas. By this etching gas, Cu(NO.sub.3).sub.2 is formed to be sublimed.
    Type: Grant
    Filed: July 25, 1995
    Date of Patent: January 7, 1997
    Assignee: Sony Corporation
    Inventors: Keiji Shinohara, Junichi Sato, Yukihiro Kamide, Toshiharu Yanagida
  • Patent number: 5569627
    Abstract: A method for forming a copper wiring in a semiconductor device utilizes a copper film with a pattern mask thereon. Exposed portions of the copper film are etched to form a copper wiring. An insulation film is deposited over the copper wiring, including on side walls thereof. A portion of the insulation film is removed to leave an insulation film substantially only on side walls of the copper which is thinner than before the removing. A first dielectric film is formed between the copper wiring up to a top of the pattern mask but not on top of the pattern mask in order to embed and flatten regions between the copper wiring and pattern mask so that the regions are substantially level with the top of the pattern mask. A second dielectric layer is formed on the first dielectric layer to provide a flat surface over the copper wiring and pattern mask.
    Type: Grant
    Filed: July 25, 1995
    Date of Patent: October 29, 1996
    Assignee: Sony Corporation
    Inventors: Keiji Shinohara, Junichi Sato, Yukihiro Kamide, Toshiharu Yanagida
  • Patent number: 5505322
    Abstract: A process for dry etching a copper containing film formed on a substrate is performed by using an etching gas while heating at a temperature below 200.degree. C. The etching gas is selectable from the group consisting of a mixed gas of a N containing gas, an O containing gas, a N and O containing gas, or a mixed gas of a N containing gas, an O containing gas and a F containing gas, or a mixed gas of a N and O containing gas and a F containing gas. By this etching gas, Cu(NO.sub.3).sub.2 is formed to be sublimed.
    Type: Grant
    Filed: February 15, 1995
    Date of Patent: April 9, 1996
    Assignee: Sony Corporation
    Inventors: Keiji Shinohara, Junichi Sato, Yukihiro Kamide, Toshiharu Yanagida
  • Patent number: 5445712
    Abstract: A dry etching method for etching an SiO.sub.2 based material layer with a high etchrate, high selectivity, low damage, and pollution is disclosed. An etching gas containing a high-order fluorocarbon compound and an oxyhalogen compound is used. A main etchant is CF.sub.X.sup.+ dissociated in a large amount from the high-order fluorocarbon compound. On the other hand, the oxyhalogen compound, which has in a molecule one polarity functional group selected from carbonyl, thionyl, sulfuryl, nitrosyl, and nitryl, has the following effects: (1) a reduction in a deposit amount of carbonaceous polymer necessary for securing selectivity, by increasing chemical bond intensity, polymerization degree, and polarity of carbonaceous polymer derived from decomposition products of a resist mask; and (2) an increase in the etchrate by extracting O atoms from SiO.sub.2 by reducive radicals such as SO.sup.* and NO.sup.* derived from the polarity functional group.
    Type: Grant
    Filed: March 11, 1993
    Date of Patent: August 29, 1995
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5419809
    Abstract: A selecting anisotropic etching method for a GaAs/AlGaAs stacked system is disclosed. In a process for forming a recess for an HEMT gate, an n.sup.+ --GaAs layer on an n.sup.+ --AlGaAs layer is etched using a COS (carbonyl sulfide) /SF.sub.6 / CL.sub.2 mixed gas. The etching proceeds with radicals F.sup.* and Cl.sup.* as main etchants. On the other hand, carbonyl groups and C-O linkages derived from COS are introduced into a sputtered product of the resist mask for producing a carbonaceous polymer having a tough structure. The carbonaceous polymer forms a sidewall protective layer in conjunction with sulphur yielded from COS to contribute to anisotropic etching. It is possible with the present method to diminish the amount of the carbonaceous polymer necessary for procuring anisotropy to assure high selectivity, low pollution and low damage process.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: May 30, 1995
    Assignee: Sony Corporation
    Inventors: Tetsuji Nagayama, Toshiharu Yanagida
  • Patent number: 5378653
    Abstract: A method of forming an Al-based pattern whereby dry etching with high selectivity of an Al-based metallization layer and effective preventive measures for after-corrosion can be realized. An Al-based multilayer film is etched, for instance, by using an SOCl.sub.2 (thionyl chloride) / C.sub.2 mixed gas. At this time, thionyl and a C--S bond are introduced into a carbonaceous polymer CCl.sub.x derived from decomposition products of a resist mask, so as to obtain strong chemical bond and electrostatic adsorption force, thereby raising etching durability. Therefore, incident ion energy necessary For anisotropic processing and the deposit amount of the carbonaceous polymer can be reduced, and resist selectivity and selectivity to an underlying layer can be improved. Also, particle pollution and after-corrosion can be controlled. If a compound such as S.sub.2 F.sub.2 capable of releasing free S on dissociation due to electric discharge is added to SOCl.sub.2, pollution in a process can be reduced further.
    Type: Grant
    Filed: March 24, 1993
    Date of Patent: January 3, 1995
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5376234
    Abstract: A dry etching method wherein one compound selected from mercaptan, thioether and disulfide each having a fluorocarbon side chain is used as a main component of an etching gas. These compounds may form CF.sub.x.sup.+ and S on dissociation due to electric discharges, and contribute to high-rate etching and surface protection of a wafer. If a halogen compound such as CO, SOF.sub.2 or NOF is added to the etching gas, a high-rate etching reaction due to extraction of O atoms from SiO.sub.2 and structural reinforcement of carbonaceous polymer become possible. Also, S.sub.2 F.sub.2 may be added for reinforcing deposition of S. These effects lead to a reduction of the deposit amount of polymer necessary for highly selective processing, and contribute greatly to low pollution in a process.
    Type: Grant
    Filed: June 21, 1993
    Date of Patent: December 27, 1994
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5376228
    Abstract: A dry etching method wherein an etching gas containing carbonyl sulfide or COS is used. If carbonyl and C--O bonds derived from COS are introduced into a decomposition product of a resist mask 4, film quality of carbonaceous polymer becomes rigid, thereby exhibiting, despite a small amount of deposition, improvements in selectivity to the resist and selectivity to Si. CO* released from COS extracts O atoms in an SiO.sub.2 interlayer insulation film 3, and contributes to high etchrate. Sulfur or S contributes to surface protection along with carbonaceous polymer. If CH.sub.x F.sub.4-x, C.sub.m F.sub.n, S.sub.2 F.sub.2 and the like are used jointly with COS, further improvements can be achieved in high etchrate, high selectivity and low pollution.
    Type: Grant
    Filed: June 25, 1993
    Date of Patent: December 27, 1994
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5362350
    Abstract: A method for etching a copper layer in dry process includes the steps of forming a copper layer on a substrate, heating the substrate, etching the copper layer while using an etching gas. The etching gas includes iodine halide such as pentafuluoride, ioeine heptafuluoride, iodine monochloride and iodine trichloride. The copper layer is etched while sublimating cuprous iodide of a reaction product.
    Type: Grant
    Filed: November 24, 1993
    Date of Patent: November 8, 1994
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5338399
    Abstract: A method for dry etching for forming a contact hole in a silicon oxide interlayer insulating film is proposed, by which high etchrate, high selectivity, low pollution and low damage may be achieved. An etching gas containing cyclic saturated fluorocarbon compounds, such as octafluorocyclobutane (c-C.sub.4 F.sub.8), or cyclic unsaturated fluorocarbon compounds, such as hexafluorocyclobutene (c-C.sub.4 F.sub.6), is used, and the wafer temperature is controlled to be 50.degree. C. or lower. Both of the compounds are higher fluorocarbon compounds having three or more carbon atoms and yield more CF.sub.x.sup.+ radicals per molecule than does CF.sub.4 or the like compound to enable etching with a high etch rate. Besides, as compared with straight-chain saturated fluorocarbon compounds having the same number of carbon atoms, the above compounds exhibit a higher C/F ratio (the ratio of the number of carbon atoms to that of fluorine atoms per molecule) to permit carbonaceous polymers to be deposited effectively.
    Type: Grant
    Filed: February 12, 1992
    Date of Patent: August 16, 1994
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5314575
    Abstract: A reactive ion etching method is described in which a silicon compound film formed on an underlying layer or a substrate is etched through a mask layer by a two-stage procedure. In the two-stage procedure, part of the silicon compound film is first etched with a gas containing a hydrogen-free carbon fluoride gas at a high etching rated and then with a gas containing a hydrogen-containing carbon fluoride gas while reducing the damage on the underlying layer or substrate. The apparatus for carrying out the method is also disclosed.
    Type: Grant
    Filed: August 11, 1992
    Date of Patent: May 24, 1994
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida
  • Patent number: 5160398
    Abstract: A reactive ion etching method is described in which a silicon compound film formed on an underlying layer or a substrate is etched through a mask layer by a two-stage procedure. In the two-stage procedure, part of the silicon compound film is first etched with a gas containing a hydrogen-free carbon fluoride gas at a high etching rated and then with a gas containing a hydrogen-containing carbon fluoride gas while reducing the damage on the underlying layer or substrate. The apparatus for carrying out the method is also disclosed.
    Type: Grant
    Filed: November 16, 1990
    Date of Patent: November 3, 1992
    Assignee: Sony Corporation
    Inventor: Toshiharu Yanagida