Patents by Inventor Toshihiro Wakabayashi

Toshihiro Wakabayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070254398
    Abstract: A method of manufacturing a high-speed operable and broadband operable semiconductor device where a light-receiving element section, a CMOS element and a bipolar transistor element having a double polysilicon structure are formed on one chip. By performing the same conductivity type ion implantation, the same conductivity type diffusion layers (examples thereof include N-type diffusion layers, an anode diffusion layer, P-type well diffusion layer and collector diffusion layer as P-type diffusion layers, a cathode diffusion layer and collector contact diffusion layer as N-type diffusion layers, a source/drain diffusion layer and base Poly-Si diffusion layer as N-type diffusion layers, and a source/drain diffusion layer and base Poly-Si diffusion layer as P-type diffusion layers) are simultaneously formed in two or more regions among a light-receiving element region, CMOS element region and bipolar transistor element region of a semiconductor substrate or of an epitaxial layer over the semiconductor substrate.
    Type: Application
    Filed: September 28, 2006
    Publication date: November 1, 2007
    Applicant: FUJITSU LIMITED
    Inventors: Toshihiro Wakabayashi, Takao Setoyama, Yuji Asano, Akio Igarashi
  • Patent number: 7262483
    Abstract: By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed of single crystal, other portions such as a sidewall portion are formed of polycrystalline, and a film thickness of the sidewall portion is less than or equal to 1.5 times the film thickness of the bottom portion. In this non-selective epitaxial growth, monosilane, hydrogen, diborane, and germane are used as source gases. Then, flow rates of monosilane and hydrogen are set to 20 sccm and 20 slm respectively. Also, a growth temperature is set to 650° C., a flow rate of diborane is set to 75 sccm, and a flow rate of germane is set to 35 sccm.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: August 28, 2007
    Assignee: Fujitsu Limited
    Inventors: Hidekazu Sato, Toshihiro Wakabayashi
  • Publication number: 20070054199
    Abstract: A semiconductor device manufacturing method allowing effective inspection at low cost of a wafer having formed thereon chips. When forming chips on the wafer, a reticle having formed thereon chip patterns, monitor element/circuit patterns and connection patterns is used according to a formation step of the chips. The reticle is constructed such that a part of the monitor element/circuit patterns and the connection patterns are formed in the inner side area of an outer peripheral dicing area and when exposing adjacent shot positions, the pattern is formed on a portion where no outer peripheral dicing areas overlap whereas no pattern is formed on a part of a portion where outer peripheral dicing areas overlap. When using the reticle, a circuit which surrounds the whole chip formation area can be formed with the chips.
    Type: Application
    Filed: February 9, 2006
    Publication date: March 8, 2007
    Applicant: FUJITSU LIMITED
    Inventor: Toshihiro Wakabayashi
  • Patent number: 6949437
    Abstract: On a multilayer film which is formed on a semiconductor substrate, an opening which is opened on a base and an emitter is formed in the multilayer film, and after an SiGe/SiGeC film, which has a composition with a higher content of Si in an upper layer region and a lower layer region, and a higher content of Ge in an intermediate layer region, is formed on an entire surface, anisotropic dry etching is performed for the SiGe/SiGeC film up to a predetermined height of the opening.
    Type: Grant
    Filed: August 28, 2003
    Date of Patent: September 27, 2005
    Assignee: Fujitsu Limited
    Inventors: Fukashi Harada, Toshihiro Wakabayashi
  • Publication number: 20050186749
    Abstract: By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed of single crystal, other portions such as a sidewall portion are formed of polycrystalline, and a film thickness of the sidewall portion is less than or equal to 1.5 times the film thickness of the bottom portion. In this non-selective epitaxial growth, monosilane, hydrogen, diborane, and germane are used as source gases. Then, flow rates of monosilane and hydrogen are set to 20 sccm and 20 slm respectively. Also, a growth temperature is set to 650° C., a flow rate of diborane is set to 75 sccm, and a flow rate of germane is set to 35 sccm.
    Type: Application
    Filed: April 29, 2005
    Publication date: August 25, 2005
    Applicant: Fujitsu Limited
    Inventors: Hidekazu Sato, Toshihiro Wakabayashi
  • Patent number: 6903439
    Abstract: By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed of single crystal, other portions such as a sidewall portion are formed of polycrystalline, and a film thickness of the sidewall portion is less than or equal to 1.5 times the film thickness of the bottom portion. In this nonselective epitaxial growth, monosilane, hydrogen, diborane, and germane are used as source gases. Then, flow rates of monosilane and hydrogen are set to 20 sccm and 20 slm respectively. Also, a growth temperature is set to 650° C., a flow rate of diborane is set to 75 sccm, and a flow rate of germane is set to 35 sccm.
    Type: Grant
    Filed: September 22, 2003
    Date of Patent: June 7, 2005
    Assignee: Fujitsu Limited
    Inventors: Hidekazu Sato, Toshihiro Wakabayashi
  • Publication number: 20040056274
    Abstract: By a non-selective epitaxial growth method, an SiGe film is grown on the whole surface of a silicon oxide film so as to cover an inner wall of a base opening. Here, such film forming conditions are selected that, inside the base opening, a bottom portion is formed of single crystal, other portions such as a sidewall portion are formed of polycrystalline, and a film thickness of the sidewall portion is less than or equal to 1.5 times the film thickness of the bottom portion. In this nonselective epitaxial growth, monosilane, hydrogen, diborane, and germane are used as source gases. Then, flow rates of monosilane and hydrogen are set to 20 sccm and 20 slm respectively. Also, a growth temperature is set to 650° C., a flow rate of diborane is set to 75 sccm, and a flow rate of germane is set to 35 sccm.
    Type: Application
    Filed: September 22, 2003
    Publication date: March 25, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Hidekazu Sato, Toshihiro Wakabayashi
  • Publication number: 20040048440
    Abstract: On a multilayer film which is formed on a semiconductor substrate, an opening which is opened on a base and an emitter is formed in the multilayer film, and after an SiGe/SiGeC film, which has a composition with a higher content of Si in an upper layer region and a lower layer region, and a higher content of Ge in an intermediate layer region, is formed on an entire surface, anisotropic dry etching is performed for the SiGe/SiGeC film up to a predetermined height of the opening.
    Type: Application
    Filed: August 28, 2003
    Publication date: March 11, 2004
    Applicant: Fujitsu Limited
    Inventors: Fukashi Harada, Toshihiro Wakabayashi