Patents by Inventor Toshikazu Kawahara

Toshikazu Kawahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10984143
    Abstract: The purpose of the present invention is to provide a recipe creation device, with the goal of using past recipe data in order to highly efficiently create recipes. As an embodiment with which to achieve this goal, there is provided a recipe creation device comprising an arithmetic processing device that, on the basis of design data for a semiconductor element, establishes measurement conditions or inspection conditions by a semiconductor measurement device or a semiconductor inspection device, wherein the arithmetic processing device is configured to be able to access a database in which the measurement conditions or inspection conditions, and the pattern information of the semiconductor element, are stored in associated form, and the measurement conditions or inspection conditions are selected through a search using pattern information of the semiconductor element.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: April 20, 2021
    Assignee: Hitachi High-Tech Corporation
    Inventors: Hiromi Fujita, Toshikazu Kawahara, Yoshihiro Ota, Shigeki Sukegawa
  • Publication number: 20170371981
    Abstract: The purpose of the present invention is to provide a recipe creation device, with the goal of using past recipe data in order to highly efficiently create recipes. As an embodiment with which to achieve this goal, there is provided a recipe creation device comprising an arithmetic processing device that, on the basis of design data for a semiconductor element, establishes measurement conditions or inspection conditions by a semiconductor measurement device or a semiconductor inspection device, wherein the arithmetic processing device is configured to be able to access a database in which the measurement conditions or inspection conditions, and the pattern information of the semiconductor element, are stored in associated form, and the measurement conditions or inspection conditions are selected through a search using pattern information of the semiconductor element.
    Type: Application
    Filed: January 23, 2015
    Publication date: December 28, 2017
    Inventors: Hiromi FUJITA, Toshikazu KAWAHARA, Yoshihiro OTA, Shigeki SUKEGAWA
  • Publication number: 20160140287
    Abstract: A template creation device for a sample observation device for creating a template for image processing using design data includes a storage unit for storing process information in which information concerning a plurality of process processings is defined, and a template creation unit for processing the design data using the process information and creating the template for the image processing.
    Type: Application
    Filed: May 19, 2014
    Publication date: May 19, 2016
    Inventors: Yuki OJIMA, Shigeki SUKEGAWA, Yuichi ABE, Toshikazu KAWAHARA, Wataru NAGATOMO, Shinji KUBO
  • Patent number: 9211629
    Abstract: An object of the present invention is to improve the capability of lifting a substrate with the polishing performance of the substrate maintained. A polishing apparatus 100 includes a polishing table 110 to which a polishing pad 108 for polishing a substrate 102 is attached, a liquid feeding section configured to feed a liquid 109 to a polishing surface of the polishing pad 108, a top ring 116 configured to suck and convey the substrate 102 from the polishing surface, the substrate 102 being disposed on the polishing surface via the liquid 109 fed by the liquid feeding section, and a control section configured to inject a fluid (N2) into an internal area 109a of the liquid 109 interposed between the substrate 102 and the polishing pad 108.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: December 15, 2015
    Assignee: Ebara Corporation
    Inventor: Toshikazu Kawahara
  • Patent number: 9057873
    Abstract: In order to provide a technique for performing global alignment (detecting position shift and rotation of a wafer) stably and automatically using an optical microscope, as a pattern for global alignment, multiple alignment pattern candidates are calculated (107), multiple data for matching are created for each alignment pattern (108), matching is performed with respect to the data for matching for each alignment pattern in descending order of appropriateness as an alignment pattern with an image (113) based on an image signal from the optical microscope (114), and the amount of position shift and the amount of rotation of the wafer are calculated (116) on the basis of the results of matching (115).
    Type: Grant
    Filed: November 22, 2011
    Date of Patent: June 16, 2015
    Assignee: HITACHI HIGH-TECHNOLOGIES CORPORATION
    Inventors: Atsushi Miyamoto, Naoki Hosoya, Toshikazu Kawahara, Akihiro Onizawa
  • Publication number: 20150146967
    Abstract: The present invention relates to a setting method for an image capture area on the occasion of evaluation of a circuit pattern using a scanning charged particle microscope. A circuit pattern that is to be evaluated using an actual image or design data is determined, a plurality of image capture areas are set such that the circuit pattern to be evaluated is included in a section of the field of vision, and images are captured of the plurality of image capture areas. When setting the image capture areas, a permissible value for the distance between adjacent first and second images is set, and the positions of the image capture areas are optimized so as to correspond as closely as possible with the permissible value for distance. As a result, it is possible to improve the throughput of image capture of wide inspection areas that do not fit in the field of vision of the scanning charge particle microscope, and to efficiently carry out determination of an inspection area that may cause electrical failure.
    Type: Application
    Filed: April 24, 2013
    Publication date: May 28, 2015
    Inventors: Atsushi Miyamoto, Toshikazu Kawahara, Akihiro Onizawa, Yutaka Hojo
  • Publication number: 20140220864
    Abstract: An object of the present invention is to improve the capability of lifting a substrate with the polishing performance of the substrate maintained. A polishing apparatus 100 includes a polishing table 110 to which a polishing pad 108 for polishing a substrate 102 is attached, a liquid feeding section configured to feed a liquid 109 to a polishing surface of the polishing pad 108, a top ring 116 configured to suck and convey the substrate 102 from the polishing surface, the substrate 102 being disposed on the polishing surface via the liquid 109 fed by the liquid feeding section, and a control section configured to inject a fluid (N2) into an internal area 109a of the liquid 109 interposed between the substrate 102 and the polishing pad 108.
    Type: Application
    Filed: February 5, 2014
    Publication date: August 7, 2014
    Applicant: EBARA CORPORATION
    Inventor: Toshikazu KAWAHARA
  • Publication number: 20130234019
    Abstract: In order to provide a technique for performing global alignment (detecting position shift and rotation of a wafer) stably and automatically using an optical microscope, as a pattern for global alignment, multiple alignment pattern candidates are calculated (107), multiple data for matching are created for each alignment pattern (108), matching is performed with respect to the data for matching for each alignment pattern in descending order of appropriateness as an alignment pattern with an image (113) based on an image signal from the optical microscope (114), and the amount of position shift and the amount of rotation of the wafer are calculated (116) on the basis of the results of matching (115).
    Type: Application
    Filed: November 22, 2011
    Publication date: September 12, 2013
    Inventors: Atsushi Miyamoto, Naoki Hosoya, Toshikazu Kawahara, Akihiro Onizawa
  • Patent number: 8189040
    Abstract: There is provided a recipe generation apparatus and method for reducing the time required to reflect an optimal value and changed value in an input file by automatically reflecting a value obtained by optimizing an input file for recipe generation in the input file for recipe generation. This invention eliminates the inconvenience of manually reflecting changes in an input file for recipe generation by automatically reflecting changed values in the input file for recipe generation after editing a provisionally generated off-line recipe and achieves a reduction in processing time. This invention also provides a method for automatically generating an off-line recipe and a file for recipe generation from a recipe of a scanning electron microscope (see FIG. 3).
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: May 29, 2012
    Assignee: Hitachi High-Technologies Corporation
    Inventors: Hiromi Fujita, Hitoshi Komuro, Toshikazu Kawahara
  • Publication number: 20090062934
    Abstract: There is provided a recipe generation apparatus and method for reducing the time required to reflect an optimal value and changed value in an input file by automatically reflecting a value obtained by optimizing an input file for recipe generation in the input file for recipe generation. This invention eliminates the inconvenience of manually reflecting changes in an input file for recipe generation by automatically reflecting changed values in the input file for recipe generation after editing a provisionally generated off-line recipe and achieves a reduction in processing time. This invention also provides a method for automatically generating an off-line recipe and a file for recipe generation from a recipe of a scanning electron microscope (see FIG. 3).
    Type: Application
    Filed: July 29, 2008
    Publication date: March 5, 2009
    Applicant: Hitachi HIgh-Technologies Corporation
    Inventors: Hiromi FUJITA, Hitoshi Komuro, Toshikazu Kawahara