Patents by Inventor Toshikazu Wakabayashi

Toshikazu Wakabayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8531357
    Abstract: Protective layer (26) of front plate (20) of a plasma display panel has base protective layer (26a) and particle layer (26b). Base protective layer (26a) is formed of a thin film of metal oxide containing at least one of magnesium oxide, strontium oxide, calcium oxide, and barium oxide. Particle layer (26b) is formed by sticking, to base protective layer (26a), single crystal particles (27) of magnesium oxide having an NaCl crystal structure that is surrounded by a specified two-type orientation face formed of (100) face and (111) face or a specified three-type orientation face formed of (100) face, (110) face, and (111) face. The panel driving circuit drives the panel while temporally disposing the subfields so that the luminance weight monotonically decreases from a subfield in which an all-cell initializing operation is performed to the subfield immediately before the subfield in which its next all-cell initializing operation is performed.
    Type: Grant
    Filed: April 14, 2009
    Date of Patent: September 10, 2013
    Assignee: Panasonic Corporation
    Inventors: Mitsuhiro Murata, Yusuke Fukui, Toshikazu Wakabayashi, Hiroshi Asano
  • Patent number: 8531356
    Abstract: In a plasma display panel, a protective layer of a front plate is formed of a base protective layer and a particle layer. The base protective layer is a thin film of metal oxide containing at least one of magnesium oxide, strontium oxide, calcium oxide, and barium oxide. The particle layer is formed in a manner that single-crystal particles of magnesium oxide having a peak of emission intensity at 200-300 nm two times or higher than another peak of emission intensity at 300-550 nm in the emission spectrum in cathode luminescence emission are stuck on the base protective layer. A panel driving circuit drives the plasma display panel with a subfield structure in which subfields are temporally disposed so that a magnitude of luminance weight has a monotonous decrease from a subfield where an all-cell initializing operation is performed to a subfield where a next all-cell initializing operation is performed.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: September 10, 2013
    Assignee: Panasonic Corporation
    Inventors: Mitsuhiro Murata, Takuji Tsujita, Toshikazu Wakabayashi, Hiroshi Asano, Masaharu Terauchi
  • Patent number: 8508437
    Abstract: A plasma display device has a crystal particle made of MgO single crystal where the cathode luminescence emission spectrum exhibits a desired characteristic, and displays an image by a driving method in the initializing period. The initializing period has the first half for applying the voltage, which gradually increases from a first voltage and to a second voltage, to a second electrode, and the latter half for applying the voltage, which gradually decreases from a third voltage and to a fourth voltage.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: August 13, 2013
    Assignee: Panasonic Corporation
    Inventors: Mitsuhiro Murata, Takuji Tsujita, Masaharu Terauchi, Toshikazu Wakabayashi, Hiroshi Asano, Shinichiro Hashimoto, Keiji Akamatsu
  • Patent number: 8482490
    Abstract: In a plasma display device, a plurality of agglomerated particle groups in which a plurality of crystal particles made of a metal oxide agglomerate are disposed in the periphery of a protective layer thereof. The plasma display device is driven by the following driving method to display images. An initializing period has a first half of the initializing period in which a second electrode is applied with a voltage gradually rising from a first voltage to a second voltage, and a second half of the initializing period in which the second electrode is applied with a voltage gradually falling from a third voltage to a fourth voltage.
    Type: Grant
    Filed: March 27, 2009
    Date of Patent: July 9, 2013
    Assignee: Panasonic Corporation
    Inventors: Mitsuhiro Murata, Kaname Mizokami, Toshikazu Wakabayashi, Shinichiro Hashimoto, Keiji Akamatsu
  • Patent number: 8384622
    Abstract: The total number of the scan electrodes is divided into a first scan electrode group and a second scan electrode group. The first scan electrode group drive section for driving the first scan electrode group produces a selection potential and a non-selection potential in the scan period, and supplies scan pulses based on the two potentials in the first half of the scan period. The complex switch section supplies the selection potential produced using the first scan electrode group drive section to the second scan electrode group drive section for driving the second scan electrode group in the latter half of the scan period. The second scan electrode group drive section supplies scan pulses based on the input selection potential.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: February 26, 2013
    Assignee: Panasonic Corporation
    Inventors: Yasuhiro Arai, Keiji Akamatsu, Toshikazu Wakabayashi, Mitsuhiro Murata
  • Patent number: 8362979
    Abstract: In a plasma display panel, a protective layer of a front plate includes a base protective layer and a particle layer. The base protective layer is formed of a thin film containing magnesium oxide. The particle layer is formed by sticking, to base protective layer, agglomerated particles in which a plurality of single-crystal particles of magnesium oxide are agglomerated. A panel driving circuit drives the panel in a manner that subfields are temporally disposed so that a luminance weight is monotonically decreased from a subfield in which an all-cell initializing operation is performed to a subfield immediately preceding a subfield in which a next all-cell initializing operation is performed.
    Type: Grant
    Filed: April 13, 2009
    Date of Patent: January 29, 2013
    Assignee: Panasonic Corporation
    Inventors: Mitsuhiro Murata, Kaname Mizokami, Toshikazu Wakabayashi
  • Publication number: 20110141072
    Abstract: The present invention provides a plasma display panel driving method and a plasma display device, each of which is capable of securing image quality and realizing an improvement of a drive margin and a reduction in power consumption even in the case of an ultra high definition panel. The present invention divides a plurality of display electrode pairs into a plurality of display electrode pair groups. For each of the display electrode pair groups, the present invention divides one field period into a plurality of sub-fields, each including an address period and a sustain period, such that the address periods with respect to the display electrode pair groups do not overlap one another, the address period being a period in which an address process of causing address discharge in the discharge cell which should emit light is carried out, the sustain period being a period in which first and second sustain pulses are applied to a scan electrode and a sustain electrode.
    Type: Application
    Filed: June 2, 2010
    Publication date: June 16, 2011
    Inventors: Hiroyasu Makino, Toshikazu Wakabayashi, Satoshi Kominami, Yasuhiro Arai, Masumi Izuchi, Junko Matsushita
  • Publication number: 20110134105
    Abstract: In a driving method of a plasma display panel of the present invention, plural display electrode pairs are divided into plural display electrode pair groups and one field is divided into plural sub-fields. The length of the sustain period is compared to the length of the erase period. If the sustain period is longer than the erase period, sustain discharge and erase discharge are performed for each of the display electrode pair groups, while if the sustain period is shorter than the erase period, sustain discharge and erase discharge of one display electrode pair group are synchronized with those of another display electrode pair group. For a sub-field with a largest luminance weight or a sub-field with a highest lighting ratio, sustain discharge and erase discharge of one display electrode pair group are synchronized with those of another display electrode pair group without fail.
    Type: Application
    Filed: June 15, 2010
    Publication date: June 9, 2011
    Inventors: Hideki Nakata, Hiroyasu Makino, Yasuhiro Arai, Toshikazu Wakabayashi, Satoshi Kominami, Masumi Izuchi, Junko Matsushita
  • Publication number: 20110090211
    Abstract: A simple, low cost drive circuit secures a sufficient number of subfields in a high resolution panel. The plasma display panel drive circuit groups plural sustain electrodes into first and second sustain electrode groups, and applies sustain pulses in the sustain period. The first and second sustain pulse generating circuits generate and apply sustain pulses to first and second electrode paths. First and second specific voltage application circuits apply a first specific voltage to the first and second electrode paths. The voltage selection circuit selects one of a plurality of voltages including at least a second specific voltage and a third specific voltage, and generates a selected voltage. The first and second sustain pulse generating circuits generate the sustain pulses based on the second specific voltage when the selected voltage is the second specific voltage, and when the selected voltage is the third specific voltage, apply the third specific voltage to the first and second electrode paths.
    Type: Application
    Filed: June 23, 2009
    Publication date: April 21, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Yasuhiro Arai, Toshikazu Wakabayashi, Satoshi Kominami, Masumi Izuchi, Junko Matsushita, Hiroyasu Makino, Hideki Nakata
  • Publication number: 20110084957
    Abstract: A plasma display panel drive circuit assures a sufficient number of subfields in a high resolution panel, is low cost, and is resistant to producing brightness differences. The plasma display panel drive circuit segments plural sustain electrodes into a first sustain electrode group and second sustain electrode group, applies sustain pulses in the sustain period, and includes the following devices: a sustain pulse generating circuit that generates sustain pulses; a specific voltage application circuit that applies a specific voltage to a first electrode path to the first sustain electrode group, and a second electrode path to the second sustain electrode group, at respective specific times; and a separation switch circuit that is connected between the sustain pulse generating circuit and the first electrode path and second electrode path, and electrically isolates the sustain pulse generating circuit from either the first electrode path or the second electrode path.
    Type: Application
    Filed: December 16, 2010
    Publication date: April 14, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Yasuhiro ARAI, Toshikazu WAKABAYASHI, Satoshi KOMINAMI, Masumi IZUCHI, Junko MATSUSHITA, Hiroyasu MAKINO, Hideki NAKATA
  • Publication number: 20110057911
    Abstract: A plurality of display electrode pairs are divided into two display electrode pair groups I and II. One field is divided into M (M is an integer of 2 or more) sub-fields SFL (L=1 to M) each including a wall voltage adjusting period, an address period, and a sustain period. Based on a sustain period T1 of a K-th sub-field SFK and a wall voltage adjusting period T2 positioned between the sustain period T1 and the address period of a (K+1)-th sub-field, if T1>T2, a first driving method in which the sustain period T1 and the wall voltage adjusting period T2 are set for each of the display electrode pair groups I and II is used in the sub-field SFK, and if T1<T2, a second driving method in which the sustain periods T1 are set so as to be synchronized with each other and the wall voltage adjusting periods T2 are set so as to be synchronized with each other among the display electrode pair groups I and II is used in the sub-field SFK.
    Type: Application
    Filed: May 14, 2009
    Publication date: March 10, 2011
    Inventors: Hiroyasu Makino, Toshikazu Wakabayashi, Satoshi Kominami, Yasuhiro Arai, Masumi Izuchi, Junko Matsushita, Hideki Nakata
  • Publication number: 20110037792
    Abstract: An object is to provide a method for driving a PDP, which may be a super high-definition panel, and a PDP device capable of assuring the sufficient number of subfields to maintain the image quality and displaying images with the sufficient luminance. To achieve the above object, one field period is divided into a plurality of subfields each having an address period and a sustain period. A plurality of display electrode pairs are divided in to a plurality N of display electrode pair groups. A start time point of a subfield is set for each display electrode pair group. When a time required for performing one address operation on all the discharge cells of the panel is represented by Tw, the time length of a sustain period of each of the subfields in each of the display electrode pair groups is defined not to exceed Tw×(N?1)/N.
    Type: Application
    Filed: April 10, 2009
    Publication date: February 17, 2011
    Inventors: Toshikazu Wakabayashi, Satoshi Kominami, Masumi Izuchi, Yasuhiro Arai, Junko Matsushita, Hiroyasu Makino
  • Publication number: 20110001425
    Abstract: In a plasma display device, a plurality of agglomerated particle groups in which a plurality of crystal particles made of a metal oxide agglomerate are disposed in the periphery of a protective layer thereof. The plasma display device is driven by the following driving method to display images. An initializing period has a first half of the initializing period in which a second electrode is applied with a voltage gradually rising from a first voltage to a second voltage, and a second half of the initializing period in which the second electrode is applied with a voltage gradually falling from a third voltage to a fourth voltage.
    Type: Application
    Filed: March 27, 2009
    Publication date: January 6, 2011
    Inventors: Mitsuhiro Murata, Kaname Mizokami, Toshikazu Wakabayashi, Shinichiro Hashimoto, Keiji Akamatsu
  • Publication number: 20100321371
    Abstract: A method of driving a plasma display panel of the present invention, is a driving method of a display panel including plural display electrode pairs (24) each including a scan electrode (22) and a sustain electrode (23) extending along each other, plural data electrodes (32) crossing the plural display electrode pairs (24) and discharge cells respectively formed at positions where the display electrode pairs (24) and the data electrodes (32) cross each other.
    Type: Application
    Filed: June 4, 2009
    Publication date: December 23, 2010
    Inventors: Satoshi Kominami, Toshikazu Wakabayashi, Masumi Izuchi, Junko Matsushita, Yasuhiro Arai, Hiroyasu Makino
  • Publication number: 20100259534
    Abstract: A plasma display device has a plasma display panel and a panel driving circuit for driving the panel. The panel driving circuit drives the panel in a manner that a period for causing an address discharge in all discharge cells is disposed in the address period, or before the address period of a subfield, and the subfield (first SF) is interposed at predetermined time intervals.
    Type: Application
    Filed: April 13, 2009
    Publication date: October 14, 2010
    Inventors: Mitsuhiro Murata, Yasuhiro Arai, Toshikazu Wakabayashi, Hiroyasu Makino
  • Publication number: 20100253655
    Abstract: A protective layer of a plasma display panel has a base protective layer formed of a thin film containing metal oxide, and a particle layer formed by sticking, to the base protective layer, agglomerated particles where single crystal particles of magnesium oxide are agglomerated. A panel driving circuit drives the panel by forming one field period by temporally arranging a second subfield group after a first subfield group. The first subfield group has subfields having initializing period Ti for producing wall charge for causing an address discharge, address period Tw for producing wall charge for causing a sustain discharge, and sustain period Ts for causing a sustain discharge to emit light in the discharge cells. The second subfield group has subfields having address period Tw for erasing wall charge for causing a sustain discharge and sustain period Ts for causing a sustain discharge to emit light in the discharge cells.
    Type: Application
    Filed: April 13, 2009
    Publication date: October 7, 2010
    Inventors: Mitsuhiro Murata, Kaname Mizokami, Toshikazu Wakabayashi
  • Publication number: 20100225671
    Abstract: The present invention aims to improve a low gradation expression ability by reducing the brightness of the 1st gradation level to about 1.05 cd/m2 of the intermediate brightness between the 0th gradation level and the 2nd gradation level at the time of driving a PDP. During a sustain erase period (P13) of a subfield (SF1) with the smallest brightness weight among a plurality of subfields (SF), a positive voltage (Vbk) that is smaller than a voltage (Vsus) applied during a sustain period (P23) of other SFs is applied to scan electrodes. Also, during the sustain erase period (P13) of SF1, a positive voltage (Vda) is applied to address electrodes or a positive voltage (Vda) is applied to the address electrodes during at least one period of a voltage rising period (T11) of an all-cell reset period (P11).
    Type: Application
    Filed: January 21, 2008
    Publication date: September 9, 2010
    Inventors: Hiroyasu Makino, Toshikazu Wakabayashi, Seiji Minami
  • Publication number: 20100214329
    Abstract: The protective layer of the plasma display device is formed of a base protective layer and a particle layer. The base protective layer is a thin film of magnesium oxide containing at least one of magnesium oxide, strontium oxide, calcium oxide, and barium oxide. The particle layer is formed in a manner that magnesium-oxide single-crystal particles, which have a structure surrounded by the specified two-type orientation face formed of (100) and (111) faces or the specified three-type orientation face formed of (100), (110), and (111) faces, are stuck to the base protective layer. The panel driving circuit drives the panel in a manner that one field period is formed of a first subfield group having a plurality of subfields and a second subfield group having a plurality of subfields temporally disposed after the first subfield group. Each subfield of the first subfield group has initializing period Ti, address period Tw for forming wall charge to generate a sustain discharge, and sustain period Ts.
    Type: Application
    Filed: April 14, 2009
    Publication date: August 26, 2010
    Inventors: Mitsuhiro Murata, Yusuke Fukui, Toshikazu Wakabayashi, Hiroshi Asano
  • Publication number: 20100177084
    Abstract: A plasma display device has a crystal particle made of MgO single crystal where the cathode luminescence emission spectrum exhibits a desired characteristic, and displays an image by a driving method in the initializing period. The initializing period has the first half for applying the voltage, which gradually increases from a first voltage and to a second voltage, to a second electrode, and the latter half for applying the voltage, which gradually decreases from a third voltage and to a fourth voltage.
    Type: Application
    Filed: April 13, 2009
    Publication date: July 15, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Mitsuhiro Murata, Takuji Tsujita, Masaharu Terauchi, Toshikazu Wakabayashi, Hiroshi Asano, Shinichiro Hashimoto, Keiji Akamatsu
  • Publication number: 20100149220
    Abstract: The total number of the scan electrodes is divided into a first scan electrode group and a second scan electrode group. The first scan electrode group drive section for driving the first scan electrode group produces a selection potential and a non-selection potential in the scan period, and supplies scan pulses based on the two potentials in the first half of the scan period. The complex switch section supplies the selection potential produced using the first scan electrode group drive section to the second scan electrode group drive section for driving the second scan electrode group in the latter half of the scan period. The second scan electrode group drive section supplies scan pulses based on the input selection potential.
    Type: Application
    Filed: December 20, 2007
    Publication date: June 17, 2010
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD
    Inventors: Yasuhiro Arai, Keiji Akamatsu, Toshikazu Wakabayashi, Mitsuhiro Murata