Abstract: A wiring substrate includes an insulating layer, and a conductor layer formed on a surface of the insulating layer and including wiring patterns such that the conductor layer has a polished surface on the opposite side with respect to the insulating layer and includes an upper layer including a plating film and a lower layer including a seed layer for the plating film and directly formed on the surface of the insulating layer. The conductor layer is formed such that a ratio of a thickness of the lower layer to a thickness of the conductor layer is 2.5% or less, the wiring patterns have the minimum wiring width of 5 ?m or less and the minimum inter-wiring distance of 7 ?m or less, and each of the wiring patterns has an aspect ratio in a range of 2.0 to 4.0.

Abstract: A wiring substrate includes a first build-up part includes first insulating layers, first conductor layers and first via conductors, and a second build-up part laminated to the first build-up part and including second insulating layers, second conductor layers and second via conductors. The first conductor layers in the first build-up part and the second conductor layers in the second build-up part include wirings such that a wiring width and an inter-wiring distance of the wirings in the first conductor layers are smaller than a wiring width and an inter-wiring distance of the wirings in the second conductor layers, an aspect ratio of the wirings in the first conductor layers is in the range of 2.0 to 4.0, the wiring width of the wirings in the first conductor layers is 3 ?m or less, and the inter-wiring distance of the wirings in the first conductor layers is 3 ?m or less.

Abstract: A wiring substrate includes a core substrate; a first build-up part including first conductor layers, a second build-up part including second conductor layers, a third build-up part including third conductor layers and having the outermost surface of the wiring substrate, and a fourth build-up part including one or more fourth conductor layers and having the outermost surface of the wiring substrate. The minimum wiring width of wirings in the third conductor layers is smaller than that of wirings in the first, second and fourth conductor layers. The minimum inter-wiring distance of the wirings in the third conductor layers is smaller than that of the wirings in the first, second and fourth conductor layers. The wirings in the third conductor layers have the minimum wiring width of 3 ?m or less, the minimum inter-wiring distance of 3 ?m or less, and an aspect ratio in the range of 2.0 to 4.0.

Abstract: A wiring substrate includes insulating layers, conductor layers formed on the insulating layers, and via conductors formed in the insulating layers such that the via conductors are connecting the conductor layers through the insulating layers. The conductor layers include a first conductor layer and the outermost conductor layer formed such that the outermost conductor layer includes first conductor pads positioned to mount a first component and second conductor pads positioned to mount a second component and that the first conductor layer includes wiring patterns including first wiring patterns connecting the first conductor pads and second conductor pads, and the first conductor layer in the conductor layers is formed such that the wiring patterns have the minimum wiring width of 3 ?m or less, the minimum inter-wiring distance of 3 ?m or less and an aspect ratio in the range of 2.0 to 4.0.

Abstract: A wiring substrate includes a first insulating layer, a conductor layer formed on the first insulating layer and including a wiring pattern, an organic coating film formed on the conductor layer such that the organic coating film is formed on the wiring pattern of the conductor layer, and a second insulating layer formed on the first insulating layer such that the second insulating layer is covering the conductor layer. The conductor layer is formed such that the wiring pattern has a polished surface on the opposite side with respect to the first insulating layer, and the organic coating film is formed on the wiring pattern of the conductor layer such that the organic coating film is covering the polished surface of the wiring pattern.

Abstract: A wiring substrate includes a core substrate, a first build-up part formed on a first surface of the substrate and including insulating layers and conductor layers, and a second build-up part formed on a second surface of the substate on the opposite side with respect to the first surface and including insulating layers and conductor layers. The first build-up part includes a first region and a second region such that a distance between adjacent conductor layers in the second region is smaller than a distance between adjacent conductor layers in the first region, the conductor layers in the second region include second wirings having the minimum wiring width and the minimum inter-wiring distance that are smaller than the minimum wiring width and the minimum inter-wiring distance of first wirings of the conductor layers in the first region and the insulating layers are continuous in the first region and second region.

Abstract: A wiring substrate includes an insulating layer, a first conductor layer formed on the insulating layer and including a first wiring and a second wiring formed adjacent to the first wiring, and a second conductor layer on the opposite side with respect to first conductor layer such that the insulating layer is covering the second conductor layer. The first conductor layer is formed such that each of the first wiring and the second wiring has an aspect ratio in the range of 2.0 to 4.0 and a wiring width of 5 ?m or less and that the first wiring and the second wiring are separated by the distance of 7 ?m or less, and the first conductor layer includes a seed layer formed on the insulating layer, and an electrolytic plating film formed on the seed layer.

Abstract: A wiring substrate includes a first conductor layer including wirings, an interlayer insulating layer formed on and covering the first conductor layer, a wiring layer formed in the interlayer insulating layer and including wirings, a second conductor layer formed on the interlayer insulating layer and including wirings, and a via conductor formed in the interlayer insulating layer such that the via conductor is penetrating through the interlayer insulating layer and connecting the first and second conductor layers. The interlayer insulating layer includes first and second insulating layers such that the wiring layer is formed on a surface of the first insulating layer, and the wiring layer is formed such that an aspect ratio of the wirings in the wiring layer is in the range of 2.0 to 6.0 and that aspect ratios of the wirings in the first and second conductor layers are in the range of 1.0 to 2.0.

Abstract: A wiring substrate includes a first conductor layer including wirings, an interlayer insulating layer formed on the first conductor layer and covering the first conductor layer, a second conductor layer formed on the interlayer insulating layer and including wirings, a via conductor formed in the interlayer insulating layer such that the via conductor is penetrating through the interlayer insulating layer and connecting the first conductor layer and the second conductor layer, and a wiring part formed in the interlayer insulating layer and including an embedded wiring layer filling one or more grooves formed in the interlayer insulating layer. The interlayer insulating layer includes a first insulating layer and a second insulating layer laminated on the first insulating layer, and the embedded wiring layer is formed in the first insulating layer on a side facing the second insulating layer and filling the groove or grooves formed in the first insulating layer.

Abstract: A wiring substrate includes a first insulating layer, a conductor layer including first and second pads, a second insulating layer having first openings exposing the first pads and a second opening exposing the second pads, metal posts formed on the first pads and filling the first openings, and a wiring structure positioned in the second opening and having first and second connection pads such that the second connection pads are connected to the second pads. The upper surfaces of the first connection pads and the upper surfaces of the metal posts form a component mounting surface having first, second and third regions, the first connection pads are formed in the first, second and third regions and include a group of first connection pads formed in the first and second regions and electrically connected and a group of first connection pads formed in the first and third regions and electrically connected.

Abstract: A wiring substrate includes a first insulating layer, a conductor layer including first and second conductor pads, a second insulating layer having an opening exposing the second conductor pads, and a wiring structure including a resin insulating layer and a wiring layer and formed in the opening of the second insulating layer. The wiring structure has first surface side connection pads, second surface side connection pads and electrically connected to the second conductor pads of the conductor layer, and conductors that electrically connect the first surface side connection pads and the second surface side connection pads, the first surface side connection pads form a component mounting surface having first and second component mounting region, and the first surface side connection pads include a group of pads in the first region and a group of pads in the second region electrically connected to the group of pads in the first region.

Abstract: A vehicle controller includes a processor configured to: detect a lane being traveled by the vehicle, set a planned trajectory to be traveled by the vehicle along the detected lane, detect a lane line demarcating the lane being traveled by the vehicle and an obstacle in an area around the vehicle, identify an effective section of the planned trajectory, the effective section being a section in which the planned trajectory and the detected lane line match, and control motion of the vehicle to avoid a collision between the obstacle and the vehicle in the case that the obstacle is located in the effective section and on the planned trajectory.

Abstract: A printed wiring board includes a core laminate including insulating layers and conductor layers, a first build-up layer formed on first surface of the laminate and including first interlayer resin and conductor layers, and a second build-up layer formed on second surface of the core laminate on the opposite side and including second interlayer resin and conductor layers. The conductor layers in the laminate include first and second conductor layers such that the first conductor layer is embedded in one of the insulating layers forming the first surface of the laminate and has an exposed surface exposed from the insulating layer and that the second conductor layer is formed on one of the insulating layers forming the second surface of the laminate, and the first interlayer resin layer has thickness greater than thickness of the second interlayer resin layer.

Abstract: A printed wiring board includes a core substrate having cavity to accommodate an electronic component and including a front conductor layer formed on front side of the core substrate, and a back conductor layer formed on back side of the core substrate, through-hole conductors formed through the core substrate such that the through-hole conductors connect the front and back conductor layers of the core substrate, a front build-up layer formed on front surface of the core substrate and including interlayer insulating layers and conductor layers, and a back build-up layer formed on back surface of the core substrate and including interlayer insulating layers and conductor layers. The conductor layers in the front build-up layer include a conductor layer sandwiching one of the interlayer insulating layers with the front conductor layer such that the conductor layer and the front conductor layer have the same electric potential in region surrounding the cavity.

Abstract: A printed wiring board includes a core substrate having cavity to accommodate an electronic component and including a front conductor layer formed on front side of the core substrate, and a back conductor layer formed on back side of the core substrate, through-hole conductors formed through the core substrate such that the through-hole conductors connect the front and back conductor layers of the core substrate, a front build-up layer formed on front surface of the core substrate and including interlayer insulating layers and conductor layers, and a back build-up layer formed on back surface of the core substrate and including interlayer insulating layers and conductor layers. The conductor layers in the front build-up layer include a conductor layer sandwiching one of the interlayer insulating layers with the front conductor layer such that the conductor layer and the front conductor layer have the same electric potential in region surrounding the cavity.

Abstract: A shield cap for protecting an electronic component includes a cap member having a side wall portion and a ceiling portion, and a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves. The side wall and ceiling portions are forming accommodation space to accommodate electronic component, the ceiling portion has a first surface facing the space and a second surface on the opposite side, the side wall portion has a third surface facing the ceiling portion, a fourth surface on the opposite side, a fifth surface facing the space, and a sixth surface on the opposite side, and the side wall portion is formed such that the sixth surface has a first inclined portion increasing distance to the space from the third toward fourth surfaces and a second inclined portion increasing distance to the space from the fourth toward third surfaces.

Abstract: A printed wiring board includes a core substrate, a first resin insulating layer formed on a first surface of the core substrate, a second resin insulating layer formed on a second surface of the core substrate on the opposite side of the first surface, an electronic component accommodated in opening portion formed in the core substrate, and a filling resin filling space formed between the electronic component and an inner wall of the opening portion and including resin material that is different from resin material forming the first and second resin insulating layers. The core substrate has a first conductor pattern forming a first outermost layer of the core substrate and a second conductor pattern forming a second outermost layer of the core substrate on the opposite side of the first conductor pattern, and the filling resin is filling spaces formed in the second conductor pattern of the core substrate.

Abstract: A printed wiring board includes a first conductor layer forming an inner conductor layer, a second conductor layer forming a first outemiost conductor layer, a third conductor layer forming a second outermost conductor layer, insulating layers including first and second insulating layers, first via conductors connecting the first and second conductor layers, and second via conductors connecting the first and third conductor layers. The first conductor layer has thickness greater than thicknesses of the second and third conductor layers, the second conductor layer includes component mounting pads positioned to mount an electronic component on the second conductor layer and extending outside component mounting region corresponding to projection region of the component, and the first via conductors include a first set of the first via conductors formed directly underneath the component mounting region and a second set of the first via conductors formed on outer side of the component mounting region.

Abstract: A shield cap for protecting an electronic component includes a cap member having a side wall portion and a ceiling portion, a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves, and a metal layer formed on a portion of the side wall portion such that the metal layer is interposed between the conductive film and the portion of the side wall portion. The side wall and ceiling portions are forming an accommodation space to accommodate an electronic component, and the metal layer is formed on a surface of the side wall portion on the opposite side of a surface of the side wall portion facing the ceiling portion and interposed between the conductive film and the side wall portion.

Abstract: A shield cap for protecting an electronic component includes a cap member having a side wall portion and a ceiling portion, and a conductive film formed on the cap member such that the conductive film is formed to shield electromagnetic waves. The ceiling portion includes a resin material and a reinforcing material, and the cap member is formed such that the side wall portion and the ceiling portion are forming an accommodation space to accommodate an electronic component.