Patents by Inventor Toshimasa Yamamoto
Toshimasa Yamamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150084124Abstract: A semiconductor device includes a semiconductor substrate having an element region and a termination region. The element region includes a first body region having a first conductivity type, a first drift region having a second conductivity type, and first floating regions having the first conductivity type. The termination region includes FLR regions, a second drift region and second floating regions. The FLR regions have the first conductivity type and surrounds the element region. The second drift region has the second conductivity type, makes contact with and surrounds the FLR regions. The second floating regions have the first conductivity type and is surrounded by the second drift region. The second floating regions surround the element region. At least one of the second floating regions is placed at an element region side relative to the closest one of the FLR regions to the element region.Type: ApplicationFiled: September 19, 2014Publication date: March 26, 2015Inventors: Jun SAITO, Sachiko AOI, Yukihiko WATANABE, Toshimasa YAMAMOTO
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Patent number: 8975139Abstract: A manufacturing method of a silicon carbide semiconductor device includes: forming a drift layer on a silicon carbide substrate; forming a base layer on or in a surface portion of the drift layer; forming a source region in a surface portion of the base layer; forming a trench to penetrate the base layer and to reach the drift layer; forming a gate electrode on a gate insulation film in the trench; forming a source electrode electrically connected to the source region and the base layer; and forming a drain electrode on a back surface of the substrate. The forming of the trench includes: flattening a substrate surface; and etching to form the trench after flattening.Type: GrantFiled: September 4, 2012Date of Patent: March 10, 2015Assignees: DENSO CORPORATION, Toyota Jidosha Kabushiki KaishaInventors: Shinichiro Miyahara, Toshimasa Yamamoto, Hidefumi Takaya, Masahiro Sugimoto, Yukihiko Watanabe, Narumasa Soejima, Tsuyoshi Ishikawa
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Publication number: 20150041887Abstract: A semiconductor device includes a first semiconductor layer surrounding a bottom of the trench gate, a second semiconductor layer disposed along one of end portions of the trench gate in a longitudinal direction of the trench gate, one of end portions of the second semiconductor layer contacting the body layer and the other of the end portions of the second semiconductor layer contacting the first semiconductor layer, and a connecting layer, one of end portions of the connecting layer being connected to the body layer and the other of the end portions of the connecting layer being connected to the first semiconductor layer, the connecting layer contacting the second semiconductor layer, and the connecting layer being separated from the one of the end portions of the trench gate in the longitudinal direction of the trench gate by the second semiconductor layer.Type: ApplicationFiled: November 21, 2012Publication date: February 12, 2015Applicant: TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Akitaka SOENO, Toshimasa YAMAMOTO
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Publication number: 20140346592Abstract: A vertical MOSFET includes: a semiconductor substrate comprising a drain layer, a drift layer, a body layer, and a source layer; and a trench gate penetrating through the source layer and the body layer from an upper surface of the semiconductor substrate and reaching the drift layer. The trench gate includes a gate electrode; a first insulating film disposed on a bottom surface of a trench formed in the semiconductor substrate; a second insulating film disposed at least on a side surface of the trench, and in contact with the body layer; and a third insulating film disposed between the gate electrode and the second insulating film, and formed of a material of which dielectric constant is higher than a dielectric constant of the second insulating film.Type: ApplicationFiled: December 6, 2012Publication date: November 27, 2014Applicants: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Akitaka Soeno, Toshimasa Yamamoto, Yukihiko Watanabe
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Patent number: 8748975Abstract: A switching element is provided having a semiconductor substrate. A trench gate electrode is formed in the upper surface of the semiconductor substrate. An n-type first semiconductor region, a p-type second semiconductor region, and an n-type third semiconductor region are formed in a region in contact with a gate insulating film in the semiconductor substrate. At a position below the second semiconductor region, there is formed a p-type fourth semiconductor region connected to the second semiconductor region and opposing the gate insulating film via the third semiconductor region and containing boron. A high-concentration-carbon containing region having a carbon concentration higher than that of a semiconductor region exposed on the lower surface of the semiconductor substrate is formed in at least a part of the portion of the third semiconductor region, positioned between the fourth semiconductor region and the gate insulating film, that is in contact with the fourth semiconductor region.Type: GrantFiled: December 12, 2012Date of Patent: June 10, 2014Assignees: Toyota Jidosha Kabushiki Kaisha, Denso CorporationInventors: Hirokazu Fujiwara, Yukihiko Watanabe, Narumasa Soejima, Toshimasa Yamamoto, Yuichi Takeuchi
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Patent number: 8710586Abstract: A SiC semiconductor device includes: a substrate, a drift layer, and a base region stacked in this order; first and second source regions and a contact layer in the base region; a trench penetrating the source and base regions; a gate electrode in the trench; an interlayer insulation film with a contact hole covering the gate electrode; a source electrode coupling with the source region and the contact layer via the contact hole; a drain electrode on the substrate; and a metal silicide film. The high concentration second source region is shallower than the low concentration first source region, and has a part covered with the interlayer insulation film, which includes a low concentration first portion near a surface and a high concentration second portion deeper than the first portion. The metal silicide film on the second part has a thickness larger than the first portion.Type: GrantFiled: September 12, 2011Date of Patent: April 29, 2014Assignees: DENSO CORPORATION, Toyota Jidosha Kabushiki KaishaInventors: Toshimasa Yamamoto, Masahiro Sugimoto, Hidefumi Takaya, Jun Morimoto, Narumasa Soejima, Tsuyoshi Ishikawa, Yukihiko Watanabe
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Publication number: 20130330896Abstract: A manufacturing method of a silicon carbide semiconductor device includes: forming a drift layer on a silicon carbide substrate; forming a base layer on or in a surface portion of the drift layer; forming a source region in a surface portion of the base layer; forming a trench to penetrate the base layer and to reach the drift layer; forming a gate electrode on a gate insulation film in the trench; forming a source electrode electrically connected to the source region and the base layer; and forming a drain electrode on a back surface of the substrate. The forming of the trench includes: flattening a substrate surface; and etching to form the trench after flattening.Type: ApplicationFiled: September 4, 2012Publication date: December 12, 2013Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATIONInventors: Shinichiro Miyahara, Toshimasa Yamamoto, Hidefumi Takaya, Masahiro Sugimoto, Yukihiko Watanabe, Narumasa Soejima, Tsuyoshi Ishikawa
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Publication number: 20130146969Abstract: A switching element is provided having a semiconductor substrate. A trench gate electrode is formed in the upper surface of the semiconductor substrate. An n-type first semiconductor region, a p-type second semiconductor region, and an n-type third semiconductor region are formed in a region in contact with a gate insulating film in the semiconductor substrate. At a position below the second semiconductor region, there is formed a p-type fourth semiconductor region connected to the second semiconductor region and opposing the gate insulating film via the third semiconductor region and containing boron. A high-concentration-carbon containing region having a carbon concentration higher than that of a semiconductor region exposed on the lower surface of the semiconductor substrate is formed in at least a part of the portion of the third semiconductor region, positioned between the fourth semiconductor region and the gate insulating film, that is in contact with the fourth semiconductor region.Type: ApplicationFiled: December 12, 2012Publication date: June 13, 2013Inventors: Hirokazu FUJIWARA, Yukihiko WATANABE, Narumasa SOEJIMA, Toshimasa YAMAMOTO, Yuichi TAKEUCHI
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Publication number: 20130105889Abstract: A method for manufacturing a switching device, which includes a trench type gate electrode and first to fourth semiconductor regions, is provided. The first semiconductor region is in contact with a gate insulating film and is of n-type. The second semiconductor region is in contact with the gate insulating film, and is of p-type. The third semiconductor region is in contact with the gate insulating film, and is of n-type. The fourth semiconductor region is a p-type semiconductor region which is positioned in a range deeper than the second semiconductor region and consecutive with the second semiconductor region, and which faces the gate insulating film via the third semiconductor region. The manufacturing method includes forming the second semiconductor region in which aluminum is doped, and implanting boron into a range in which the fourth semiconductor region is to be formed in the semiconductor substrate.Type: ApplicationFiled: September 14, 2012Publication date: May 2, 2013Applicants: DENSO CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHAInventors: Hirokazu FUJIWARA, Hisashi ISHIMABUSHI, Yukihiko WATANABE, Narumasa SOEJIMA, Toshimasa YAMAMOTO, Yuuichi TAKEUCHI
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Publication number: 20120061682Abstract: A SiC semiconductor device includes: a substrate, a drift layer, and a base region stacked in this order; first and second source regions and a contact layer in the base region; a trench penetrating the source and base regions; a gate electrode in the trench; an interlayer insulation film with a contact hole covering the gate electrode; a source electrode coupling with the source region and the contact layer via the contact hole; a drain electrode on the substrate; and a metal silicide film. The high concentration second source region is shallower than the low concentration first source region, and has a part covered with the interlayer insulation film, which includes a low concentration first portion near a surface and a high concentration second portion deeper than the first portion. The metal silicide film on the second part has a thickness larger than the first portion.Type: ApplicationFiled: September 12, 2011Publication date: March 15, 2012Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATIONInventors: Toshimasa Yamamoto, Masahiro Sugimoto, Hidefumi Takaya, Jun Morimoto, Narumasa Soejima, Tsuyoshi Ishikawa, Yukihiko Watanabe
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Patent number: 7825449Abstract: An SiC semiconductor device and a related manufacturing method are disclosed having a structure provided with a p+-type deep layer formed in a depth equal to or greater than that of a trench to cause a depletion layer between at a PN junction between the p+-type deep layer and an n?-type drift layer to extend into the n?-type drift layer in a remarkable length, making it difficult for a high voltage, resulting from an adverse affect arising from a drain voltage, to enter a gate oxide film. This results in a capability of minimizing an electric field concentration in the gate oxide film, i.e., an electric field concentration occurring at the gate oxide film at a bottom wall of the trench.Type: GrantFiled: October 30, 2008Date of Patent: November 2, 2010Assignee: DENSO CORPORATIONInventors: Naohiro Suzuki, Yuuichi Takeuchi, Takeshi Endo, Eiichi Okuno, Toshimasa Yamamoto
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Publication number: 20090114969Abstract: An SiC semiconductor device and a related manufacturing method are disclosed having a structure provided with a p+-type deep layer formed in a depth equal to or greater than that of a trench to cause a depletion layer between at a PN junction between the p+-type deep layer and an n?-type drift layer to extend into the n?-type drift layer in a remarkable length, making it difficult for a high voltage, resulting from an adverse affect arising from a drain voltage, to enter a gate oxide film. This results in a capability of minimizing an electric field concentration in the gate oxide film, i.e., an electric field concentration occurring at the gate oxide film at a bottom wall of the trench.Type: ApplicationFiled: October 30, 2008Publication date: May 7, 2009Applicant: DENSO CORPORATIONInventors: Naohiro Suzuki, Yuuichi Takeuchi, Takeshi Endo, Eiichi Okuno, Toshimasa Yamamoto
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Patent number: 7290730Abstract: A pinion of a pretensioner is provided at a side of a torsion shaft, which side is opposite a side connected integrally to a spool via a sleeve. A base lock of a lock mechanism is connected to the pinion. Due to the lock mechanism operating, a leg plate side end portion of the torsion shaft is locked. In this way, due to operation of the pretensioner, the pinion, which is connected to a rotating portion of a sleeve, also is locked by the locking mechanism. Therefore, a piston of the pretensioner is not lowered, and internal pressure of a cylinder does not affect deformation of the torsion shaft.Type: GrantFiled: May 14, 2004Date of Patent: November 6, 2007Assignees: Kabushiki Kaisha Tokai-Rika-Denki-Seisakusho, Toyota Jidosha Kabushiki KaishaInventors: Tomonori Nagata, Toshimasa Yamamoto, Hitoshi Takamatsu, Yasuho Kitazawa, Takeaki Kato, Makoto Sekizuka, Shigekazu Imanaka, Kiyoka Matsubayashi, Takuya Nezaki
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Patent number: 7201053Abstract: A capacitance type physical quantity sensor detects physical quantity. The sensor includes a movable portion including a movable electrode and a fixed portion including a fixed electrode. The fixed electrode includes a detection surface facing a detection surface of the movable electrode. The movable electrode is movable toward the fixed electrode in accordance with the physical quantity so that a distance between the detection surfaces is changeable. At least one of the movable and the fixed electrodes includes a groove. The groove is disposed on a top or a bottom of the one of the movable and the fixed electrodes, has a predetermined depth from the top or the bottom, and extends from the detection surface to an opposite surface.Type: GrantFiled: April 29, 2004Date of Patent: April 10, 2007Assignee: Denso CorporationInventors: Tetsuo Yoshioka, Akihiko Teshigahara, Junji Ohara, Yukihiro Takeuchi, Toshimasa Yamamoto, Kazuhiko Kano
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Patent number: 6983653Abstract: A flow sensor for detecting flow of fluid includes a thin film portion. The thin film portion has a heater and a detector for detecting temperature around the heater. The heater is made of semiconductor. This flow sensor has high sensor sensitivity with low energy consumption. Further, the sensor has high detection accuracy, and the thin film portion has high endurance. Furthermore, the flow sensor with a passivation film has appropriate thickness so as to improve strength of a thin film portion.Type: GrantFiled: December 10, 2003Date of Patent: January 10, 2006Assignee: DENSO CorporationInventors: Takao Iwaki, Hiroyuki Wado, Toshimasa Yamamoto, Kiyokazu Isomura, Tomoyuki Mizutani, Akihiko Teshigahara, Ryuuichirou Abe
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Patent number: 6960511Abstract: A semiconductor device, which can prevent a current capability from deteriorating with time, is disclosed. A P-channel type LDMOS is formed in an N-type monocrystal silicon substrate. The P-channel type LDMOS includes: a P-type impurity diffusion layer formed in a well shape so as to reach a predetermined depth; a channel well layer formed by double-diffusing N-type impurities; a source diffusion layer; a potential fixing electrode; drain-contact electrode; a LOCOS oxide film; a gate electrode; a drain electrode; a source electrode; and so on. Especially, the gate electrode is formed so as to overlap onto the LOCOS oxide film, and its protrusion amount onto the LOCOS oxide film (gate overlap length O/L) is set to about 10 ?m, which is substantially ½ of a width size of the LOCOS oxide film.Type: GrantFiled: August 18, 2003Date of Patent: November 1, 2005Assignee: Denso CorporationInventors: Hiroyasu Ito, Toshimasa Yamamoto
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Publication number: 20050211816Abstract: A moving member that causes a take-up shaft to rotate is prevented from passing through a limit position. In a webbing take-up device, a piston rises when a vehicle disposed with the webbing-take device experiences an emergency situation, whereby a pinion, a clutch plate, a lock gear, a torsion shaft and a spool are rotated, and a webbing is taken up. Thus, a flange of the piston abuts against a piston stopper fixed to a frame, and the rising energy of the piston is absorbed. Moreover, an upper end of the piston abuts against an inhibitor portion of a cover plate disposed at a limit position, and the rising of the piston is inhibited. Thus, the upper end of the piston causing the pinion to rotate can be reliably prevented from passing through the limit position.Type: ApplicationFiled: March 17, 2005Publication date: September 29, 2005Applicant: KABUSHIKI KAISHA TOKAI-RIKA-DENKI-SEISAKUSHOInventors: Hitoshi Takamatsu, Tomonori Nagata, Masaki Yasuda, Toshimasa Yamamoto, Kazuhiko Aihara
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Publication number: 20040231421Abstract: A capacitance type physical quantity sensor detects physical quantity. The sensor includes a movable portion including a movable electrode and a fixed portion including a fixed electrode. The fixed electrode includes a detection surface facing a detection surface of the movable electrode. The movable electrode is movable toward the fixed electrode in accordance with the physical quantity so that a distance between the detection surfaces is changeable. At least one of the movable and the fixed electrodes includes a groove. The groove is disposed on a top or a bottom of the one of the movable and the fixed electrodes, has a predetermined depth from the top or the bottom, and extends from the detection surface to an opposite surface.Type: ApplicationFiled: April 29, 2004Publication date: November 25, 2004Inventors: Tetsuo Yoshioka, Akihiko Teshigahara, Junji Ohara, Yukihiro Takeuchi, Toshimasa Yamamoto, Kazuhiko Kano
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Publication number: 20040227030Abstract: A pinion of a pretensioner is provided at a side of a torsion shaft, which side is opposite a side connected integrally to a spool via a sleeve. A base lock of a lock mechanism is connected to the pinion. Due to the lock mechanism operating, a leg plate side end portion of the torsion shaft is locked. In this way, due to operation of the pretensioner, the pinion, which is connected to a rotating portion of a sleeve, also is locked by the locking mechanism. Therefore, a piston of the pretensioner is not lowered, and internal pressure of a cylinder does not affect deformation of the torsion shaft.Type: ApplicationFiled: May 14, 2004Publication date: November 18, 2004Applicant: KABUSHIKI KAISHA TOKAI-RIKA-DENKI-SEISAKUSHOInventors: Tomonori Nagata, Toshimasa Yamamoto, Hitoshi Takamatsu, Yasuho Kitazawa, Takeaki Kato, Makoto Sekizuka, Shigekazu Imanaka, Kiyoka Matsubayashi, Takuya Nezaki
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Patent number: 6768291Abstract: In a sensor chip for a fluid flow sensor, a thin film portion is formed above a hollow cavity portion while leaving thin film layers formed on the surface of a substrate. A conductor is provided on the inner wall face of a through hole formed to penetrate the substrate to thereby electrically connect a detecting portion constituted by a conductor film in the thin film layers and a substrate conductor portion formed on the rear face side of the through hole. The surface of a circuit board is formed with a control circuit and a base conductor portion electrically connected to the control circuit. The sensor chip and the circuit board are layered and the substrate conductor portion and the base conductor portion are electrically connected.Type: GrantFiled: March 28, 2002Date of Patent: July 27, 2004Assignee: Denso CorporationInventors: Toshiki Isogai, Yasushi Kohno, Toshimasa Yamamoto, Hiroyuki Wado