Patents by Inventor Toshio Asaumi
Toshio Asaumi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9653626Abstract: There is provided a photovoltaic device (100) having a substrate (10), i-type amorphous layers (16i, 18i) formed over a region of at least a part of a back surface of the substrate, and an i-type amorphous layer (12i) formed over a region of at least a part of a light-receiving surface of the substrate (10); and characterized in that electrodes (24n, 24p) are provided on the back surface and no electrode is provided on the light-receiving surface, and an electrical resistance per unit area of the back surface side i-type amorphous layers is lower than an electrical resistance per unit area of the light-receiving surface side i-type amorphous layer.Type: GrantFiled: September 25, 2013Date of Patent: May 16, 2017Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTDInventors: Isao Hasegawa, Toshio Asaumi, Hitoshi Sakata
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Patent number: 9530913Abstract: Provided is a solar cell having improved photoelectric conversion efficiency. The solar cell (1) contains: a substrate (10) comprising a semiconductor material having one type of conductivity; a first semiconductor layer (12n) having the one type of conductivity; and a second semiconductor layer (17n) having the one type of conductivity. The first semiconductor layer (12n) is arranged on one main surface of the substrate (10). The second semiconductor layer (17n) is arranged on the other main surface of the substrate (10). The solar cell (1) is configured such that the strength of the electric field formed by the second semiconductor layer (17n) is greater than the strength of the electric field formed by the first semiconductor layer (12n).Type: GrantFiled: September 23, 2013Date of Patent: December 27, 2016Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Isao Hasegawa, Toshio Asaumi, Hitoshi Sakata
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Patent number: 8796539Abstract: A solar cell, wherein contamination with an undesired impurity is suppressed, and solar cell characteristics are excellent. This solar cell is provided with: a semiconductor substrate having a photoreceiving surface and a back surface; a first semiconductor layer of a first conductivity type formed on a prescribed region of the back surface of the semiconductor substrate; a second semiconductor layer of a second conductivity type formed to extend over the back surface of the semiconductor substrate and the surface of the first semiconductor layer; and a cap layer formed between the first semiconductor layer and the second semiconductor layer, and containing no impurity of the first conductivity type.Type: GrantFiled: September 27, 2011Date of Patent: August 5, 2014Assignee: Sanyo Electric Co., Ltd.Inventors: Toshio Asaumi, Hitoshi Sakata
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Publication number: 20140020755Abstract: Provided is a solar cell having reduced resistance loss during power collection. A first and a second semiconductor layer (12n, 13p) each have a plurality of linear portions. The number of linear portions in the first semiconductor layer (12n) is fewer than the number of linear portions in the second semiconductor layer (13p). The thickness of the first semiconductor layer (12n) is thinner than the thickness of the second semiconductor layer (13p).Type: ApplicationFiled: September 24, 2013Publication date: January 23, 2014Applicant: Sanyo Electric Co., Ltd.Inventors: Isao Hasegawa, Toshio Asaumi, Hitoshi Sakata
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Publication number: 20140020757Abstract: There is provided a photovoltaic device (100) having a substrate (10), i-type amorphous layers (16i, 18i) formed over a region of at least a part of a back surface of the substrate, and an i-type amorphous layer (12i) formed over a region of at least a part of a light-receiving surface of the substrate (10); and characterized in that electrodes (24n, 24p) are provided on the back surface and no electrode is provided on the light-receiving surface, and an electrical resistance per unit area of the back surface side i-type amorphous layers is lower than an electrical resistance per unit area of the light-receiving surface side i-type amorphous layer.Type: ApplicationFiled: September 25, 2013Publication date: January 23, 2014Applicant: SANYO Electric Co., Ltd.Inventors: Isao HASEGAWA, Toshio ASAUMI, Hitoshi SAKATA
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Publication number: 20140020740Abstract: Provided is a solar cell having improved photoelectric conversion efficiency. The solar cell (1) contains: a substrate (10) comprising a semiconductor material having one type of conductivity; a first semiconductor layer (12n) having the one type of conductivity; and a second semiconductor layer (17n) having the one type of conductivity. The first semiconductor layer (12n) is arranged on one main surface of the substrate (10). The second semiconductor layer (17n) is arranged on the other main surface of the substrate (10). The solar cell (1) is configured such that the strength of the electric field formed by the second semiconductor layer (17n) is greater than the strength of the electric field formed by the first semiconductor layer (12n).Type: ApplicationFiled: September 23, 2013Publication date: January 23, 2014Applicant: Sanyo Electric Co., Ltd.Inventors: Isao Hasegawa, Toshio Asaumi, Hitoshi Sakata
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Publication number: 20140020741Abstract: A solar cell having improved carrier collection efficiency is provided. A solar cell (1) is provided with a semiconductor substrate (10) having one type of conductivity, a first semiconductor layer (12n), a second semiconductor layer (13p), a first electrode (14), and a second electrode (15). The first semiconductor layer (12n) is arranged on one main surface (10b) of the semiconductor substrate (10). The first semiconductor layer (12n) has the one type of conductivity. The second semiconductor layer (13p) is arranged on the one main surface (10b) of the semiconductor substrate (10). The second semiconductor layer (13p) has the other type of conductivity. The first electrode (14) is connected electrically to the first semiconductor layer (12n). The second electrode (15) is connected electrically to the second semiconductor layer (13p). The thickness of the second semiconductor layer (13p) is thinner than the thickness of the first semiconductor layer (12n).Type: ApplicationFiled: September 24, 2013Publication date: January 23, 2014Applicant: Sanyo Electric Co., Ltd.Inventors: Isao Hasegawa, Toshio Asaumi, Hitoshi Sakata
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Publication number: 20140020742Abstract: A photovoltaic device is provided with: an i-type amorphous layer formed over a region of at least a part of a back surface of a semiconductor substrate; and an i-type amorphous layer formed over a region of at least a part of a light-receiving surface of the semiconductor substrate. No electrode is provided on the light-receiving surface, and an electrode is provided on the back surface. An electrical resistance per unit area of the i-type amorphous layer is lower than an electrical resistance per unit area of the i-type amorphous layer.Type: ApplicationFiled: September 25, 2013Publication date: January 23, 2014Applicant: SANYO Electric Co., Ltd.Inventors: Isao HASEGAWA, Toshio ASAUMI, Hitoshi SAKATA, Toshiaki BABA
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Publication number: 20120012179Abstract: A solar cell, wherein contamination with an undesired impurity is suppressed, and solar cell characteristics are excellent. This solar cell is provided with: a semiconductor substrate having a photoreceiving surface and a back surface; a first semiconductor layer of a first conductivity type formed on a prescribed region of the back surface of the semiconductor substrate; a second semiconductor layer of a second conductivity type formed to extend over the back surface of the semiconductor substrate and the surface of the first semiconductor layer; and a cap layer formed between the first semiconductor layer and the second semiconductor layer, and containing no impurity of the first conductivity type.Type: ApplicationFiled: September 27, 2011Publication date: January 19, 2012Applicant: Sanyo Electric Co., Ltd.Inventors: Toshio Asaumi, Hitoshi Sakata
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Patent number: 8043885Abstract: A method of manufacturing a semiconductor film capable of inhibiting the quality of a semiconductor film from destabilization is obtained. This method of manufacturing a semiconductor film includes steps of introducing source gas for a semiconductor, controlling the pressure of an atmosphere formed by the source gas to a prescribed level, heating a catalytic wire to at least a prescribed temperature after controlling the pressure of the atmosphere to the prescribed level and forming a semiconductor film by decomposing the source gas with the heated catalytic wire.Type: GrantFiled: April 18, 2008Date of Patent: October 25, 2011Assignee: Sanyo Electric Co., Ltd.Inventors: Akira Terakawa, Toshio Asaumi
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Publication number: 20110132441Abstract: In a solar cell comprising a semiconductor substrate 11 and a i-type amorphous semiconductor layer 12 formed on a back surface of the semiconductor substrate 11, the i-type amorphous semiconductor layer 12 includes an exposed portion 12A exposed in a planer view, and a covered portion 12B covered with each of the p-type semiconductor layer 13 and the n-type semiconductor layer 14. A thickness T1 of the exposed portion 12A is less than a thickness T2 of the covered portion 12B.Type: ApplicationFiled: June 29, 2009Publication date: June 9, 2011Applicant: SANYO ELECTRIC CO., LTD.Inventors: Toshio Asaumi, Hitoshi Sakata
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Patent number: 7863518Abstract: A photovoltaic device capable of improving output characteristics is provided. This photovoltaic device comprises a crystalline semiconductor member, a substantially intrinsic first amorphous semiconductor layer formed on the front surface of the crystalline semiconductor member and a first conductivity type second amorphous semiconductor layer formed on the front surface of the first amorphous semiconductor layer, and has a hydrogen concentration peak in the first amorphous semiconductor layer. Thus, the quantity of hydrogen atoms in the first amorphous semiconductor layer is so increased that the hydrogen atoms increased in quantity can be bonded to dangling bonds of silicon atoms forming defects in the first amorphous semiconductor layer for inactivating the dangling bonds.Type: GrantFiled: March 8, 2004Date of Patent: January 4, 2011Assignee: Sanyo Electric Co., Ltd.Inventors: Akira Terakawa, Toshio Asaumi
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Patent number: 7807495Abstract: A method of manufacturing a semiconductor film capable of suppressing difficulty in temperature control of a catalytic wire is obtained. This method of manufacturing a semiconductor film includes steps of heating a catalytic wire to at least a prescribed temperature and forming a semiconductor film by introducing source gas for a semiconductor and decomposing the source gas with the heated catalytic wire after heating the catalytic wire to at least the prescribed temperature.Type: GrantFiled: April 23, 2008Date of Patent: October 5, 2010Assignee: Sanyo Electric Co., Ltd.Inventors: Akira Terakawa, Toshio Asaumi
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Patent number: 7781669Abstract: In a photovoltaic cell, an i-type amorphous silicon film and an n-type amorphous silicon film are formed in a region excluding a predetermined width of an outer periphery on a main surface of an n-type single crystalline silicon substrate. A front electrode is formed so as to cover the i-type amorphous silicon film and the n-type amorphous silicon film on a main surface of the n-type single crystalline silicon substrate. An i-type amorphous silicon film and a p-type amorphous silicon film are formed on the entire area of a back surface of the n-type single crystalline silicon substrate. A back electrode is formed in a region excluding a predetermined width of an outer periphery on the p-type amorphous silicon film. A surface, on the side of the front electrode, of the photovoltaic cell is a primary light incidence surface.Type: GrantFiled: February 24, 2006Date of Patent: August 24, 2010Assignee: Sanyo Electric Co., Ltd.Inventors: Akira Terakawa, Toshio Asaumi
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Patent number: 7755157Abstract: Solar cells and methods of their manufacture are described that exhibit decreased or eliminated leak current, improved open voltage and improved fill factor characteristics. In an embodiment, a separate processed surface is interposed between a first and a second main surface of a crystal substrate, as prepared by laser irradiation and cut processing. The laser irradiation is applied to an amorphous semiconductor layer of the same conductive type as an underlying single crystal substrate, but does not penetrate an underlying amorphous opposite type layer. Details of lamination and laser characteristics for processing the layers are provided.Type: GrantFiled: March 27, 2006Date of Patent: July 13, 2010Assignee: Sanyo Electric Co., Ltd.Inventors: Toshio Asaumi, Toshiaki Baba, Akira Terakawa, Yasufumi Tsunomura
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Publication number: 20080261347Abstract: A method of manufacturing a semiconductor film capable of inhibiting the quality of a semiconductor film from destabilization is obtained. This method of manufacturing a semiconductor film includes steps of introducing source gas for a semiconductor, controlling the pressure of an atmosphere formed by the source gas to a prescribed level, heating a catalytic wire to at least a prescribed temperature after controlling the pressure of the atmosphere to the prescribed level and forming a semiconductor film by decomposing the source gas with the heated catalytic wire.Type: ApplicationFiled: April 18, 2008Publication date: October 23, 2008Applicant: Sanyo Electric Co., Ltd.Inventors: Akira Terakawa, Toshio Asaumi
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Publication number: 20080261348Abstract: A method of manufacturing a semiconductor film capable of suppressing difficulty in temperature control of a catalytic wire is obtained. This method of manufacturing a semiconductor film includes steps of heating a catalytic wire to at least a prescribed temperature and forming a semiconductor film by introducing source gas for a semiconductor and decomposing the source gas with the heated catalytic wire after heating the catalytic wire to at least the prescribed temperature.Type: ApplicationFiled: April 23, 2008Publication date: October 23, 2008Applicant: Sanyo Electric Co., Ltd.Inventors: Akira Terakawa, Toshio Asaumi
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Patent number: 7199395Abstract: An i-type amorphous silicon film and an anti-reflection film made of amorphous silicon nitride or the like are formed in this order on a main surface of an n-type single-crystalline silicon substrate. On a back surface of the n-type single-crystalline silicon substrate are provided a positive electrode and a negative electrode next to each other. The positive electrode includes an i-type amorphous silicon film, a p-type amorphous silicon film, a back electrode, and a collector electrode formed in this order on the back surface of the n-type single-crystalline silicon substrate. The negative electrode includes an i-type amorphous silicon film, an n-type amorphous silicon film, a back electrode, and a collector electrode formed in this order on the back surface of the n-type single-crystalline silicon substrate.Type: GrantFiled: September 24, 2004Date of Patent: April 3, 2007Assignee: Sanyo Electric Co., Ltd.Inventors: Akira Terakawa, Toshio Asaumi
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Patent number: 7164150Abstract: In a photovoltaic device of the present invention, junction characteristics are improved by enhancing interface characteristics between a crystalline silicon semiconductor and an amorphous silicon semiconductor. In the photovoltaic device, an n-type crystalline substrate (11) and a p-type amorphous silicon thin film (13) are laminated with an i-type amorphous silicon thin film (12) interposed as well as an n-type amorphous silicon thin film (15) is provided on a rear surface of the crystalline silicon substrate (11) by interposing an i-type amorphous silicon thin film (14) between them. Oxygen atoms exist at interfaces between the crystalline silicon substrate (11) and the i-type amorphous silicon thin films (12), (14) in a higher concentration than that in the i-type amorphous silicon thin films (12), (14).Type: GrantFiled: March 5, 2003Date of Patent: January 16, 2007Assignee: Sanyo Electric Co., Ltd.Inventors: Akira Terakawa, Toshio Asaumi
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Patent number: RE45872Abstract: In a photovoltaic cell, an i-type amorphous silicon film and an n-type amorphous silicon film are formed in a region excluding a predetermined width of an outer periphery on a main surface of an n-type single crystalline silicon substrate. A front electrode is formed so as to cover the i-type amorphous silicon film and the n-type amorphous silicon film on a main surface of the n-type single crystalline silicon substrate. An i-type amorphous silicon film and a p-type amorphous silicon film are formed on the entire area of a back surface of the n-type single crystalline silicon substrate. A back electrode is formed in a region excluding a predetermined width of an outer periphery on the p-type amorphous silicon film. A surface, on the side of the front electrode, of the photovoltaic cell is a primary light incidence surface.Type: GrantFiled: August 23, 2012Date of Patent: January 26, 2016Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.Inventors: Akira Terakawa, Toshio Asaumi