Patents by Inventor Toshio Ueda

Toshio Ueda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7837393
    Abstract: A self-aligning roller bearing is provided which includes an inner ring having a double-row raceway, an outer ring having a double-row integral and spherical raceway, a plurality of rollers incorporated between the inner ring raceway and the outer ring raceway on a double-row basis, and a retainer for rotatably retaining the rollers. Processing marks crossing each other are formed on a raceway surface of the spherical raceway of the outer ring. The processing marks are cut substantially straightly at a predetermined crossing angle to the circumferential direction of the raceway surface. The surface roughness of the raceway surface is substantially constant in the axial direction and the circumferential direction thereof at least in a part in contact with the roller.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: November 23, 2010
    Assignee: NSK Ltd.
    Inventors: Kazumi Matsuzaki, Toshio Ueda, Koichi Nagano, Atsushi Yamanoue
  • Publication number: 20100251863
    Abstract: A workpiece centering apparatus 1 is provided on a lathe having a spindle 33, an independent chuck 34, and upper and lower tool rests 37, 41, and has sandwiching members 11, 12 mounted to the tool rests 37, 41, respectively, and capable of contacting the outer peripheral surface of a workpiece W, and a centering control section 15 for moving the tool rests 37, 41 and thereby moving the sandwiching members 11, 12 to their respective centering positions which are the positions of the sandwiching members 11, 12 when the center position of a portion to be machined of the workpiece W coincides with the axis of the spindle 33 in a state where the portion to be machined of the workpiece W is being sandwiched and held by the sandwiching members 11, 12, and then causing the independent chuck 34 to grip the workpiece W.
    Type: Application
    Filed: April 1, 2010
    Publication date: October 7, 2010
    Applicant: MORI SEIKI CO., LTD.
    Inventors: SHIGETSUGU SAKAI, MASAHIRO YAMANE, TOSHIO UEDA, SATOSHI NOZAKI
  • Publication number: 20100251862
    Abstract: The present invention provides a tool post of a machine tool capable of enhancing the accuracy of positioning a tool. A positioning key 20 is fixed to an attached surface 10c formed on a tool holder 10, and a positioning block 21 fitting to the positioning key 20 is fixed to a holder attaching surface 11c formed on an outer peripheral surface 11a of a turret 11, in which the positioning key 20 is elastically deformed when it is fitted to the positioning block 21, and thereby brought into close contact with the positioning block 21.
    Type: Application
    Filed: March 19, 2010
    Publication date: October 7, 2010
    Inventors: Toshio Ueda, Masao Fukumori
  • Patent number: 7796198
    Abstract: In a display control apparatus which is supplied with an input synchronizing signal and an input video signal, and which generates display data from the input video signal on the basis of the input synchronizing signal, and supplies the display data to display means, when a change is detected in a cycle of the input synchronizing signal, the display means is supplied with display data of a frame prior to the occurrence of the change in the cycle, throughout a subsequent predetermined number of frame periods.
    Type: Grant
    Filed: February 14, 2006
    Date of Patent: September 14, 2010
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Hiroki Ikeda, Toshio Ueda
  • Publication number: 20100207955
    Abstract: In a display apparatus such as PDP, in order to obtain well-lighted video while suppressing an increase in power consumption, the luminance level of a specific region of a display panel is decreased in accordance with an average luminance level of the entire display panel. However, when a low-luminance region and a high-luminance region are mixed in display video, even the luminance of the low-luminance region is decreased and gray-scale crush is caused in some cases. An average luminance level for each region is detected, and a shading process is controlled for each region based on the detected region-specific average luminance level and the luminance level of input video. With this control, when the luminance level of the input video signal is higher than a predetermined threshold, the shading process is operated, and when the luminance level is lower than the predetermined threshold, the shading process is stopped.
    Type: Application
    Filed: January 21, 2010
    Publication date: August 19, 2010
    Inventors: Noriyuki NISHIMAKI, Toshio Ueda
  • Publication number: 20100141691
    Abstract: A display apparatus, that can prevent thermal destruction and burning with a simple structure, has been disclosed. In the apparatus it is judged that there is possibility of a pattern, whose area with high brightness is small, being displayed frequently, when a state in which the total light emission pulse number remains large occurs with high frequency, and if such a state is detected, the total light emission pulse number (sustain frequency) is reduced to prevent the thermal destruction and burning.
    Type: Application
    Filed: February 4, 2010
    Publication date: June 10, 2010
    Applicant: FUJITSU HITACHI PLASMA DISPLAY
    Inventors: Ayahito Kojima, Shigeki Kameyama, Hirohito Kuriyama, Yoshikazu Kanazawa, Toshio Ueda
  • Patent number: 7705806
    Abstract: A method for driving a plasma display panel, including a plurality of display electrode pairs and a plurality of address electrodes, and which includes at least an address period and a sustain discharge period. In the address period, performing address processing, between the address electrodes and a display electrode configured as either a set of odd or even numbered display electrodes, sequentially to all of one of the sets of display electrode pairs, and thereafter address processing, between the address electrodes and a display electrode configured as the other set of display electrode pairs, sequentially to all of the other set of display electrode pairs. In the sustain discharge period, supplying at least one first sustain discharge pulse to the one set of display electrode pairs, and supplying at least one second sustain discharge pulse to the other set of display electrode pairs.
    Type: Grant
    Filed: October 31, 2005
    Date of Patent: April 27, 2010
    Assignee: Hitachi Plasma Patent Licensing Co., Ltd
    Inventors: Tomoyuki Ishii, Tadatsugu Hirose, Yoshikazu Kanazawa, Toshio Ueda, Tomokatsu Kishi, Shigetoshi Tomio, Fumitaka Asami
  • Publication number: 20100047933
    Abstract: A substrate inspection method allowing inspection of all a plurality of substrates each provided at its surface with a plurality of layers by determining quality of the plurality of layers as well as methods of manufacturing the substrate and an element using the substrate inspection method are provided. The substrate inspection method includes a step of preparing the substrate provided at its main surface with the plurality of layers, a film forming step, a local etching step, and an inspection step or a composition analysis step. In the step, a concavity is formed in a region provided with an epitaxial layer of the main surface of the substrate by removing at least partially the epitaxial layer. In the inspection step, the inspection is performed on the layer exposed in the concavity.
    Type: Application
    Filed: October 29, 2009
    Publication date: February 25, 2010
    Inventors: Takao NAKAMURA, Toshio Ueda, Takashi Kyono
  • Publication number: 20090197399
    Abstract: Provided are a method of growing a group III-V compound semiconductor, and method of manufacturing a light-emitting device and an electron device, in which risks are reduced and nitrogen can be efficiently supplied at low temperatures. The method of growing a group III-V compound semiconductor includes the following processes. First, gas containing at least one selected from the group consisting of monomethylamine and monoethylamine is prepared as a nitrogen raw material. Then, the group III-V compound semiconductor is grown using the gas by vapor phase growth.
    Type: Application
    Filed: January 30, 2009
    Publication date: August 6, 2009
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Takao Nakamura, Masaki Ueno, Toshio Ueda, Eiryo Takasuka, Yasuhiko Senda
  • Publication number: 20090148704
    Abstract: A vapor-phase process apparatus and a vapor-phase process method capable of satisfactorily maintaining quality of processes even when different types of processes are performed are obtained. A vapor-phase process apparatus includes a process chamber, gas supply ports serving as a plurality of gas introduction portions, and a gas supply portion (a gas supply member, a pipe, a flow rate control device, a pipe, and a buffer chamber). The process chamber allows flow of a reaction gas therein. The plurality of gas supply ports are formed in a wall surface (upper wall) of the process chamber along a direction of flow of the reaction gas. The gas supply portion can supply a gas into the process chamber at a different flow rate from each of one gas supply port and another gas supply port different from that one gas supply port among the plurality of gas supply ports.
    Type: Application
    Filed: December 9, 2008
    Publication date: June 11, 2009
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Eiryo TAKASUKA, Toshio Ueda, Toshiyuki Kuramoto, Masaki Ueno
  • Patent number: 7506565
    Abstract: To provide a lathe in which a machined workpiece can be pulled out without fail, whereby realizing enhanced reliability in the pull-out operation. First and second tool posts 6, 7 are arranged to be capable of facing each other across a spindle axis A of a spindle headstock 4, and hold parts 30, 31 disposed on turrets 12, 13 of the first and second tool posts 6, 7 hold therebetween a machined workpiece W supported by the spindle headstock 4 to pull out the machined workpiece W from the spindle headstock 4.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: March 24, 2009
    Assignee: Mori Seiki Co., Ltd.
    Inventors: Toshio Ueda, Masafumi Hino, Tsuyoshi Fujimoto
  • Publication number: 20090075409
    Abstract: A fabrication apparatus and fabrication method of a semiconductor device are provided, allowing the temperature distribution of a substrate to be rendered uniform. The fabrication apparatus for a semiconductor device includes a susceptor holding the substrate, a heater arranged at a back side of the susceptor, a support member located between the substrate and susceptor, including a support portion, and a spacer located between the susceptor and support member. The spacer has an opening formed corresponding to the site where said support portion is located, at an opposite face side of the support member.
    Type: Application
    Filed: September 12, 2008
    Publication date: March 19, 2009
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Masaki UENO, Toshio UEDA, Yoko WATANABE
  • Publication number: 20090070295
    Abstract: Convenience of a user is improved in handling data included in a plurality of structured document files. A child document file is created by a schema inheriting a schema in a parent document file in which a plurality of tags are structured. A name of a substance tag in a child document file inheriting a model tag included in a parent document file is changeable in accordance with a user's input direction. At the time, a tag mapping table is held, in which a name of a substance tag included in a child document file and a name of a model tag which is the origin of the substance tag are associated with each other. A name of a substance tag corresponding to a model tag of which name is a search key is detected, with reference to the tag mapping table, and then, the data of the substance tag is detected from the child document file, by using the name of the substance tag as a new search key.
    Type: Application
    Filed: May 9, 2006
    Publication date: March 12, 2009
    Applicant: JUSTSYSTEMS CORPORATION
    Inventors: Nobuyuki Otomori, Yusuke Fujimaki, Yasuo Akai, Toshio Ueda
  • Publication number: 20080316148
    Abstract: A technique capable of suppressing or preventing generation of flickers (blinks) by a sustain period control as well as capable of ensuring or enhancing display quality in a PDP device. The PDP device adjusts a sustain pulse of the sustain period for every subfield by selecting a combination of one or more than one cycle so that start and end timings of a field in fields before and after change are almost the same according to a display load ratio of the subfield of the field. Field weighted emission center positions then becomes almost the same, and flickers and the like are suppressed.
    Type: Application
    Filed: December 20, 2007
    Publication date: December 25, 2008
    Inventors: Masanori Takeuchi, Toshio Ueda
  • Publication number: 20080309651
    Abstract: Provided is a technology related to a PDP apparatus and capable of realizing the efficiency improvement in the processing of a control circuit including the processing between a control circuit (waveform generating circuit unit) and a non-volatile memory (waveform ROM). In a control circuit of a PDP apparatus, an SFM (serial flash memory) is used as a non-volatile memory, and waveform decoding data and a waveform decoding address set are stored as a first waveform in the SFM. An LSI (waveform generating circuit LSI) stores the data from the waveform decoding data in a first SRAM in an internal SRAM unit and stores the data corresponding to one reading cycle (for example one SF) selected from the waveform decoding address set in a second SRAM in the internal SRAM unit.
    Type: Application
    Filed: February 6, 2008
    Publication date: December 18, 2008
    Inventors: Shigeharu ASAO, Toshio Ueda
  • Publication number: 20080284687
    Abstract: A display apparatus, that can prevent thermal destruction and burning with a simple structure, has been disclosed. In the apparatus it is judged that there is possibility of a pattern, whose area with high brightness is small, being displayed frequently, when a state in which the total light emission pulse number remains large occurs with high frequency, and if such a state is detected, the total light emission pulse number (sustain frequency) is reduced to prevent the thermal destruction and burning.
    Type: Application
    Filed: July 11, 2008
    Publication date: November 20, 2008
    Applicant: FUJITSU HITACHI PLASMA DISPLAY
    Inventors: Ayahito Kojima, Shigeki Kameyama, Hirohito Kuriyama, Yoshikazu Kanazawa, Toshio Ueda
  • Patent number: 7423611
    Abstract: A method of driving a display device has a calculating step, a comparing step, and a controlling step. The calculating step calculates a total number of light-emission pulses within a field, based on an average of display load factors in at least two fields, the comparing step compares the calculated number of light-emission pulses with a number of light-emission pulses based on power consumption, and the controlling step controls a smaller display load factor as the total number of light-emission pulses within a field.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: September 9, 2008
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Takayuki Ooe, Toshio Ueda, Kosaku Toda
  • Publication number: 20080068300
    Abstract: There is provided a plasma display device including: a plasma display panel having a plurality of address electrodes selecting a display cell to emit light; a data generation circuit generating and outputting a plurality of address data for an application of a voltage to the plurality of address electrodes; a plurality of output ports outputting the plurality of address data; a selector switching over connections of outputs of the plurality of address data generated by the data generation circuit and the plurality of output ports.
    Type: Application
    Filed: April 16, 2007
    Publication date: March 20, 2008
    Inventors: Hiroki Ikeda, Toshio Ueda
  • Publication number: 20080006208
    Abstract: Metal organic chemical vapor deposition equipment is metal organic chemical vapor deposition equipment for forming a film on a substrate by using a reactant gas, and includes a susceptor heating the substrate and having a holding surface for holding the substrate, and a flow channel for introducing the reactant gas to the substrate. The susceptor is rotatable with the holding surface kept facing an inner portion of the flow channel, and a height of the flow channel along a flow direction of the reactant gas is kept constant from a position to a position, and is monotonically decreased from the position to the downstream side. It is thereby possible to improve film formation efficiency while allowing the formed film to have a uniform thickness.
    Type: Application
    Filed: July 3, 2007
    Publication date: January 10, 2008
    Inventors: Masaki Ueno, Toshio Ueda, Eiryo Takasuka
  • Patent number: RE40769
    Abstract: A method of controlling the gray scale of a plasma display device has a forming step of forming a frame for an image by a plurality of subframes each having a different brightness, a setting step of setting the number of sustain emissions of each subframe in an anti-geometrical progression corresponding to the brightness of each subframe, and a displaying step of displaying the image on the plasma display device by a gray scale display having a specific brightness. The number of sustain emissions in each subframe is set individually by the each subframe, and this establishes a linear relation between the gray level and the corresponding brightness Therefore, an enhancement of display quality of the plasma display device can be realized.
    Type: Grant
    Filed: August 24, 2001
    Date of Patent: June 23, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Keishin Nagaoka, Masaya Tajima, Yoshimasa Awata, Yoshikazu Kanazawa, Toshio Ueda