Patents by Inventor Toshiya Aoki

Toshiya Aoki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7965177
    Abstract: A display system includes a combination image dividing section arranged to divide a single combination image composed of a plurality of item images into a plurality of image blocks such that each of the image blocks has an item image; an image inputting controlling section arranged to lay out the individual image blocks; and an image inputting controlling section arranged to generate display data based on the image blocks laid out thereby. This can achieve a display system, to be mounted in the maneuverable moving object and having high degrees of freedom for screen layout, at a lower cost.
    Type: Grant
    Filed: July 3, 2006
    Date of Patent: June 21, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Masaki Kobayashi, Fumiaki Fujimoto, Toshiya Okamoto, Toshiya Aoki
  • Patent number: 7889763
    Abstract: An input signal INDATA inputted to a sender-side interface portion is encoded by an encoder, and a transmission signal generated by the encoding is transmitted to a receiver-side interface portion through two signal transmission lines. The input signal INDATA is encoded in such a manner that the logic level of the transmission signal transmitted through at least one of the two signal transmission lines is changed in any two consecutive elementary periods. The receiver-side interface portion is provided with a clock receiver, and a clock signal is generated based on the change of the transmission signals supplied from the two signal transmission lines.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: February 15, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Norio Ohmura, Toshiya Aoki
  • Publication number: 20090310995
    Abstract: In case new and old toners may be mixed, a developing bias is set as follows. The time is first clocked. The number of times toner is replenished from a hopper into a buffer for a clocked period is counted. If a replenishment amount per clock time is a threshold value or higher, considering that new and old toners are mixed, the setting of the developing bias is changed. An electric field intensity between a developing roller and a photoconductor is set to cause normally-charged toner to fly in an image area but not to fly in a background area. No image fogging is therefore generated in the background area. Thus, an image forming apparatus and method capable of preventing low-charged toner and oppositely-charged toner generated by mixing of new and old toners from adhering to the background area of an electrostatic latent image on the photoconductor, thereby avoiding generation of image fogging.
    Type: Application
    Filed: June 4, 2009
    Publication date: December 17, 2009
    Applicant: KONICA MINOLTA BUSINESS TECHNOLOGIES, INC.
    Inventors: Kanji NAKAYAMA, Noritoshi HAGIMOTO, Yuusuke OKUNO, Tomo KITADA, Toshiya AOKI
  • Publication number: 20090268757
    Abstract: An input signal INDATA inputted to a sender-side interface portion is encoded by an encoder, and a transmission signal generated by the encoding is transmitted to a receiver-side interface portion through two signal transmission lines. The input signal INDATA is encoded in such a manner that the logic level of the transmission signal transmitted through at least one of the two signal transmission lines is changed in any two consecutive elementary periods. The receiver-side interface portion is provided with a clock receiver, and a clock signal is generated based on the change of the transmission signals supplied from the two signal transmission lines.
    Type: Application
    Filed: February 19, 2009
    Publication date: October 29, 2009
    Inventors: Norio Ohmura, Toshiya Aoki
  • Publication number: 20090225067
    Abstract: In one embodiment of the present invention, a display panel is disclosed in which a plurality of scanning lines and a plurality of signal lines are formed in a matrix shape, and in which driving transistors controlled to be turned ON/OFF by scanning voltages to be applied to scanning lines and pixel circuits connected with the signal lines through the driving transistors are disposed at the individual intersections between the scanning lines and the signal lines. The display panel includes a plurality of detecting transistors having their individual gates connected with the individual scanning lines. The plural detecting transistors have their drains commonly connected, and a detection signal indicating the logical sum of the ON states of the detecting transistors are outputted from the commonly connected drains.
    Type: Application
    Filed: May 31, 2006
    Publication date: September 10, 2009
    Inventors: Kazuhiko Yoda, Toshiya Aoki
  • Publication number: 20090179745
    Abstract: An instrument panel display system displays vehicle information, amenity information, and safety information as images. In this instrument panel display system, data (image data, image layout data, and image output control data) for displaying the images are generated in a shared manner by a vehicle system processor, an amenity system processor, and a safety system processor. On account of this, the stability of image display on an instrument panel of a vehicle or the like is improved and hence safety of driving is increased.
    Type: Application
    Filed: March 18, 2009
    Publication date: July 16, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Toshiya OKAMOTO, Toshiya AOKI, Kouichi ODA, Jun HAMACHI, Fumiaki FUJIMOTO, Kazuhiko YODA
  • Publication number: 20090118541
    Abstract: Provided is a production method of glycolic acid having a first step of preparing glycolonitrile from formaldehyde and hydrocyanic acid and a second step of hydrolyzing the glycolonitrile into glycolic acid directly or via a glycolate salt, which method can produce glycolic acid in easy production and purification steps while consuming less energy. In the production method, by carrying out the first and second steps continuously or by storing the glycolonitrile obtained in the first step at pH 4 or less and carrying out a hydrolysis reaction of the second step at from pH 5 to 9, a production yield of glycolic acid, activity for the production of glycolic acid and accumulated concentration of glycolic acid are improved, resulting in the production of glycolic acid having an improved purity and quality.
    Type: Application
    Filed: May 25, 2006
    Publication date: May 7, 2009
    Applicant: ASAHI KASEI CHEMICALS CORPORATION
    Inventors: Hidenori Hinago, Hajime Nagahara, Toshiya Aoki
  • Publication number: 20090102632
    Abstract: A display system includes a combination image dividing section arranged to divide a single combination image composed of a plurality of item images into a plurality of image blocks such that each of the image blocks has an item image; an image inputting controlling section arranged to lay out the individual image blocks; and an image inputting controlling section arranged to generate display data based on the image blocks laid out thereby. This can achieve a display system, to be mounted in the maneuverable moving object and having high degrees of freedom for screen layout, at a lower cost.
    Type: Application
    Filed: July 3, 2006
    Publication date: April 23, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Masaki Kobayashi, Fumiaki Fujimoto, Toshiya Okamoto, Toshiya Aoki
  • Patent number: 7515613
    Abstract: An input signal INDATA inputted to a sender-side interface portion is encoded by an encoder, and a transmission signal generated by the encoding is transmitted to a receiver-side interface portion through two signal transmission lines. The input signal INDATA is encoded in such a manner that the logic level of the transmission signal transmitted through at least one of the two signal transmission lines is changed in any two consecutive elementary periods. The receiver-side interface portion is provided with a clock receiver, and a clock signal is generated based on the change of the transmission signals supplied from the two signal transmission lines.
    Type: Grant
    Filed: January 14, 2005
    Date of Patent: April 7, 2009
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Norio Ohmura, Toshiya Aoki
  • Publication number: 20090046990
    Abstract: A video image transfer device (2) includes transfer means (4) for switchedly transferring to a display device (9) a plurality of video signals acquired from at least one image pickup device (20), assigning means (8) for dividing a refresh rate of the display device (9) into portions and assigning the portions among the plurality of video signals, and transfer control means (5) for controlling the transfer means (4) in such a manner that each of the video signals is transferred to the display device (9) at a timing according to the portion of the refresh rate assigned to each of the video signals. This makes it possible to prevent a dropping frame and an insufficient resolution of an important video image.
    Type: Application
    Filed: July 6, 2006
    Publication date: February 19, 2009
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Hideo Takemura, Toshiya Aoki, Toshiya Okamoto
  • Publication number: 20080309474
    Abstract: An instrument panel display system of displays vehicle information, amenity information, and safety information as images. In this instrument panel display system, data (image data, image layout data, and image output control data) for displaying the images are generated in a shared manner by a vehicle system processor, an amenity system processor, and a safety system processor. On account of this, the stability of image display on an instrument panel of a vehicle or the like is improved and hence safety of driving is increased.
    Type: Application
    Filed: August 24, 2005
    Publication date: December 18, 2008
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Toshiya Okamoto, Toshiya Aoki, Kouichi Oda, Jun Hamachi, Fumiaki Fujimoto, Kazuhiko Yoda
  • Patent number: 7333096
    Abstract: A control signal generating circuit CTL for controlling the writing into pixels PIX instructs a data signal line drive circuit SD2, which is for driving pixels in a non-display area, to write a voltage VB or a voltage VW which are for non-displaying, not only in the first frame but also once in a predetermined number of frames. In other words, the pixels in the display area is refreshed at intervals longer than those in the case of refreshing the pixels in each frame. Thus, even if the mobility of an active element is high and the leak current on the occasion of OFF-state is large, or even if a large amount of electric charge is accumulated because of the photoelectric effect due to the use of a backlight, it is possible to prevent unnecessary displaying on the display area, which is caused because the writing into the pixels in the display area influences on the pixels in the non-display area, and hence it is possible to improve the quality of partial displaying, while restraining the power consumption.
    Type: Grant
    Filed: December 11, 2002
    Date of Patent: February 19, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Hajime Washio, Yasuyoshi Kaise, Sachio Tsujino, Kazuhiro Maeda, Keiji Takahashi, Yasushi Kubota, Toshiya Aoki
  • Publication number: 20080036753
    Abstract: An example control signal generating circuit CTL for controlling the writing into pixels PIX instructs a data signal line drive circuit SD2, which is for driving pixels in a non-display area, to write a voltage VB or a voltage VW which are for non-displaying, not only in the first frame but also once in a predetermined number of frames. In other words, the pixels in the display area are refreshed at intervals longer than those in the case of refreshing the pixels in each frame.
    Type: Application
    Filed: August 2, 2007
    Publication date: February 14, 2008
    Inventors: Hajime Washio, Yasuyoshi Kaise, Sachio Tsujino, Kazuhiro Maeda, Keiji Takahashi, Yasushi Kubota, Toshiya Aoki
  • Patent number: 7268762
    Abstract: In a buffer that outputs an analog voltage Vout to be applied as a driving voltage to a pixel capacitance in a display region of an active-matrix liquid crystal display device, a CMOS circuit for generating this analog voltage includes four Pch transistors (QP0 to QP3) connected in parallel and four Nch transistors (QN0 to QN3) connected in parallel. When charging the pixel capacitance, a bias current is reduced and the driving capability is lowered by control with selector switches (SP1 to SP3) at a time at which the large driving capability at the beginning of the charging is not necessary anymore. And when discharging the charge that has accumulated at the pixel capacitance, the bias current is reduced and the driving capability is lowered by control with selector switches (SN1 to SN3) at a time at which the large driving capability at the beginning of the discharging is not necessary anymore.
    Type: Grant
    Filed: September 8, 2003
    Date of Patent: September 11, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Daiji Kitagawa, Toshiya Aoki
  • Patent number: 7171496
    Abstract: A data bus width conversion apparatus is provided for receiving N-bit data from a first device having a first bus width and outputting the N-bit data to a second device having a second bus width. The first device divides the N-bit data into a plurality of bit data groups and the plurality of bit data groups are transferred to the apparatus. The apparatus comprises a setting section for setting the total number of transfer operations required for the first device to transfer the plurality of bit data groups, and for setting a division pattern of the N-bit data for dividing the N-bit data into the plurality of bit data groups, a receiving section, and an output section for producing the N-bit data from the received data indicated by each of the plurality of bit data groups and outputting the produced N-bit data to the second device.
    Type: Grant
    Filed: September 24, 2003
    Date of Patent: January 30, 2007
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Noriyuki Tanaka, Toshiya Aoki
  • Publication number: 20050157657
    Abstract: An input signal INDATA inputted to a sender-side interface portion is encoded by an encoder, and a transmission signal generated by the encoding is transmitted to a receiver-side interface portion through two signal transmission lines. The input signal INDATA is encoded in such a manner that the logic level of the transmission signal transmitted through at least one of the two signal transmission lines is changed in any two consecutive elementary periods. The receiver-side interface portion is provided with a clock receiver, and a clock signal is generated based on the change of the transmission signals supplied from the two signal transmission lines.
    Type: Application
    Filed: January 14, 2005
    Publication date: July 21, 2005
    Inventors: Norio Ohmura, Toshiya Aoki
  • Patent number: 6916638
    Abstract: Disclosed is a method for producing glycine, which comprises subjecting an aqueous solution of glycinonitrile to a hydrolysis reaction in a hydrolysis reaction system under the action of a microbial enzyme, thereby converting the glycinonitrile to glycine while by-producing ammonia, wherein the hydrolysis reaction system contains at least one organic impurity compound inhibiting the microbial enzyme, wherein the organic impurity compound has a molecular weight of 95 or more and contains at least one member selected from the group consisting of a nitrile group, a carboxyl group, an amide group, an amino group, a hydroxyl group and a trimethyleneamine structure, and wherein the hydrolysis reaction is performed under conditions wherein, during the hydrolysis reaction, the content of the organic impurity compound inhibiting the microbial enzyme in the hydrolysis reaction system is maintained at a level of 10% by weight or less, based on the weight of the hydrolysis reaction system.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: July 12, 2005
    Assignee: Asahi Kasei Kabushiki Kaisha
    Inventors: Toshiya Aoki, Kiyoshi Kawakami, Kazumasa Otsubo
  • Patent number: 6778184
    Abstract: A color signal correction circuit for correcting a color signal which displays data on each pixel of a display apparatus, comprising: a color signal input section for inputting a color signal of N bits (N is a natural number); an addition section for adding second and third color signals corresponding to first and second adjacent pixels which are adjacent to the predetermined pixel to obtain addition value data; a first comparison section for subtracting duplicated color signal data, which is obtained by duplicating a first color signal corresponding to the predetermined pixel, from the addition value data to obtain a difference value; a LSB determination section for determining an LSB according to the difference value; and a color signal generation section for adding N higher order bits of the duplicated color signal data and the LSB, so as to generate a color signal of (N+1) bits.
    Type: Grant
    Filed: July 26, 2002
    Date of Patent: August 17, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Kazuyuki Arita, Toshiya Aoki
  • Publication number: 20040064595
    Abstract: A data bus width conversion apparatus is provided for receiving N-bit data from a first device having a first bus width and outputting the N-bit data to a second device having a second bus width. The first device divides the N-bit data into a plurality of bit data groups and the plurality of bit data groups are transferred to the apparatus. The apparatus comprises a setting section for setting the total number of transfer operations required for the first device to transfer the plurality of bit data groups, and for setting a division pattern of the N-bit data for dividing the N-bit data into the plurality of bit data groups, a receiving section, and an output section for producing the N-bit data from the received data indicated by each of the plurality of bit data groups and outputting the produced N-bit data to the second device.
    Type: Application
    Filed: September 24, 2003
    Publication date: April 1, 2004
    Inventors: Noriyuki Tanaka, Toshiya Aoki
  • Publication number: 20040056833
    Abstract: In a buffer that outputs an analog voltage Vout to be applied as a driving voltage to a pixel capacitance in a display region of an active-matrix liquid crystal display device, a CMOS circuit for generating this analog voltage includes four Pch transistors (QP0 to QP3) connected in parallel and four Nch transistors (QN0 to QN3) connected in parallel. When charging the pixel capacitance, a bias current is reduced and the driving capability is lowered by control with selector switches (SP1 to SP3) at a time at which the large driving capability at the beginning of the charging is not necessary anymore. And when discharging the charge that has accumulated at the pixel capacitance, the bias current is reduced and the driving capability is lowered by control with selector switches (SN1 to SN3) at a time at which the large driving capability at the beginning of the discharging is not necessary anymore.
    Type: Application
    Filed: September 8, 2003
    Publication date: March 25, 2004
    Inventors: Daiji Kitagawa, Toshiya Aoki