Patents by Inventor Toshiya Kamibayashi

Toshiya Kamibayashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10749363
    Abstract: Provided are a semiconductor device, a battery system, and a battery control method that are capable of reducing difference in remaining capacity without regard to the load status of a battery pack. The semiconductor device includes a high-voltage resistant circuit and a low-voltage circuit. The high-voltage resistant circuit includes a multiplexer that selects one of multiple series-coupled battery cells in a battery pack and couples the selected battery cell to the battery pack. The low-voltage circuit includes a measurement circuit that individually measures voltages of the battery cells. The multiplexer couples one of the battery cells to a power supply for the low-voltage circuit.
    Type: Grant
    Filed: July 30, 2018
    Date of Patent: August 18, 2020
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventor: Toshiya Kamibayashi
  • Publication number: 20190089179
    Abstract: Provided are a semiconductor device, a battery system, and a battery control method that are capable of reducing difference in remaining capacity without regard to the load status of a battery pack. The semiconductor device includes a high-voltage resistant circuit and a low-voltage circuit. The high-voltage resistant circuit includes a multiplexer that selects one of multiple series-coupled battery cells in a battery pack and couples the selected battery cell to the battery pack. The low-voltage circuit includes a measurement circuit that individually measures voltages of the battery cells. The multiplexer couples one of the battery cells to a power supply for the low-voltage circuit.
    Type: Application
    Filed: July 30, 2018
    Publication date: March 21, 2019
    Inventor: Toshiya KAMIBAYASHI
  • Patent number: 8526638
    Abstract: A gain control circuit includes a comparator that compares an input gain value with a count value to generate a comparison result signal, a counter that counts up or counts down the count value in accordance with the comparison result signal, and a gain modulator circuit that modulates the count value to generate a gain control signal which changes in a time-divided manner. The gain modulator circuit modulates the count value so that a gain obtained by time-averaging a gain corresponding to the gain control signal matches a gain based on the count value.
    Type: Grant
    Filed: January 25, 2010
    Date of Patent: September 3, 2013
    Assignee: Fujitsu Semiconductor Limited
    Inventor: Toshiya Kamibayashi
  • Publication number: 20100244952
    Abstract: A gain control circuit includes a comparator that compares an input gain value with a count value to generate a comparison result signal, a counter that counts up or counts down the count value in accordance with the comparison result signal, and a gain modulator circuit that modulates the count value to generate a gain control signal which changes in a time-divided manner. The gain modulator circuit modulates the count value so that a gain obtained by time-averaging a gain corresponding to the gain control signal matches a gain based on the count value.
    Type: Application
    Filed: January 25, 2010
    Publication date: September 30, 2010
    Applicant: FUJITSU MICROELECTRONICS LIMITED
    Inventor: Toshiya Kamibayashi
  • Publication number: 20050283506
    Abstract: An address generator is supplied with a designated gain GT, and generates exponent data n and an address of mantissa A. The address of mantissa A is set based on an accuracy of the designated gain GT. A mantissa-coefficient acquiring unit is so structured as to acquire a mantissa-coefficient k based on an equation acquired in accordance with a relationship between the exponent data n and mantissa data for each address of mantissa A. A coefficient data acquiring section and a mantissa data acquiring section both included in the mantissa-coefficient acquiring unit generate a coefficient a and mantissa data d1, respectively, based on the address of mantissa A, whereby the mantissa-coefficient k can be acquired for the exponent data n with a high accuracy for each address of mantissa A.
    Type: Application
    Filed: June 15, 2005
    Publication date: December 22, 2005
    Inventor: Toshiya Kamibayashi