Patents by Inventor Toshiyuki Kikuchi

Toshiyuki Kikuchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050060569
    Abstract: There is described a method of managing information on the release of restriction on use that permits license management even where linkage of a hardware key is limited, without sacrificing the user work efficiency. The method for controlling a release information set for releasing a function from an application disabled status thereof, includes the steps of: instructing an operation for transferring the release information set from a first storage section, in which release information sets corresponding to the plurality of functions are stored, to a second storage section by selecting one of the plurality of functions provided in the apparatus; specifying the release information set to be transferred as instructed in the instructing step; reading out the release information set, specified in the specifying step, from the first storage section; storing the release information set, read in the reading step, in the second storage section.
    Type: Application
    Filed: September 3, 2004
    Publication date: March 17, 2005
    Applicant: Konica Minolta Photo Imaging, Inc.
    Inventors: Ryuji Uesugi, Tsuyoshi Haraguchi, Shunichi Kase, Hideaki Yamamoto, Toshiyuki Kikuchi
  • Patent number: 6835632
    Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline silicon layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: December 28, 2004
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Hiromi Shimamoto, Takashi Uchino, Takeo Shiba, Kazuhiro Ohnishi, Yoichi Tamaki, Takashi Kobayashi, Toshiyuki Kikuchi, Takahide Ikeda
  • Publication number: 20040228644
    Abstract: An image forming apparatus of the present invention includes a fixing device for fixing a toner image on a sheet with heat. A main and an auxiliary power supply feed power to the fixing device. A switching circuit selectively establishes a usual mode in which the main power supply is connected to the fixing device or an auxiliary mode in which the main and auxiliary power supplies both are connected to the fixing device. A control circuit causes the switching circuit to establish the auxiliary mode in the event of continuous fixation, controls, in the usual mode, the amount of power fed from the main power supply to the fixing device in accordance with the output of a temperature sensor responsive to the temperature of the fixing device, and controls, in the auxiliary mode, the amount of power fed from the main and auxiliary power supplies to the fixing device without regard to the output of the temperature sensor.
    Type: Application
    Filed: June 19, 2003
    Publication date: November 18, 2004
    Inventor: Toshiyuki Kikuchi
  • Publication number: 20040131397
    Abstract: A photoreceptor transfers a first image to a first side of a paper, an intermediate transfer belt transfers a second image to a second side of the paper. The intermediate transfer belt also conveys the paper. A conveying unit directly conveys the paper, with the images, to a heating unit that fixes the images. The paper is slowly conveyed in the heating unit as compared to when it is conveyed by the belt.
    Type: Application
    Filed: September 22, 2003
    Publication date: July 8, 2004
    Inventor: Toshiyuki Kikuchi
  • Patent number: 6649487
    Abstract: A method of manufacturing a semiconductor integrated circuit device according to this invention, comprises a step of forming in a semiconductor substrate a deep groove for trench isolation with an aspect ratio of greater than 1, a step of burying a first insulating film in the deep groove in such a way that a shallow groove with an aspect ratio of not greater than 1 remains, and a step of depositing a second insulating film over the semiconductor substrate and then removing the upper portion of the second insulating film to planarize the upper surface of the second insulating film buried in the shallow groove in such a way that the upper surface of the second insulating film is almost flush with the surface surrounding the shallow groove.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: November 18, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hashimoto, Yoshifumi Ohnishi, Toshiyuki Kikuchi
  • Publication number: 20030207544
    Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline silicon layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
    Type: Application
    Filed: June 13, 2003
    Publication date: November 6, 2003
    Inventors: Hiromi Shimamoto, Takashi Uchino, Takeo Shiba, Kazuhiro Ohnishi, Yoichi Tamaki, Takashi Kobayashi, Toshiyuki Kikuchi, Takahide Ikeda
  • Patent number: 6610569
    Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the polycrystalline first silicon layer has a positive in temperature dependence of resist while the second polycrystalline layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
    Type: Grant
    Filed: August 28, 2000
    Date of Patent: August 26, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering Co., Ltd.
    Inventors: Hiromi Shimamoto, Takashi Uchino, Takeo Shiba, Kazuhiro Ohnishi, Yoichi Tamaki, Takashi Kobayashi, Toshiyuki Kikuchi, Takahide Ikeda
  • Patent number: 6524924
    Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistances while the second polycrystalline layer has a negative temperature dependance of resistance, or vise versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: February 25, 2003
    Assignees: Hitachi, Ltd., Hitachi Device Engineering
    Inventors: Hiromi Shimamoto, Takashi Uchino, Takeo Shiba, Kazuhiro Ohnishi, Yoichi Tamaki, Takashi Kobayashi, Toshiyuki Kikuchi, Takahide Ikeda
  • Patent number: 6511554
    Abstract: The present invention relates to stainless spheroidal carbide cast iron material is such: comprises iron (Fe) as its main component, C 0.6˜4.0% and V 4˜15% as its necessary components, P 0.01˜0.15%, S 0.01˜0.05% Al 0.05˜1.0%, and Mg 0.01˜0.2% as gas (hydrogen) bubble assistants, and Si 0.2˜4.5%, Cr 13˜30%, Mn 0.2˜3.0%, and Ni and/or Co 4˜15% as anticorrosion matrix formers, and according to the case of necessary, alloy elements 0.1˜1.
    Type: Grant
    Filed: July 5, 2001
    Date of Patent: January 28, 2003
    Inventors: Yutaka Kawano, Shigenori Nishiuchi, Satoru Yamamoto, Seisuke Sugahara, Toshiyuki Kikuchi
  • Patent number: 6432799
    Abstract: A method of manufacturing a semiconductor integrated circuit device according to this invention, comprises a step of forming in a semiconductor substrate a deep groove for trench isolation with an aspect ratio of greater than 1, a step of burying a first insulating film in the deep groove in such a way that a shallow groove with an aspect ratio of not greater than 1 remains, and a step of depositing a second insulating film over the semiconductor substrate and then removing the upper portion of the second insulating film to planarize the upper surface of the second insulating film buried in the shallow groove in such a way that the upper surface of the second insulating film is almost flush with the surface surrounding the shallow groove.
    Type: Grant
    Filed: November 24, 1999
    Date of Patent: August 13, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hashimoto, Yoshifumi Ohnishi, Toshiyuki Kikuchi
  • Publication number: 20020102815
    Abstract: A method of manufacturing a semiconductor integrated circuit device according to this invention, comprises a step of forming in a semiconductor substrate a deep groove for trench isolation with an aspect ratio of greater than 1, a step of burying a first insulating film in the deep groove in such a way that a shallow groove with an aspect ratio of not greater than 1 remains, and a step of depositing a second insulating film over the semiconductor substrate and then removing the upper portion of the second insulating film to planarize the upper surface of the second insulating film buried in the shallow groove in such a way that the upper surface of the second insulating film is almost flush with the surface surrounding the shallow groove.
    Type: Application
    Filed: January 17, 2002
    Publication date: August 1, 2002
    Inventors: Takashi Hashimoto, Yoshifumi Ohnishi, Toshiyuki Kikuchi
  • Patent number: 6406563
    Abstract: The present invention relates to stainless spheroidal carbide cast iron is such: comprises Fe as its main component;, C 0.6˜4.0% and V 4˜15% as its necessary components, P 0.01˜0.15%, S 0.01˜0.05%, and Al 0.05˜1.0% as bubble assistants, and Ni 4˜15%, Si 0.2˜4.5%, Cr 13˜30%, and Mn 0.2˜1.5% as anticorrosion matrix formers in weight %; produced by the process that minute spheroidal space of gas (hydrogen) bubble is dispersed substantially equally into molten metal positively by high temperature melting at 1950˜2073 K which is the bubbling reaction temperature, and spheroidal vanadium carbide of a covalent bond is crystallized inside of the spheroidal space, which has special characteristics such as corrosion-resistance, heat-resistance, abrasion-resistance, toughness and processing ability.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: June 18, 2002
    Inventors: Yutaka Kawano, Shigenori Nishiuchi, Satoru Yamamoto, Seisuke Sugahara, Toshiyuki Kikuchi
  • Patent number: 6368087
    Abstract: A scroll-type compressor includes a fixed and an orbiting scroll each having an end plate and a spiral element on the end plate and interfits with each other. A first transition line at a widened-starting portion of the spiral element between an interior wall and a tip surface comprises a first upper arc connecting to an upper, interior involute wall starting point and a second upper arc connecting to an upper, exterior involute wall starting point and a straight line. A second transition line at the widened-starting portion between the interior wall and a base surface comprises a first lower arc connecting to a lower, interior involute wall starting point and a second lower arc connecting a lower, exterior involute wall starting point and a straight line.
    Type: Grant
    Filed: February 7, 2001
    Date of Patent: April 9, 2002
    Assignee: Sanden Corporation
    Inventors: Toshiyuki Kikuchi, Ko Tsukamoto
  • Publication number: 20010023717
    Abstract: The present invention relates to stainless spheroidal carbide cast iron is such: comprises Fe as its main component;, C 0.6˜4.0% and V 4˜15% as its necessary components, P 0.01˜0.15%, S 0.01˜0.05%, and Al 0.05˜1.0% as bubble assistants, and Ni 4˜15%, Si 0.2˜4.5%, Cr 13˜30%, and Mn 0.2˜1.5% as anticorrosion matrix formers in weight %; produced by the process that minute spheroidal space of gas (hydrogen) bubble is dispersed substantially equally into molten metal positively by high temperature melting at 1950˜2073 K which is the bubbling reaction temperature, and spheroidal vanadium carbide of a covalent bond is crystallized inside of the spheroidal space, which has special characteristics such as corrosion-resistance, heat-resistance, abrasion-resistance, thoughness and processing ability.
    Type: Application
    Filed: February 26, 2001
    Publication date: September 27, 2001
    Inventors: Yutaka Kawano, Shigenori Nishiuchi, Satoru Yamamoto, Seisuke Sugahara, Toshiyuki Kikuchi
  • Publication number: 20010018028
    Abstract: A scroll-type compressor includes a fixed and an orbiting scroll each having an end plate and a spiral element on the end plate and interfits with each other. A first transition line at a widened-starting portion of the spiral element between an interior wall and a tip surface comprises a first upper arc connecting to an upper, interior involute wall starting point and a second upper arc connecting to an upper, exterior involute wall starting point and a straight line. A second transition line at the widened-starting portion between the interior wall and a base surface comprises a first lower arc connecting to a lower, interior involute wall starting point and a second lower arc connecting a lower, exterior involute wall starting point and a straight line.
    Type: Application
    Filed: February 7, 2001
    Publication date: August 30, 2001
    Inventors: Toshiyuki Kikuchi, Ko Tsukamoto
  • Patent number: 6200115
    Abstract: A ball coupling constituting a rotation preventing mechanism (77) includes a first annular race section (59, 79) having a thrust ball transfer surface formed on one surface thereof, a second annular race section (61, 81) having a ball transfer surface formed on one surface thereof confronting the one surface of the first race section and thrust balls (67) interposed between the first and second race sections (79, 81). At least one of the first and second race sections has a cross sectional shape such that the central portion of the other surface (87) thereof confronting the one surface is a recessed groove (89). A scroll type compressor includes the rotation preventing mechanism on the back surface of a movable scroll member.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: March 13, 2001
    Assignee: Sanden Corporation
    Inventor: Toshiyuki Kikuchi
  • Patent number: 6149412
    Abstract: A rotation preventing mechanism is composed of a thrust ball bearing including a first race section having an annular shape, a second race section disposed at an eccentric position in confrontation with the first race section at intervals and thrust balls interposed between the first and second race sections. The first and second race sections have ball accommodating grooves formed at the confronting surfaces thereof, respectively. Each of the ball accommodating grooves includes a central portion and a groove bottom portion around it. When the radius of curvature of each thrust ball is represented by RB, the radius of curvature of the groove bottom portion on an inner side is represented by Rin and the radius of curvature thereof in an outer side is represented by Rout, and the ball accommodating groove has a shape satisfying a formula RB.ltoreq.Rin<Rout.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: November 21, 2000
    Assignee: Sanden Corporation
    Inventor: Toshiyuki Kikuchi
  • Patent number: 6133094
    Abstract: The present invention provides a polycrystalline silicon conducting structure (e.g., a resistor) whose resistance value is controlled, and can be less variable and less dependent on temperature with respect to any resistant value, and a process of producing the same. Use is made of at least a two-layer structure including a first polycrystalline silicon layer of large crystal grain size and a second polycrystalline silicon layer of small crystal grain size, and the first polycrystalline silicon layer has a positive temperature dependence of resistance while the second polycrystalline layer has a negative temperature dependence of resistance, or vice versa. Moreover, the polycrystalline silicon layer of large grain size can be formed by high dose ion implantation and annealing, or by depositing the layers by chemical vapor deposition at different temperatures so as to form large-grain and small-grain layers.
    Type: Grant
    Filed: July 28, 1998
    Date of Patent: October 17, 2000
    Assignees: Hitachi Ltd, Hitachi Device Engineering Co.
    Inventors: Hiromi Shimamoto, Takashi Uchino, Takeo Shiba, Kazuhiro Ohnishi, Yoichi Tamaki, Takashi Kobayashi, Toshiyuki Kikuchi, Takahide Ikeda
  • Patent number: 6068458
    Abstract: A scroll-type fluid displacement apparatus comprises a housing having an inlet port and outlet port and a fluid displacement mechanism having a first end and a second end disposed within the housing for displacing a fluid from the inlet port to the outlet port. The fluid displacement mechanism is fixed to the housing by a plurality of fixing members. A discharge chamber is defined by the first end of the displacement mechanism and the housing. A matching surface is defined between the first end of the fluid displacement mechanism and the inner surface of the housing. A sealing device is disposed in the matching surface for sealing the matching surface between adjacent fixing members. Thereby, the scroll-type fluid displacement apparatus has superior axial sealing of the discharge chamber while simultaneously achieving simplifying manufacturing.
    Type: Grant
    Filed: January 26, 1998
    Date of Patent: May 30, 2000
    Assignee: Sanden Corporation
    Inventor: Toshiyuki Kikuchi
  • Patent number: 6027983
    Abstract: A method of manufacturing a semiconductor integrated circuit device according to this invention, comprises a step of forming in a semiconductor substrate a deep groove for trench isolation with an aspect ratio of greater than 1, a step of burying a first insulating film in the deep groove in such a way that a shallow groove with an aspect ratio of not greater than 1 remains, and a step of depositing a second insulating film over the semiconductor substrate and then removing the upper portion of the second insulating film to planarize the upper surface of the second insulating film buried in the shallow groove in such a way that the upper surface of the second insulating film is almost flush with the surface surrounding the shallow groove.
    Type: Grant
    Filed: May 31, 1995
    Date of Patent: February 22, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hashimoto, Yoshifumi Ohnishi, Toshiyuki Kikuchi