Patents by Inventor Toshiyuki Mine

Toshiyuki Mine has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12276573
    Abstract: A water leakage position estimation system(S) configured to estimate a water leakage position in a pipe network including a plurality of pipe routes includes a water leakage determination unit (11) and an estimation unit (12e). The water leakage determination unit (11) determines whether a water leakage occurs in the pipe network based on a measured value of a vibration related to the pipe network that is acquired by a water leakage sensor (2) provided in the pipe network. The estimation unit (12e) estimates, when the water leakage determination unit (11) determines that a water leakage occurs in the pipe network, a pipe route in which the water leakage occurs from the plurality of pipe routes based on the measured value and a predicted value of the vibration for each pipe route acquirable by the water leakage sensor (2) when a water leakage occurs in each pipe route.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: April 15, 2025
    Assignee: HITACHI, LTD.
    Inventors: Yuudai Kamada, Toshiyuki Mine
  • Publication number: 20230409949
    Abstract: One preferred aspect of the invention is a quantum computer of a semiconductor, including: a semiconductor crystalline substrate; a gate electrode array structure formed on a surface of the semiconductor crystalline substrate; and a reservoir unit that is a carrier supply unit, in which a classic potential barrier is formed in the semiconductor crystalline substrate by controlling an applied voltage to the gate electrode array structure, and a charge supplied from the reservoir unit is transported into the classic potential barrier.
    Type: Application
    Filed: February 28, 2023
    Publication date: December 21, 2023
    Inventors: Takeru UTSUGI, Noriyuki LEE, Ryuta TSUCHIYA, Digh HISAMOTO, Toshiyuki MINE
  • Publication number: 20230194378
    Abstract: A water leakage position estimation system (S) configured to estimate a water leakage position in a pipe network including a plurality of pipe routes includes a water leakage determination unit (11) estimation unit (12e) . The water leakage determination unit (11) determines whether a water leakage occurs in the pipe network based on a measured value of a vibration related to the pipe network that is acquired by a water leakage sensor (2) provided in the pipe network. The estimation unit (12e) estimates, when the water leakage determination unit (11) determines that a water leakage occurs in the pipe network, a pipe route in which the water leakage occurs from the plurality of pipe routes based on the measured value and a predicted value of the vibration for each pipe route acquirable by the water leakage sensor (2) when a water leakage occurs in each pipe route.
    Type: Application
    Filed: March 16, 2021
    Publication date: June 22, 2023
    Inventors: Yuudai KAMADA, Toshiyuki MINE
  • Publication number: 20220271213
    Abstract: A semiconductor device includes an active region famed in a semiconductor layer formed on an insulating film famed in a semiconductor substrate and having a first extension portion extending in a first direction and a second extension portion extending in a second direction intersecting with the first direction, a first diffusion layer electrode of a first conductivity type provided in the first extension portion, second and third diffusion layer electrodes of a second conductivity type provided in the second extension portion so as to interpose a first connecting portion connecting the first extension portion and the second extension portion, a first gate electrode famed on the first extension portion between the first diffusion layer electrode and the first connecting portion through an insulating film famed on the semiconductor layer, and a second gate electrode famed on the first connecting portion through the insulating film famed on the semiconductor layer.
    Type: Application
    Filed: February 2, 2022
    Publication date: August 25, 2022
    Inventors: Digh HISAMOTO, Satoru AKIYAMA, Toshiyuki MINE, Noriyuki LEE, Gou SHINKAI, Shinichi SAITO, Ryuta TSUCHIYA
  • Patent number: 10852209
    Abstract: A water leak sensing system includes: a plurality of sensor terminals including a sensor installed in a pipeline of a water supply network; and a computer that senses a water leak from the pipeline based on detection signal data of the plurality of sensors of the plurality of sensor terminals, and outputs a result. The pipeline is either a first pipeline not covered by a pipe covering member (PE sleeve) or a second pipeline covered by the pipe covering member. The sensor can detect a signal at a first distance from a water leak point when the water leak occurs in the first pipeline, and detect a signal at a second distance, longer than the first distance, from the water leak point when the water leak occurs in the second pipeline.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: December 1, 2020
    Assignee: HITACHI, LTD.
    Inventors: Toshiyuki Mine, Yuudai Kamada, Tetsuya Ishimaru, Kazuo Ono
  • Patent number: 10737937
    Abstract: A redeposited material is removed so as to electrically observe a microelement without causing foreign matters or metal contamination. An FIB device (charged particle beam device) includes an FIB barrel which discharges the focused ion beam (charged particle beam), a stage which holds a sample (substrate), a microcurrent measuring device (current measuring unit) which measures a leakage current from the sample, and a timer (time measuring unit) which measures a time to emit the focused ion beam and a time to measure the leakage current. Further, the FIB device includes a system control unit (control unit) which synchronizes a time to emit the focused ion beam and a time to measure the leakage current by the microcurrent measuring device.
    Type: Grant
    Filed: November 7, 2018
    Date of Patent: August 11, 2020
    Assignee: HITACHI, LTD.
    Inventors: Toshiyuki Mine, Keiji Watanabe, Koji Fujisaki, Masaharu Kinoshita, Masatoshi Morishita, Daisuke Ryuzaki
  • Patent number: 10662059
    Abstract: The invention is to reduce non-uniformity of a processing shape over a wide range of a single field-of-view. The invention is directed to a method of processing micro electro mechanical systems with a first step and a second step in a processing apparatus including an irradiation unit that irradiates a sample with a charged particle beam, a shape measuring unit that measures a shape of the sample, and a control unit. In the first step, the irradiation unit irradiates a plurality of single field-of-view points with the charged particle beam in a first region of the sample, the shape measuring unit measures the shape of a spot hole formed in the first region of the sample, and the control unit sets, based on measurement results of the shape of the spot hole, a scan condition of the charged particle beam or a forming mask of the charged particle beam at each of the single field-of-view points.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: May 26, 2020
    Assignee: HITACHI, LTD.
    Inventors: Keiji Watanabe, Hiroyasu Shichi, Misuzu Sagawa, Toshiyuki Mine, Daisuke Ryuzaki
  • Publication number: 20200103306
    Abstract: A water leak sensing system includes: a plurality of sensor terminals including a sensor installed in a pipeline of a water supply network; and a computer that senses a water leak from the pipeline based on detection signal data of the plurality of sensors of the plurality of sensor terminals, and outputs a result. The pipeline is either a first pipeline not covered by a pipe covering member (PE sleeve) or a second pipeline covered by the pipe covering member. The sensor can detect a signal at a first distance from a water leak point when the water leak occurs in the first pipeline, and detect a signal at a second distance, longer than the first distance, from the water leak point when the water leak occurs in the second pipeline.
    Type: Application
    Filed: August 30, 2019
    Publication date: April 2, 2020
    Inventors: Toshiyuki MINE, Yuudai KAMADA, Tetsuya ISHIMARU, Kazuo ONO
  • Publication number: 20190292046
    Abstract: A redeposited material is removed so as to electrically observe a microelement without causing foreign matters or metal contamination. An FIB device (charged particle beam device) includes an FIB barrel which discharges the focused ion beam (charged particle beam), a stage which holds a sample (substrate), a microcurrent measuring device (current measuring unit) which measures a leakage current from the sample, and a timer (time measuring unit) which measures a time to emit the focused ion beam and a time to measure the leakage current. Further, the FIB device includes a system control unit (control unit) which synchronizes a time to emit the focused ion beam and a time to measure the leakage current by the microcurrent measuring device.
    Type: Application
    Filed: November 7, 2018
    Publication date: September 26, 2019
    Applicant: HITACHI, LTD.
    Inventors: Toshiyuki MINE, Keiji WATANABE, Koji FUJISAKI, Masaharu KINOSHITA, Masatoshi MORISHITA, Daisuke RYUZAKI
  • Patent number: 10276341
    Abstract: The present invention is directed to a technique for correcting processing positional deviation and processing size deviation during processing by a focused ion beam device. A focused ion beam device control method includes forming a first processed figure on the surface of a specimen through the application of a focused ion beam in a first processing range of vision; determining the position of a next, second processing range of vision based on the outer dimension of the first processed figure; and moving a stage to the position of the second processing range of vision thus determined. Further, the control method includes forming a second processed figure through the application of the focused ion beam in a second processing range of vision.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: April 30, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Keiji Watanabe, Toshiyuki Mine, Hiroyasu Shichi, Masatoshi Morishita
  • Publication number: 20190062157
    Abstract: The invention is to reduce non-uniformity of a processing shape over a wide range of a single field-of-view. The invention is directed to a method of processing micro electro mechanical systems with a first step and a second step in a processing apparatus including an irradiation unit that irradiates a sample with a charged particle beam, a shape measuring unit that measures a shape of the sample, and a control unit. In the first step, the irradiation unit irradiates a plurality of single field-of-view points with the charged particle beam in a first region of the sample, the shape measuring unit measures the shape of a spot hole formed in the first region of the sample, and the control unit sets, based on measurement results of the shape of the spot hole, a scan condition of the charged particle beam or a forming mask of the charged particle beam at each of the single field-of-view points.
    Type: Application
    Filed: June 22, 2018
    Publication date: February 28, 2019
    Inventors: Keiji WATANABE, Hiroyasu SHICHI, Misuzu SAGAWA, Toshiyuki MINE, Daisuke RYUZAKI
  • Publication number: 20180261423
    Abstract: The present invention is directed to a technique for correcting processing positional deviation and processing size deviation during processing by a focused ion beam device. A focused ion beam device control method includes forming a first processed figure on the surface of a specimen through the application of a focused ion beam in a first processing range of vision; determining the position of a next, second processing range of vision based on the outer dimension of the first processed figure; and moving a stage to the position of the second processing range of vision thus determined. Further, the control method includes forming a second processed figure through the application of the focused ion beam in a second processing range of vision.
    Type: Application
    Filed: March 1, 2018
    Publication date: September 13, 2018
    Inventors: Keiji WATANABE, Toshiyuki MINE, Hiroyasu SHICHI, Masatoshi MORISHITA
  • Patent number: 9673339
    Abstract: In a non-volatile memory in which writing/erasing is performed by changing a total charge amount by injecting electrons and holes into a silicon nitride film serving as a charge accumulation layer, in order to realize a high efficiency of a hole injection from a gate electrode, the gate electrode of a memory cell comprises a laminated structure made of a plurality of polysilicon films with different impurity concentrations, for example, a two-layered structure comprising a p-type polysilicon film with a low impurity concentration and a p?-type polysilicon film with a high impurity concentration deposited thereon.
    Type: Grant
    Filed: August 28, 2015
    Date of Patent: June 6, 2017
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Itaru Yanagi, Toshiyuki Mine, Hirotaka Hamamura, Digh Hisamoto, Yasuhiro Shimamoto
  • Patent number: 9570601
    Abstract: Provided is a technique of securing reliability of a gate insulating film, as much as in a Si power MOSFET, in a semiconductor device in which a semiconductor material having a larger band gap than silicon is used, and which is typified by, for example, an SiC power MOSFET. In order to achieve this object, in the in the SiC power MOSFET, the gate electrode GE is formed in contact with the gate insulating film GOX, and is formed of the polycrystalline silicon film PF1 having the thickness equal to or smaller than 200 nm, and the polycrystalline silicon film PF2 formed in contact with the polycrystalline silicon film PF1, and having any thickness.
    Type: Grant
    Filed: July 16, 2013
    Date of Patent: February 14, 2017
    Assignee: Hitachi, Ltd.
    Inventors: Yuki Mori, Toshiyuki Mine, Hiroshi Miki, Mieko Matsumura, Hirotaka Hamamura
  • Publication number: 20160149025
    Abstract: Provided is a technique of securing reliability of a gate insulating film, as much as in a Si power MOSFET, in a semiconductor device in which a semiconductor material having a larger band gap than silicon is used, and which is typified by, for example, an SiC power MOSFET. In order to achieve this object, in the in the SiC power MOSFET, the gate electrode GE is formed in contact with the gate insulating film GOX, and is formed of the polycrystalline silicon film PF1 having the thickness equal to or smaller than 200 nm, and the polycrystalline silicon film PF2 formed in contact with the polycrystalline silicon film PF1, and having any thickness.
    Type: Application
    Filed: July 16, 2013
    Publication date: May 26, 2016
    Inventors: Yuki MORI, Toshiyuki MINE, Hiroshi MIKI, Mieko MATSUMURA, HIrotaka HAMAMURA
  • Patent number: 9318558
    Abstract: The present invention is to cause high channel mobility and a high threshold voltage to coexist in a SiC-MOSFET power device which uses a SiC substrate. The SiC MOSFET which is provided with a layered insulation film having electric charge trap characteristics on a gate insulation film has an irregular threshold voltage in a channel length direction of the SiC MOSFET, and in particular, has a shorter area having a maximum threshold voltage in the channel length direction compared to an area having other threshold voltages.
    Type: Grant
    Filed: July 9, 2012
    Date of Patent: April 19, 2016
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Mine, Yasuhiro Shimamoto, Hirotaka Hamamura
  • Publication number: 20150372151
    Abstract: In a non-volatile memory in which writing/erasing is performed by changing a total charge amount by injecting electrons and holes into a silicon nitride film serving as a charge accumulation layer, in order to realize a high efficiency of a hole injection from a gate electrode, the gate electrode of a memory cell comprises a laminated structure made of a plurality of polysilicon films with different impurity concentrations, for example, a two-layered structure comprising a p-type polysilicon film with a low impurity concentration and a p?-type polysilicon film with a high impurity concentration deposited thereon.
    Type: Application
    Filed: August 28, 2015
    Publication date: December 24, 2015
    Inventors: Itaru YANAGI, Toshiyuki MINE, Hirotaka HAMAMURA, Digh HISAMOTO, Yasuhiro SHIMAMOTO
  • Patent number: 9214516
    Abstract: In a SiC-MOSFET power device for which a SiC substrate is used, a laminated insulating film having a charge-trapping characteristic is employed as a gate insulating film of the SiC-DiMOSFET, and charges are injected into the laminated insulating film, thereby suppressing a change in the gate threshold voltage.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: December 15, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Toshiyuki Mine, Yasuhiro Shimamoto, Hirotaka Hamamura
  • Publication number: 20150179744
    Abstract: The present invention is to cause high channel mobility and a high threshold voltage to coexist in a SiC-MOSFET power device which uses a SiC substrate. The SiC MOSFET which is provided with a layered insulation film having electric charge trap characteristics on a gate insulation film has an irregular threshold voltage in a channel length direction of the SiC MOSFET, and in particular, has a shorter area having a maximum threshold voltage in the channel length direction compared to an area having other threshold voltages.
    Type: Application
    Filed: July 9, 2012
    Publication date: June 25, 2015
    Applicant: HITACHI , LTD.
    Inventors: Toshiyuki Mine, Yasuhiro Shimamoto, Hirotaka Hamamura
  • Publication number: 20150044840
    Abstract: In order to provide a method for producing a SiC-MOSFET capable of increasing Vth without deteriorating channel mobility, before forming a gate insulation film, (a) silicon carbide substrate is oxidized by a low temperature oxidation method represented by plasma oxidation to form a silicon oxide film. Next, (b) the silicon oxide film is removed. After repeating the processes (a) and (b) once or more, (c) the gate insulation film is formed.
    Type: Application
    Filed: March 30, 2012
    Publication date: February 12, 2015
    Applicant: Hitachi, Ltd.
    Inventors: Keisuke Kobayashi, Toshiyuki Mine, Hirotaka Hamamura