Patents by Inventor Toyohiro Chikyow

Toyohiro Chikyow has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12247297
    Abstract: The present invention provides: a multilayer film structure which has high crystallinity and planarity; and a method for producing this multilayer film structure. This multilayer film structure is provided with: an Si (111) substrate; a first thin film that is arranged on the Si (111) substrate, while being formed of a nitride material and/or aluminum; and a second thin film that is arranged on the first thin film, while being formed of a nitride material. An amorphous layer having a thickness of 0 nm or more but less than 1.0 nm are present on the Si (111) substrate; and the full width at half maximum (FWHM) of a rocking curve of the (0002) plane at the surface of this multilayer film structure is 1.50° or less.
    Type: Grant
    Filed: October 27, 2020
    Date of Patent: March 11, 2025
    Assignees: TOSOH CORPORATION, National Institute for Materials Science
    Inventors: Yuya Tsuchida, Yuya Suemoto, Yoshihiro Ueoka, Masami Mesuda, Hideto Kuramochi, Takahiro Nagata, Liwen Sang, Toyohiro Chikyow
  • Publication number: 20240401184
    Abstract: A laminate includes a structure in which a Si (111) substrate, an oxygen-containing aluminum nitride film, and a gallium nitride film are laminated. The laminate is obtained by a production method for a laminate that is characterized by having a structure in which a Si (111) substrate, an oxygen-containing aluminum nitride film, and a gallium nitride film are laminated, the production method having: an AlN film-formation step in which an aluminum nitride film is formed on the Si (111) substrate and an Si substrate including an aluminum nitride film is obtained; an oxidation step in which the Si substrate including the aluminum nitride film is treated in an oxidizing atmosphere and a Si substrate including an oxygen-containing aluminum nitride film is obtained; and a GaN film-formation step in which a gallium nitride film is formed on the Si substrate including the oxygen-containing aluminum nitride film.
    Type: Application
    Filed: October 6, 2022
    Publication date: December 5, 2024
    Inventors: Yuya SUEMOTO, Yoshihiro UEOKA, Masami MESUDA, Takahiro NAGATA, Liwen SANG, Toyohiro CHIKYOW
  • Publication number: 20240158954
    Abstract: The present invention provides: a multilayer film structure which has high crystallinity and planarity; and a method for producing this multilayer film structure. This multilayer film structure is provided with: an Si (111) substrate; a first thin film that is arranged on the Si (111) substrate, while being formed of a nitride material and/or aluminum; and a second thin film that is arranged on the first thin film, while being formed of a nitride material. An amorphous layer having a thickness of 0 nm or more but less than 1.0 nm are present on the Si (111) substrate; and the full width at half maximum (FWHM) of a rocking curve of the (0002) plane at the surface of this multilayer film structure is 1.50° or less.
    Type: Application
    Filed: October 27, 2020
    Publication date: May 16, 2024
    Applicants: TOSOH CORPORATION, National Institute for Materials Science
    Inventors: Yuya TSUCHIDA, Yuya SUEMOTO, Yoshihiro UEOKA, Masami MESUDA, Hideto KURAMOCHI, Takahiro NAGATA, Liwen SANG, Toyohiro CHIKYOW
  • Publication number: 20140060887
    Abstract: A transparent electric conductor includes titanium oxide doped with aluminum and at least one other dopant: either in the form Ti1-a-bAlaXbOy, where X is a dopant or a mixture of dopants selected from the group consisting of Nb, Ta, W, Mo, V, Cr, Fe, Zr, Co, Sn, Mn, Er, Ni, Cu, Zn and Sc, a is in the range 0.01 to 0.50, and b is in the range 0.01 to 0.15; or in the form Ti1-aAlaFcOy-c, where a is in the range 0.01 to 0.50, and c is in the range 0.01 to 0.10. With the above composition, the electrical conductivity and the light transmittance are suitable for use of the transparent electric conductor in various applications, in particular as a transparent electrode of an electronic device.
    Type: Application
    Filed: April 26, 2012
    Publication date: March 6, 2014
    Applicants: NATIONAL INSTITUTE FOR MATERIALS SCIENCE, SAINT-GOBAIN GLASS FRANCE
    Inventors: Laura Jane Singh, David Nicolas, Toyohiro Chikyow, Seunghwan Park, Naoto Umezawa
  • Publication number: 20050179034
    Abstract: The invention provides a thin film device where ionic crystals are epitaxially grown on a Si single crystal substrate through a proper buffer layer, and its for fabrication method. A ZnS layer is first deposited on a Si single crystal substrate. Ionic crystal thin films (an n-GaN layer, a GaN layer, and a p-GaN layer) are deposited thereon. The ZnS thin film is an oriented film excellent in crystallinity and has excellent surface flatness. When ZnS can be once epitaxially grown on the Si single crystal substrate, the ionic crystal thin films can be easily epitaxially grown subsequently. Therefore, ZnS is formed to be a buffer layer, whereby even ionic crystals having differences in lattice constants from Si can be easily epitaxially grown in an epitaxial thin film with few lattice defects on the Si single crystal substrate. The characteristics of a thin film device utilizing it can be enhanced.
    Type: Application
    Filed: April 4, 2005
    Publication date: August 18, 2005
    Applicants: National Institute for Materials Science, Tokyo Institute of Technology, Fuji Electric Corporate Research and Development, Ltd.
    Inventors: Toyohiro Chikyow, Hideomi Koinuma, Masashi Kawasaki, Yoo Zo, Yoshinori Konishi, Yoshiyuki Yonezawa
  • Patent number: 6888156
    Abstract: The invention provides a thin film device where ionic crystals are epitaxially grown on a Si single crystal substrate through a proper buffer layer, and its for fabrication method. A ZnS layer is first deposited on a Si single crystal substrate. Ionic crystal thin films (an n-GaN layer, a GaN layer, and a p-GaN layer) are deposited thereon. The ZnS thin film is an oriented film excellent in crystallinity and has excellent surface flatness. When ZnS can be once epitaxially grown on the Si single crystal substrate, the ionic crystal thin films can be easily epitaxially grown subsequently. Therefore, ZnS is formed to be a buffer layer, whereby even ionic crystals having differences in lattice constants from Si can be easily epitaxially grown in an epitaxial thin film with few lattice defects on the Si single crystal substrate. The characteristics of a thin film device utilizing it can be enhanced.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: May 3, 2005
    Assignees: National Institute for Materials Science, Tokyo Institute of Technology, Fuji Electric Corporate Research & Development, Ltd.
    Inventors: Toyohiro Chikyow, Hideomi Koinuma, Masashi Kawasaki, Yoo Young Zo, Yoshinori Konishi, Yoshiyuki Yonezawa
  • Patent number: 6855972
    Abstract: A composite integrated circuit is characterized in that to put an oxide thin film into practical use as an electronic device, a highly crystalline oxide thin film is grown on a silicon substrate. A MOS circuit and a thin film capacitor are formed independently, and the two substrates are laminated using an epoxy resin. They are connected through buried wiring, thereby constituting a composite circuit package. As a second substrate 1a, a (110) plane orientation silicon substrate is used which differs from the IC substrate with a (100) plane. On the (110) silicon substrate after the termination processing, a dielectric layer is film deposited, followed by forming an upper electrode, and by forming a thin film coil. Insulating magnetic gel is filled between coil wires and its upper portion. Thus, the fabrication process of the thin film coil and the composite integrated circuit is completed.
    Type: Grant
    Filed: June 11, 2002
    Date of Patent: February 15, 2005
    Assignees: National Institute for Materials Science, Tokyo Institute of Technology, Fuji Electric Corporate Research and Development
    Inventors: Hideomi Koinuma, Masashi Kawasaki, Toyohiro Chikyow, Yoshiyuki Yonezawa, Yoshinori Konishi
  • Publication number: 20030006406
    Abstract: The invention provides a thin film device where ionic crystals are epitaxially grown on a Si single crystal substrate through a proper buffer layer, and its for fabrication method. A ZnS layer is first deposited on a Si single crystal substrate. Ionic crystal thin films (an n-GaN layer, a GaN layer, and a p-GaN layer) are deposited thereon. The ZnS thin film is an oriented film excellent in crystallinity and has excellent surface flatness. When ZnS can be once epitaxially grown on the Si single crystal substrate, the ionic crystal thin films can be easily epitaxially grown subsequently. Therefore, ZnS is formed to be a buffer layer, whereby even ionic crystals having differences in lattice constants from Si can be easily epitaxially grown in an epitaxial thin film with few lattice defects on the Si single crystal substrate. The characteristics of a thin film device utilizing it can be enhanced.
    Type: Application
    Filed: June 26, 2002
    Publication date: January 9, 2003
    Inventors: Toyohiro Chikyow, Hideomi Koinuma, Masashi Kawasaki, Yoo Young Zo, Yoshinori Konishi, Yoshiyuki Yonezawa
  • Publication number: 20030001232
    Abstract: A composite integrated circuit is characterized in that to put an oxide thin film into practical use as an electronic device, a highly crystalline oxide thin film is grown on a silicon substrate. A MOS circuit and a thin film capacitor are formed independently, and the two substrates are laminated using an epoxy resin. They are connected through buried wiring, thereby constituting a composite circuit package. As a second substrate 1 a, a (110) plane orientation silicon substrate is used which differs from the IC substrate with a (100) plane. On the (110) silicon substrate after the termination processing, a dielectric layer is film deposited, followed by forming an upper electrode, and by forming a thin film coil. Insulating magnetic gel is filled between coil wires and its upper portion. Thus, the fabrication process of the thin film coil and the composite integrated circuit is completed.
    Type: Application
    Filed: June 11, 2002
    Publication date: January 2, 2003
    Inventors: Hideomi Koinuma, Masashi Kawasaki, Toyohiro Chikyow, Yoshiyuki Yonezawa, Yoshinori Konishi