Abstract: A system may include a plurality of processing cores including at least a first processing core and a second processing core, a shared memory communicatively coupled to and accessible by each of the plurality of processing cores, a global monitor communicatively coupled to each of the plurality of processing cores and configured to control exclusive accesses to memory by each of the plurality of processing cores, and a software architecture embodied in non-transitory computer-readable media and configured to, when read and executed by the multicore processor, partition a plurality of processing tasks between the first processing core and the second processing core.

Abstract: This disclosure relates to instrumenting of integrated circuits, and particularly with providing synchronized time stamps for logging data from multiple components. An example method includes injecting code in a read only memory (ROM) that performs the logging with time stamps. The method may include receiving, from a first component, data describing a first event with a first time stamp synchronized to a global clock; receiving, from a second component, data describing a second event with a second time stamp synchronized to the global clock; and generating a report comprising the first event and the second event, wherein the first event is synchronized with the second event. Other aspects are also disclosed.