Patents by Inventor Tsuneo Nakata

Tsuneo Nakata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8565227
    Abstract: The present invention provides a data communication technology which is capable of securing flexibly a bandwidth for a traffic that is generated and which enables effective use of access lines or wireless resource. A mobile router uses a plurality of communication means, retains a plurality of narrow band communication routes for communicating with the home agent, and configures a broad band communication route by using the plurality of the narrow band communication routes as a single logical communication route. This enables a bandwidth to be flexibly secured in accordance with the traffic which is generated in the mobile network. In this case, the home agent is enabled to effectively use the access lines by referring to the route information so as to determine the destination address. Furthermore, it is possible to save the wireless resource under the initiative of the user by dynamically connecting to an alternative line or disconnecting a line which is being used in response to a request of the user.
    Type: Grant
    Filed: May 21, 2004
    Date of Patent: October 22, 2013
    Assignee: NEC Corporation
    Inventors: Tsuneo Nakata, Masahiro Ono, Morihisa Momona, Kazuhiro Okanoue
  • Publication number: 20130219082
    Abstract: With the object of enabling data transfer between mobile routers without going through a home agent and establishing a connection to a destination mobile router even when mobile communication terminals equipped in the destination mobile router are changed at the time of initiating connection to the destination mobile router, a mobile router information management server has a mobile router registration information table that registers, for each mobile router, mobile router information that is reported from the mobile routers and that includes identification information of the mobile routers and identification information of mobile communication terminals equipped in the mobile routers, in response to inquiry information from a mobile router that includes identification information of another mobile router that is to be a communication destination, searches the mobile router registration information table, based on the identification information of the other mobile router, for mobile router information that in
    Type: Application
    Filed: September 14, 2011
    Publication date: August 22, 2013
    Applicant: NEC CORPORATION
    Inventors: Hirotoshi Mitomi, Tsuneo Nakata
  • Publication number: 20130080843
    Abstract: In particular embodiments, a method includes analyzing a binary decision diagram (BDD) representing a data stream from a sensor to determine a compression rate of the BDD and indicating a sensor malfunction in the sensor if the compression rate of the BDD deviates from a specified compression rate range.
    Type: Application
    Filed: September 23, 2011
    Publication date: March 28, 2013
    Applicant: Fujitsu Limited
    Inventors: Stergios Stergiou, Jawahar Jain, Tsuneo Nakata
  • Patent number: 8369364
    Abstract: A communication system including first, second, and third nodes interconnected via interconnect links, a primary path composed of an interconnect link between the first node and the third node, and a secondary path composed of an interconnect link between the first and second nodes and an interconnect link between the second and third nodes, wherein when the first node and the third node function as a transmitting node and a receiving node respectively, having a path multiplexing function to communicate with each other using bandwidths of a plurality of paths simultaneously, the first node transmits, to the second node, a path multiplexing request message for requesting communication with the third node, and when receiving the path multiplexing request message, the second node functions as a relay node and determines whether the primary path and the secondary path can be logically multiplexed by providing, to the first node, the bandwidth of the interconnect link between the second and third nodes, and if
    Type: Grant
    Filed: March 14, 2008
    Date of Patent: February 5, 2013
    Assignee: NEC Corporation
    Inventor: Tsuneo Nakata
  • Publication number: 20130003744
    Abstract: Provided is a communication node apparatus that can attempt optimal utilization of a communication resource of a communication interface mounted on each node apparatus. A communication node apparatus (transmission node apparatus 101) includes a plurality communication interfaces (transmission interfaces 201-1 and 201-2 and reception interfaces 202-1 and 202-2), enables communication that uses a plurality of communication paths with an opposing apparatus, and includes a means (reception interface aggregate calculation unit 204) for changing an aggregation of reception interfaces addressable as destinations for data to be transferred to the opposing apparatus via each of the plurality of transmission interfaces so as to maximize the communication performance using the plurality of communication paths simultaneously in response to a change in communication performance of each of the transmission interface and the reception interface.
    Type: Application
    Filed: March 7, 2011
    Publication date: January 3, 2013
    Inventor: Tsuneo Nakata
  • Publication number: 20120320780
    Abstract: In order to enable to judge validity of a measurement result of a transmission rate, a speed estimation method transmits a data packet and probe packets before and after the data packet to a measured section which is a target for measurement of a transmission rate, estimates a transmission rate of a measured section based on a first receiving interval which is a receiving interval between the probe packets transmitted through the measured section just before and immediately after the data packet and a data volume of the data packet, and determines validity of a transmission rate by comparing a second receiving interval which is a receiving interval between the probe packets which have passed the measured section continuously in a state that a data packet does not exist in between them in a measured section and a first receiving interval.
    Type: Application
    Filed: April 15, 2011
    Publication date: December 20, 2012
    Applicant: NEC CORPORATION
    Inventor: Tsuneo Nakata
  • Patent number: 8315843
    Abstract: An objective function can be mathematically approximated using a prescribed number of sample sets of design parameters and sets of a plurality of objective functions computed corresponding to them. A logical expression indicating a relation between or among arbitrary two or three objective functions of the plurality of mathematically approximated objective functions is computed as an inter-objective-function logical expression and a region that the arbitrary objective function values can take is displayed as a feasible region in an objective space corresponding to the arbitrary objective functions. Furthermore, a point or area in a design space corresponding to arbitrary design parameters corresponding to a point or area specified by a user in the displayed feasible region is displayed.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: November 20, 2012
    Assignee: Fujitsu Limited
    Inventors: Hirokazu Anai, Hitoshi Yanami, Tsuneo Nakata
  • Patent number: 8312400
    Abstract: A verification target register to be verified is specified from a configuration of a verification target circuit, and patterns requiring verification are extracted as a coverage standard with regard to the specified verification target register. When the patterns are extracted, a DIRW matrix is prepared to indicate possibly occurring state transitions among four states Declare, Initialize, Read, and Write in the register included in the verification target circuit, and used to decide two coverage standards, a matrix coverage standard and an implementation coverage standard.
    Type: Grant
    Filed: June 10, 2011
    Date of Patent: November 13, 2012
    Assignee: Fujitsu Limited
    Inventors: Ryosuke Oishi, Akio Matsuda, Koichiro Takayama, Tsuneo Nakata
  • Patent number: 8189593
    Abstract: Provided is a communication system in which a transmission path between communication nodes is multiplexed. A communication node transmitting packets decides the order of the packets to be transmitted through each transmission path on the assumption that an event that causes a state change to the transmission path occurs upon the start of the packet transmission, such that the packet reception order is not reversed at a communication node that receives the packets.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: May 29, 2012
    Assignee: NEC Corporation
    Inventor: Tsuneo Nakata
  • Patent number: 8139491
    Abstract: A scheduled transmission path of each packet to be transmitted is so determined that the order of predicted arrival time at a reception node is equal to the order of arrival time at a transmission node from estimate values of delay and velocity of each path. Only a packet predicted to arrive within the maximum permissible delay of each path is transmitted among the packets. This enables both of optimum allocation of the load between the paths and the prevention of a delay increase due to multiplexing.
    Type: Grant
    Filed: March 27, 2007
    Date of Patent: March 20, 2012
    Assignee: NEC Corporation
    Inventor: Tsuneo Nakata
  • Publication number: 20120057464
    Abstract: A routing device of the present invention is included in a communication network capable of explicit routing which specifies resources included in a default path for each flow, and includes a detour path detection unit that detects a detour path which enables estimation of temporary transmission quality which can be provided to a flow within a detour region when at least a portion of an explicit default path of the flow transmitted by the routing device is detoured via resources included in a default path of another flow, and a routing unit that routes data of the flow at least to either one of the detour path and the default path, based on a difference between transmission quality of the detour path detected by the detour path detection unit and transmission quality of the default path.
    Type: Application
    Filed: March 26, 2010
    Publication date: March 8, 2012
    Inventor: Tsuneo Nakata
  • Patent number: 8098648
    Abstract: When path status information is updated, the time at which the update is effective is recorded. A packet arrival time in each path is predicted based on new status information and data transmission history after the effective time. The packet is transmitted to the path that provides a fastest packet arrival time. This reflects the path status available from the reception side on the data transmitted in past, so that an actual data arrival time, an arrival time close to a reception completion time, or a reception completion time can be predicted.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: January 17, 2012
    Assignee: NEC Corporation
    Inventors: Tsuneo Nakata, Yuusuke Noguchi
  • Patent number: 8079001
    Abstract: Conditions necessary to be satisfied for execution of each use case from a use case description indicative of a requirements specification of the design object are acquired. Then a state satisfying the conditions, from among a set of states represented in a finite state machine model indicative of a design specification of the design object are detected. A presence or absence of an undetected state in the set of states in accordance with the detection is determined and output.
    Type: Grant
    Filed: June 10, 2008
    Date of Patent: December 13, 2011
    Assignee: Fujitsu Limited
    Inventors: Qiang Zhu, Hiroaki Iwashita, Koichiro Takayama, Tsuneo Nakata
  • Patent number: 8055819
    Abstract: An information processor (program processing unit 1) for managing a data sequence in a fixed order comprises a direction array (reference data storage section 2) for storing a reference to each data item of the data sequence in an element of the index associated with the key to the data, and means (CPU 3) for changing all data keys referenced by elements within an arbitrary range of indexes in the direction array by the same amount, where memory contents within the range of the direction array are shifted by the number of indexes corresponding to the changed amount.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: November 8, 2011
    Assignee: NEC Corporation
    Inventor: Tsuneo Nakata
  • Publication number: 20110239172
    Abstract: A verification target register to be verified is specified from a configuration of a verification target circuit, and patterns requiring verification are extracted as a coverage standard with regard to the specified verification target register. When the patterns are extracted, a DIRW matrix is prepared to indicate possibly occurring state transitions among four states Declare, Initialize, Read, and Write in the register included in the verification target circuit, and used to decide two coverage standards, a matrix coverage standard and an implementation coverage standard.
    Type: Application
    Filed: June 10, 2011
    Publication date: September 29, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Ryosuke Oishi, Akio Matsuda, Koichiro Takayama, Tsuneo Nakata
  • Patent number: 8015519
    Abstract: In a verification supporting apparatus, a recording unit records a DIRW matrix in which a state transition possibly occurring in a register of a circuit to be verified and information concerning validity of a path corresponding to the state transition are set and an acquiring unit acquires a control data flow graph that includes a control flow graph having a data flow graph written therein. When a register is designated for verification, a data flow graph having described therein the designated register is extracted from the control data flow graph. From the data flow graph extracted, a path indicating the flow of data concerning the register is extracted. The state transition of the path extracted is identified and if the state transition is determined to be is set in the DIRW matrix, information concerning the validity set in the DIRW matrix and the path are correlated, and output.
    Type: Grant
    Filed: December 15, 2008
    Date of Patent: September 6, 2011
    Assignee: Fujitsu Limited
    Inventors: Akio Matsuda, Ryosuke Oishi, Koichiro Takayama, Tsuneo Nakata, Rafael Kazumiti Morizawa
  • Patent number: 7984403
    Abstract: A verification target register to be verified is specified from a configuration of a verification target circuit, and patterns requiring verification are extracted as a coverage standard with regard to the specified verification target register. When the patterns are extracted, a DIRW matrix is prepared to indicate possibly occurring state transitions among four states Declare, Initialize, Read, and Write in the register included in the verification target circuit, and used to decide two coverage standards, a matrix coverage standard and an implementation coverage standard.
    Type: Grant
    Filed: January 23, 2009
    Date of Patent: July 19, 2011
    Assignee: Fujitsu Limited
    Inventors: Ryosuke Oishi, Akio Matsuda, Koichiro Takayama, Tsuneo Nakata
  • Patent number: 7966590
    Abstract: A single module includes a shared combinational circuit, a multiplexed sequential circuit, and a common I/F and is substituted for a multiplexed module formed of plural modules of an identical category and type and including plural CPUs. Specifically, the shared combinational circuit is substituted for n combinational circuits, the multiplexed sequential circuit is substituted for n sequential circuits, and the common I/F is substituted for n input pins and n output pins.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: June 21, 2011
    Assignee: Fujitsu Limited
    Inventors: Yuzi Kanazawa, Takahide Yoshikawa, Tsuneo Nakata
  • Patent number: 7965648
    Abstract: In the prior art, in a case of measuring a speed of a narrow-bandwidth path of which the state fluctuates dynamically, a serious influence is placed upon a speed calculation with a sufficient precision, and a performance. Embedding probe information into a data packet, being actual data, to transfer two at a time allows the data packet having the probe information embedded to act as a probe packet of the packet pair technique as well. Further, in a system including a plurality of the paths, the data packets are distributed to the path two packets by two packets.
    Type: Grant
    Filed: January 13, 2005
    Date of Patent: June 21, 2011
    Assignee: NEC Corporation
    Inventor: Tsuneo Nakata
  • Patent number: 7937680
    Abstract: An apparatus for verifying a specification includes a use-case extracting unit, a first setting unit, an operation extracting unit, a second setting unit, and a determining unit. The use-case extracting unit extracts an unprocessed use case from specification data. The first setting unit sets a condition based on a precondition, a postcondition, and an invariant condition for the use case. The operation extracting unit selects an event flow of an unprocessed path from the specification data and extracts an unprocessed operation (description) from the event flow selected. The second setting unit sets a precondition and a postcondition for the operation based on the extracted operation (description). The determining unit determines whether the invariant condition is valid.
    Type: Grant
    Filed: August 31, 2005
    Date of Patent: May 3, 2011
    Assignee: Fujitsu Limited
    Inventors: Qiang Zhu, Ryosuke Oishi, Tsuneo Nakata, Takashi Hasegawa