Patents by Inventor Tsuneo Ogura

Tsuneo Ogura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200091324
    Abstract: A semiconductor device includes a first electrode, a second electrode disposed at a position opposing the first electrode, and a semiconductor body provided between the first electrode and the second electrode. The semiconductor body includes a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type and a third semiconductor layer of the second conductivity type; the second semiconductor layer is provided between the first semiconductor layer and the first electrode; and the third semiconductor layer is selectively provided inside the first semiconductor layer and disposed at a position separated from the second semiconductor layer. The first electrode is electrically connected to the second semiconductor layer and includes an extension portion; and the extension portion pierces the second semiconductor layer, extends in a first direction toward the second electrode, and is connected to the third semiconductor layer.
    Type: Application
    Filed: January 7, 2019
    Publication date: March 19, 2020
    Inventors: Keiko Kawamura, Tsuneo Ogura
  • Patent number: 10573733
    Abstract: A semiconductor device includes a third electrode between a first semiconductor region and a second electrode, a fourth electrode between the first semiconductor region and the second electrode, a second semiconductor region between the first semiconductor region and the second electrode and between the third electrode and the fourth electrode, a third semiconductor region between the second semiconductor region and the second electrode, a fourth electrode between the first semiconductor region and the second electrode to be electrically connected to the second electrode, and a fifth semiconductor region between the first electrode and the first semiconductor region. A first insulating film is provided between the third electrode and the first semiconductor region, the second semiconductor region, the third semiconductor region and the second electrode.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: February 25, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Patent number: 10553710
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a semiconductor layer provided between the first electrode and the second electrode, a plurality of gate electrodes provided in the semiconductor layer and extending in a first direction, a plurality of gate interconnects provided in the semiconductor layer and connected with the gate electrodes, the gate interconnects extending in a second direction crossing the first direction, an insulating film provided between the gate electrodes and the semiconductor layer, and between the gate interconnects and the semiconductor layer, and an inter-layer insulating film provided between the gate electrodes and the second electrode, and between the gate interconnects and the second electrode.
    Type: Grant
    Filed: December 11, 2017
    Date of Patent: February 4, 2020
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Patent number: 10468511
    Abstract: A semiconductor device includes a third electrode between a first semiconductor region and a second electrode, a fourth electrode between the first semiconductor region and the second electrode, a second semiconductor region between the first semiconductor region and the second electrode and between the third electrode and the fourth electrode, a third semiconductor region between the second semiconductor region and the second electrode, a fourth electrode between the first semiconductor region and the second electrode to be electrically connected to the second electrode, and a fifth semiconductor region between the first electrode and the first semiconductor region. A first insulating film is provided between the third electrode and the first semiconductor region, the second semiconductor region, the third semiconductor region and the second electrode.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: November 5, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Patent number: 10439054
    Abstract: According to one embodiment, an IGBT has a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the second conductivity type, a fourth semiconductor layer of the first conductivity type, and a fifth semiconductor layer of the second conductivity type, between a first electrode and a second electrode, on the first electrode in order. A third electrode is provided on the third semiconductor layer, the fourth semiconductor layer, and the fifth semiconductor layer via a gate insulating film, and is insulated from the first electrode and the second electrode. A fourth electrode is provided between the third electrode and the second semiconductor layer, and is insulated from the third electrode and the second semiconductor layer.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: October 8, 2019
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Publication number: 20190296730
    Abstract: A semiconductor device according to an embodiment includes a transistor including a first electrode, a second electrode, and a first gate electrode; a first detector detecting a change in a first parameter of the transistor over time to acquire first temporal change data; and a first storage storing the first temporal change data.
    Type: Application
    Filed: September 21, 2018
    Publication date: September 26, 2019
    Inventors: Tsuneo Ogura, Tomoko Matsudai, Yoko Iwakaji
  • Publication number: 20190296134
    Abstract: A semiconductor device according to an embodiment includes a semiconductor layer having a first plane and a second plane; an emitter electrode provided on a first plane side of the semiconductor layer; a collector electrode provided on a second plane side of the semiconductor layer; a first gate electrode pad provided on the first plane side; a second gate electrode pad provided on the first plane side; a cell region including a first trench provided in the semiconductor layer and a first gate electrode that is provided in the first trench and is connected to the first gate electrode pad; and a cell end region that is adjacent to the cell region and includes a second trench provided in the semiconductor layer and a second gate electrode which is provided in the second trench and is connected to the second gate electrode pad.
    Type: Application
    Filed: September 21, 2018
    Publication date: September 26, 2019
    Inventors: Tomoko Matsudai, Tsuneo Ogura
  • Patent number: 10411099
    Abstract: A semiconductor device includes first and second electrodes spaced apart along a first direction, a first semiconductor region of a first conductivity type between the first and second electrodes, first and second conductive regions between the first semiconductor region and the second electrode and electrically connected to the second electrode, a third electrode between the first and second conductive regions, second and third semiconductor regions of a second conductivity type respectively between the first and second conductive regions and the third electrode, and fourth and fifth semiconductor regions of the first conductivity type respectively between the second and third semiconductor regions and the second electrode. The third electrode extends in the first direction toward the first electrode farther than portions of the second and third semiconductor regions that are alongside the third electrode.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: September 10, 2019
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Patent number: 10304969
    Abstract: According to one embodiment, in a semiconductor device, The first semiconductor region is provided between the first and the second electrode. The second semiconductor region is provided between the first semiconductor region and the second electrode. The first and second connection region are electrically connected to the second electrode, reaches the first semiconductor region. The first insulating film is provided between the first connection region and the second semiconductor region and between the first connection region and the first semiconductor region. The second insulating film is provided between the second connection region and the second semiconductor region and between the second connection region and the first semiconductor region.
    Type: Grant
    Filed: February 18, 2016
    Date of Patent: May 28, 2019
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Publication number: 20190140085
    Abstract: A semiconductor device includes a third electrode between a first semiconductor region and a second electrode, a fourth electrode between the first semiconductor region and the second electrode, a second semiconductor region between the first semiconductor region and the second electrode and between the third electrode and the fourth electrode, a third semiconductor region between the second semiconductor region and the second electrode, a fourth electrode between the first semiconductor region and the second electrode to be electrically connected to the second electrode, and a fifth semiconductor region between the first electrode and the first semiconductor region. A first insulating film is provided between the third electrode and the first semiconductor region, the second semiconductor region, the third semiconductor region and the second electrode.
    Type: Application
    Filed: December 28, 2018
    Publication date: May 9, 2019
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Publication number: 20190006495
    Abstract: According to one embodiment, an IGBT has a first semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type, a third semiconductor layer of the second conductivity type, a fourth semiconductor layer of the first conductivity type, and a fifth semiconductor layer of the second conductivity type, between a first electrode and a second electrode, on the first electrode in order. A third electrode is provided on the third semiconductor layer, the fourth semiconductor layer, and the fifth semiconductor layer via a gate insulating film, and is insulated from the first electrode and the second electrode. A fourth electrode is provided between the third electrode and the second semiconductor layer, and is insulated from the third electrode and the second semiconductor layer.
    Type: Application
    Filed: March 9, 2018
    Publication date: January 3, 2019
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Publication number: 20180342604
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a semiconductor layer provided between the first electrode and the second electrode, a plurality of gate electrodes provided in the semiconductor layer and extending in a first direction, a plurality of gate interconnects provided in the semiconductor layer and connected with the gate electrodes, the gate interconnects extending in a second direction crossing the first direction, an insulating film provided between the gate electrodes and the semiconductor layer, and between the gate interconnects and the semiconductor layer, and an inter-layer insulating film provided between the gate electrodes and the second electrode, and between the gate interconnects and the second electrode.
    Type: Application
    Filed: December 11, 2017
    Publication date: November 29, 2018
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Patent number: 10141455
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, an insulating region, and a third semiconductor region of the first conductivity type. The first semiconductor region is provided between the first electrode and the second electrode, and is in contact with the first electrode. The second semiconductor region is provided between the first semiconductor region and the second electrode. The second semiconductor region is in contact with the second electrode. The insulating region extends in a direction from the second electrode toward the first semiconductor region. The insulating region is in contact with the second electrode. The third semiconductor region is provided between the second semiconductor region and the insulating region.
    Type: Grant
    Filed: March 16, 2017
    Date of Patent: November 27, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Shinichiro Misu, Tomoko Matsudai, Norio Yasuhara
  • Publication number: 20180301538
    Abstract: A semiconductor device includes first and second electrodes spaced apart along a first direction, a first semiconductor region of a first conductivity type between the first and second electrodes, first and second conductive regions between the first semiconductor region and the second electrode and electrically connected to the second electrode, a third electrode between the first and second conductive regions, second and third semiconductor regions of a second conductivity type respectively between the first and second conductive regions and the third electrode, and fourth and fifth semiconductor regions of the first conductivity type respectively between the second and third semiconductor regions and the second electrode. The third electrode extends in the first direction toward the first electrode farther than portions of the second and third semiconductor regions that are alongside the third electrode.
    Type: Application
    Filed: June 20, 2018
    Publication date: October 18, 2018
    Inventors: Tsuneo OGURA, Tomoko MATSUDAI
  • Patent number: 10083956
    Abstract: A semiconductor device includes first and second electrodes, a first semiconductor region between the first and second electrodes, a second semiconductor region between the first semiconductor region and the second electrode, a third semiconductor region between the first semiconductor region and the second electrode, a fourth semiconductor region between the first semiconductor region and the first electrode, a third electrode between the first electrode and the first semiconductor region, a first insulating film between the third electrode and both the first electrode and the first semiconductor region, a fifth semiconductor region between the fourth semiconductor region and the first electrode and in contact with the first electrode, a sixth semiconductor region between the fourth semiconductor region and the first electrode and in contact with the first electrode, and a seventh semiconductor region between the fourth semiconductor region and the first insulating film and in contact with the first semicond
    Type: Grant
    Filed: September 4, 2017
    Date of Patent: September 25, 2018
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Publication number: 20180226398
    Abstract: A semiconductor device includes first and second electrodes, a first semiconductor region between the first and second electrodes, a second semiconductor region between the first semiconductor region and the second electrode, a third semiconductor region between the first semiconductor region and the second electrode, a fourth semiconductor region between the first semiconductor region and the first electrode, a third electrode between the first electrode and the first semiconductor region, a first insulating film between the third electrode and both the first electrode and the first semiconductor region, a fifth semiconductor region between the fourth semiconductor region and the first electrode and in contact with the first electrode, a sixth semiconductor region between the fourth semiconductor region and the first electrode and in contact with the first electrode, and a seventh semiconductor region between the fourth semiconductor region and the first insulating film and in contact with the first semicond
    Type: Application
    Filed: September 4, 2017
    Publication date: August 9, 2018
    Inventors: Tsuneo OGURA, Tomoko MATSUDAI
  • Patent number: 10032874
    Abstract: A semiconductor device includes first and second electrodes spaced apart along a first direction, a first semiconductor region of a first conductivity type between the first and second electrodes, first and second conductive regions between the first semiconductor region and the second electrode and electrically connected to the second electrode, a third electrode between the first and second conductive regions, second and third semiconductor regions of a second conductivity type respectively between the first and second conductive regions and the third electrode, and fourth and fifth semiconductor regions of the first conductivity type respectively between the second and third semiconductor regions and the second electrode. The third electrode extends in the first direction toward the first electrode farther than portions of the second and third semiconductor regions that are alongside the third electrode.
    Type: Grant
    Filed: August 29, 2016
    Date of Patent: July 24, 2018
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuneo Ogura, Tomoko Matsudai
  • Publication number: 20170271490
    Abstract: A semiconductor device includes a third electrode between a first semiconductor region and a second electrode, a fourth electrode between the first semiconductor region and the second electrode, a second semiconductor region between the first semiconductor region and the second electrode and between the third electrode and the fourth electrode, a third semiconductor region between the second semiconductor region and the second electrode, a fourth electrode between the first semiconductor region and the second electrode to be electrically connected to the second electrode, and a fifth semiconductor region between the first electrode and the first semiconductor region. A first insulating film is provided between the third electrode and the first semiconductor region, the second semiconductor region, the third semiconductor region and the second electrode.
    Type: Application
    Filed: February 24, 2017
    Publication date: September 21, 2017
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Tsuneo OGURA, Tomoko MATSUDAI
  • Publication number: 20170263714
    Abstract: A semiconductor device includes first and second electrodes spaced apart along a first direction, a first semiconductor region of a first conductivity type between the first and second electrodes, first and second conductive regions between the first semiconductor region and the second electrode and electrically connected to the second electrode, a third electrode between the first and second conductive regions, second and third semiconductor regions of a second conductivity type respectively between the first and second conductive regions and the third electrode, and fourth and fifth semiconductor regions of the first conductivity type respectively between the second and third semiconductor regions and the second electrode. The third electrode extends in the first direction toward the first electrode farther than portions of the second and third semiconductor regions that are alongside the third electrode.
    Type: Application
    Filed: August 29, 2016
    Publication date: September 14, 2017
    Inventors: Tsuneo OGURA, Tomoko MATSUDAI
  • Patent number: 9741872
    Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a first semiconductor region, a second semiconductor region, a third semiconductor region, and a fourth semiconductor region. The first semiconductor region is provided between the first and second electrodes. The second semiconductor region is provided between the first semiconductor region and the second electrode. The third semiconductor region is provided between the first semiconductor region and the second electrode, is provided beside the second semiconductor region in a second direction crossing a first direction from the first electrode toward the second electrode, and a portion of the first semiconductor region is positioned between the third and second semiconductor regions. The fourth semiconductor region is provided between the portion of the first semiconductor region and the second electrode and has a greater impurity concentration than the second and third semiconductor regions.
    Type: Grant
    Filed: September 4, 2015
    Date of Patent: August 22, 2017
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tsuneo Ogura, Tomoko Matsudai