Patents by Inventor Tsutomu Fujita

Tsutomu Fujita has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230101002
    Abstract: A semiconductor device including a base substrate B, which includes wire layers, chips C1, C2, C3, C4, C5, and C6 provided on the base substrate B, and a protective film P provided on each of the side faces of the chips C1, C2, C3, C4, C5, and C6.
    Type: Application
    Filed: March 14, 2022
    Publication date: March 30, 2023
    Applicant: Kioxia Corporation
    Inventors: Gen TOYOTA, Satoshi HONGO, Tatsuo MIGITA, Susumu YAMAMOTO, Tsutomu FUJITA, Eiichi SHIN, Yukio KATAMURA, Hideki MATSUSHIGE, Kazuki TAKAHASHI
  • Publication number: 20220375901
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes forming a plurality of stacked bodies on a substrate, each of the stacked bodies includes a plurality of semiconductor chips. The method further includes forming a plurality of first wires on the stacked bodies. The first wires connecting the stacked bodies to each other. The method further includes forming a resin layer on the stacked bodies and the first wires, then thinning he resin layer until the first wires are exposed.
    Type: Application
    Filed: February 28, 2022
    Publication date: November 24, 2022
    Inventors: Susumu YAMAMOTO, Tsutomu FUJITA, Takeori MAEDA, Satoshi HONGO, Gen TOYOTA, Eiichi SHIN, Yukio KATAMURA
  • Patent number: 11139208
    Abstract: A semiconductor device includes a semiconductor wafer chip, a semiconductor device layer, and a reflectance reducing layer. The semiconductor wafer chip includes a device region and a peripheral region around the device region. The peripheral region includes a plurality of voids aligned along a side surface of the semiconductor wafer chip at a predetermined depth from a first surface of the semiconductor wafer chip. The semiconductor device element layer is on the first surface in the device region. The reflectance reducing layer is on the first surface of the semiconductor wafer chip in the peripheral region, that reduces a reflection of laser light incident from a second surface of the semiconductor wafer chip.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: October 5, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Takanobu Ono, Tsutomu Fujita, Ippei Kume, Akira Tomono
  • Patent number: 11089993
    Abstract: [Problem] To provide means by which sleep states can be measured, observed, or evaluated easily. [Solution] A sleep state measurement device that includes a phase coherence calculating means for calculating phase coherence on the basis of the instantaneous phase difference between the instantaneous phase of heart rate variability acquired from a sleeping animal and the instantaneous phase of the breathing pattern of the animal for the same time series as the heart rate variability.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: August 17, 2021
    Assignee: Health Sensing Co., Ltd.
    Inventors: Masatomo Kanegae, Tsutomu Fujita, Kyuichi Niizeki
  • Patent number: 11004743
    Abstract: According to one embodiment, a dicing method is provided. The dicing method includes detecting a first distance between a first portion of a substrate and a first substrate information detection unit. The method also includes detecting a second distance between a second portion of the substrate a second substrate information detection unit, the second portion different from the first portion. Distance information is calculated between the substrate and a processing lens, which is located farther from the second substrate information detection unit than from the first substrate information detection unit, based on the detected first distance and the detected second distance, and the substrate is irradiated with laser light from the processing lens based on the distance information.
    Type: Grant
    Filed: October 24, 2018
    Date of Patent: May 11, 2021
    Assignee: KIOXIA CORPORATION
    Inventors: Tsutomu Fujita, Takanobu Ono
  • Patent number: 10950468
    Abstract: A semiconductor manufacturing apparatus according to an embodiment irradiates a semiconductor substrate with laser to form modified regions along an intended cut line in the semiconductor substrate. A light source emits the laser. An optical system comprises an objective lens configured to focus the laser in the semiconductor substrate. A light modulator is capable of modulating an energy density distribution of the laser. A controller controls the light modulator to displace a peak position of the energy density distribution of the laser from an optical axis of the objective lens in a relative movement direction of the optical system with respect to the semiconductor substrate.
    Type: Grant
    Filed: March 5, 2018
    Date of Patent: March 16, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Makoto Minaminaka, Tsutomu Fujita, Keisuke Tokubuchi, Akira Tomono, Takanobu Ono
  • Patent number: 10892232
    Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate comprising a first face, and a second face on an opposite side to the first face. A semiconductor element is provided on the first face of the semiconductor substrate. A polycrystalline or non-crystalline first material layer is provided at least on an outer edge of the first face of the semiconductor substrate. A second material layer is provided on the second face of the semiconductor substrate. The second material layer transmits laser light.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: January 12, 2021
    Assignee: Toshiba Memory Corporation
    Inventors: Takanobu Ono, Tsutomu Fujita, Ippei Kume, Akira Tomono
  • Publication number: 20200294934
    Abstract: A semiconductor device according to an embodiment includes a semiconductor substrate comprising a first face, and a second face on an opposite side to the first face. A semiconductor element is provided on the first face of the semiconductor substrate. A polycrystalline or non-crystalline first material layer is provided at least on an outer edge of the first face of the semiconductor substrate. A second material layer is provided on the second face of the semiconductor substrate. The second material layer transmits laser light.
    Type: Application
    Filed: September 3, 2019
    Publication date: September 17, 2020
    Applicant: Toshiba Memory Corporation
    Inventors: Takanobu ONO, Tsutomu FUJITA, Ippei KUME, Akira TOMONO
  • Publication number: 20200294856
    Abstract: A semiconductor device includes a semiconductor wafer chip, a semiconductor device layer, and a reflectance reducing layer. The semiconductor wafer chip includes a device region and a peripheral region around the device region. The peripheral region includes a plurality of voids aligned along a side surface of the semiconductor wafer chip at a predetermined depth from a first surface of the semiconductor wafer chip. The semiconductor device element layer is on the first surface in the device region. The reflectance reducing layer is on the first surface of the semiconductor wafer chip in the peripheral region, that reduces a reflection of laser light incident from a second surface of the semiconductor wafer chip.
    Type: Application
    Filed: September 3, 2019
    Publication date: September 17, 2020
    Inventors: Takanobu ONO, Tsutomu FUJITA, Ippei KUME, Akira TOMONO
  • Patent number: 10777459
    Abstract: According to an embodiment, a method of manufacturing a semiconductor device includes forming a first modified zone in a wafer by irradiating the wafer with a laser having transmissivity with respect to the wafer along a part of a dicing line on the wafer, and forming a second modified zone in the wafer by irradiating the wafer with the laser along the dicing line on the wafer. The first modified zone is partially formed between a surface of the wafer and the second modified zone, a semiconductor interconnect layer being formed on the surface of the wafer.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: September 15, 2020
    Assignee: Toshiba Memory Corporation
    Inventors: Takanobu Ono, Tsutomu Fujita
  • Patent number: 10741650
    Abstract: According to one embodiment, a semiconductor device includes a semiconductor element having a substrate with at least two bending portions formed on a first side surface thereof. The two bending portions are displaced from each other in a first direction that is perpendicular to the first side surface of the substrate and parallel to a front surface of the substrate and in a second direction parallel to the front surface of the substrate and perpendicular to a top surface of the substrate. A rearmost portion of the first side surface is substantially perpendicular to the front surface.
    Type: Grant
    Filed: September 4, 2017
    Date of Patent: August 11, 2020
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tsutomu Fujita, Takanobu Ono, Makoto Minaminaka
  • Publication number: 20190244860
    Abstract: According to an embodiment, a method of manufacturing a semiconductor device includes forming a first modified zone in a wafer by irradiating the wafer with a laser having transmissivity with respect to the wafer along a part of a dicing line on the wafer, and forming a second modified zone in the wafer by irradiating the wafer with the laser along the dicing line on the wafer. The first modified zone is partially formed between a surface of the wafer and the second modified zone, a semiconductor interconnect layer being formed on the surface of the wafer.
    Type: Application
    Filed: April 16, 2019
    Publication date: August 8, 2019
    Applicant: Toshiba Memory Corporation
    Inventors: Takanobu ONO, Tsutomu Fujita
  • Patent number: 10350711
    Abstract: A semiconductor device is provided with a semiconductor substrate. A semiconductor element is provided on a first face of the semiconductor substrate. An energy absorbing film is provided on the first face, to absorb optical energy to generate heat. A first insulation film is provided on the semiconductor element and on the energy absorbing film. A second insulation film is provided on a second face of the semiconductor substrate, the second face being opposite to the first face. A first modified layer is provided on a side face of the semiconductor substrate, the side face being located between an outer edge of the first face and an outer edge of the second face. A second modified layer is provided on the side face between the energy absorbing film and the first modified layer. A cleavage face is provided on the side face between the first and second modified layers.
    Type: Grant
    Filed: March 9, 2018
    Date of Patent: July 16, 2019
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tsutomu Fujita, Akira Tomono, Takanobu Ono
  • Patent number: 10304737
    Abstract: According to an embodiment, a method of manufacturing a semiconductor device includes forming a first modified zone in a wafer by irradiating the wafer with a laser having transmissivity with respect to the wafer along a part of a dicing line on the wafer, and forming a second modified zone in the wafer by irradiating the wafer with the laser along the dicing line on the wafer. The first modified zone is partially formed between a surface of the wafer and the second modified zone, a semiconductor interconnect layer being formed on the surface of the wafer.
    Type: Grant
    Filed: September 14, 2017
    Date of Patent: May 28, 2019
    Assignee: Toshiba Memory Corporation
    Inventors: Takanobu Ono, Tsutomu Fujita
  • Publication number: 20190084080
    Abstract: A semiconductor device is provided with a semiconductor substrate. A semiconductor element is provided on a first face of the semiconductor substrate. An energy absorbing film is provided on the first face, to absorb optical energy to generate heat. A first insulation film is provided on the semiconductor element and on the energy absorbing film. A second insulation film is provided on a second face of the semiconductor substrate, the second face being opposite to the first face. A first modified layer is provided on a side face of the semiconductor substrate, the side face being located between an outer edge of the first face and an outer edge of the second face. A second modified layer is provided on the side face between the energy absorbing film and the first modified layer. A cleavage face is provided on the side face between the first and second modified layers.
    Type: Application
    Filed: March 9, 2018
    Publication date: March 21, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Tsutomu FUJITA, Akira TOMONO, Takanobu ONO
  • Publication number: 20190080940
    Abstract: A semiconductor manufacturing apparatus according to an embodiment irradiates a semiconductor substrate with laser to form modified regions along an intended cut line in the semiconductor substrate. A light source emits the laser. An optical system comprises an objective lens configured to focus the laser in the semiconductor substrate. A light modulator is capable of modulating an energy density distribution of the laser. A controller controls the light modulator to displace a peak position of the energy density distribution of the laser from an optical axis of the objective lens in a relative movement direction of the optical system with respect to the semiconductor substrate.
    Type: Application
    Filed: March 5, 2018
    Publication date: March 14, 2019
    Applicant: TOSHIBA MEMORY CORPORATION
    Inventors: Makoto MINAMINAKA, Tsutomu FUJITA, Keisuke TOKUBUCHI, Akira TOMONO, Takanobu ONO
  • Publication number: 20190076084
    Abstract: [Problem] To provide means by which sleep states can be measured, observed, or evaluated easily. [Solution] A sleep state measurement device that includes a phase coherence calculating means for calculating phase coherence on the basis of the instantaneous phase difference between the instantaneous phase of heart rate variability acquired from a sleeping animal and the instantaneous phase of the breathing pattern of the animal for the same time series as the heart rate variability.
    Type: Application
    Filed: February 15, 2017
    Publication date: March 14, 2019
    Applicant: Health Sensing Co., Ltd.
    Inventors: Masatomo Kanegae, Tsutomu Fujita, Kyuichi Niizeki
  • Publication number: 20190057902
    Abstract: According to one embodiment, a dicing method is provided. The dicing method includes detecting a first distance between a first portion of a substrate and a first substrate information detection unit. The method also includes detecting a second distance between a second portion of the substrate a second substrate information detection unit, the second portion different from the first portion. Distance information is calculated between the substrate and a processing lens, which is located farther from the second substrate information detection unit than from the first substrate information detection unit, based on the detected first distance and the detected second distance, and he substrate is irradiated with laser light from the processing lens based on the distance information.
    Type: Application
    Filed: October 24, 2018
    Publication date: February 21, 2019
    Inventors: Tsutomu FUJITA, Takanobu ONO
  • Patent number: 10153206
    Abstract: According to one embodiment, a dicing method is provided. The dicing method includes detecting a first distance between a first portion of a substrate and a first substrate information detection unit. The method also includes detecting a second distance between a second portion of the substrate a second substrate information detection unit, the second portion different from the first portion. Distance information is calculated between the substrate and a processing lens, which is located farther from the second substrate information detection unit than from the first substrate information detection unit, based on the detected first distance and the detected second distance, and he substrate is irradiated with laser light from the processing lens based on the distance information.
    Type: Grant
    Filed: September 4, 2017
    Date of Patent: December 11, 2018
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventors: Tsutomu Fujita, Takanobu Ono
  • Publication number: 20180277435
    Abstract: According to one embodiment, a dicing method is provided. The dicing method includes detecting a first distance between a first portion of a substrate and a first substrate information detection unit. The method also includes detecting a second distance between a second portion of the substrate a second substrate information detection unit, the second portion different from the first portion. Distance information is calculated between the substrate and a processing lens, which is located farther from the second substrate information detection unit than from the first substrate information detection unit, based on the detected first distance and the detected second distance, and he substrate is irradiated with laser light from the processing lens based on the distance information.
    Type: Application
    Filed: September 4, 2017
    Publication date: September 27, 2018
    Inventors: Tsutomu FUJITA, Takanobu ONO