Patents by Inventor Tsutomu Hatakeyama

Tsutomu Hatakeyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190194391
    Abstract: The invention provides: a dihydroxynaphthalene condensate which suppresses soft particle generation and is suitably usable for a composition excellent in filterability; and a method for producing the dihydroxynaphthalene condensate, in the method for producing a dihydroxynaphthalene condensate, dihydroxynaphthalene to be used has a sulfur element content of 100 ppm or less in terms of mass among constituent elements. The dihydroxynaphthalene and a condensation agent are condensed in presence of an acid or a base to produce the dihydroxynaphthalene condensate.
    Type: Application
    Filed: December 19, 2018
    Publication date: June 27, 2019
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Daisuke KORI, Seiichiro TACHIBANA, Tsutomu OGIHARA, Satoru KITANO, Yukio ABE, Fumihiro HATAKEYAMA, Taiki KOBAYASHI
  • Publication number: 20190194102
    Abstract: The invention provides a method for purifying dihydroxynaphthalene, which is capable of suppressing soft particle generation and obtaining dihydroxynaphthalene serving as a raw material of a resin and composition excellent in filterability. The method for purifying dihydroxynaphthalene includes the step of removing a sulfur content in the dihydroxynaphthalene with an adsorbent, and neutral alumina is used as the adsorbent.
    Type: Application
    Filed: December 19, 2018
    Publication date: June 27, 2019
    Applicant: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Seiichiro TACHIBANA, Daisuke KORI, Tsutomu OGIHARA, Satoru KITANO, Yukio ABE, Fumihiro HATAKEYAMA, Taiki KOBAYASHI
  • Patent number: 10263484
    Abstract: A stator for a rotary electric machine includes a stator core, three-phase coils, and a neutral point connection conductor. The three-phase coils are wound around the stator core. The neutral point connection conductor is connected to each of the three-phase coils. The neutral point connection conductor includes a linear conductor that is bent. The linear conductor includes two end portions and an overlapping portion in which the conductor is folded back and doubled up. One of the two end portions is connected to one-phase coil of the three-phase coils. The other of the two end portions is connected to another-phase coil of the three-phase coils. The overlapping portion is connected to the remaining-phase coil of the three-phase coils.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: April 16, 2019
    Assignees: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Tetsushi Mizutani, Keiichi Kaneshige, Masayuki Ikemoto, Tsutomu Hatakeyama, Akiya Shichijoh
  • Patent number: 10054492
    Abstract: A thermistor includes a case having a bottom section at one end and an opening section at the other end, a thermistor element housed in the case, a conducting wire housed in the case and connected to the thermistor element, and a lead wire connected to the conducting wire. The lead wire has a first portion including an insulating coating, and a second portion connected to the conducting wire and exposed from the insulating coating. A resin is filled up to a position away from an end edge of the opening section toward the bottom section so as to enclose at least the thermistor element, the conducting wire, and the second portion. The first portion is guided out of the resin to the outside of the case. An inner peripheral surface of the opening section is curved so as to increase an opening area of the opening section.
    Type: Grant
    Filed: November 16, 2015
    Date of Patent: August 21, 2018
    Assignees: TDK CORPORATION, TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventors: Satoru Shiraki, Keiichi Kaneshige, Masashi Matsumoto, Masayuki Ikemoto, Tsutomu Hatakeyama
  • Publication number: 20160329764
    Abstract: A stator for a rotary electric machine includes a stator core, three-phase coils, and a neutral point connection conductor. The three-phase coils are wound around the stator core. The neutral point connection conductor is connected to each of the three-phase coils. The neutral point connection conductor includes a linear conductor that is bent. The linear conductor includes two end portions and an overlapping portion in which the conductor is folded back and doubled up. One of the two end portions is connected to one-phase coil of the three-phase coils. The other of the two end portions is connected to another-phase coil of the three-phase coils. The overlapping portion is connected to the remaining-phase coil of the three-phase coils.
    Type: Application
    Filed: December 22, 2014
    Publication date: November 10, 2016
    Applicants: TOYOTA JIDOSHA KABUSHIKI KAISHA, DENSO CORPORATION
    Inventors: Tetsushi MIZUTANI, Keiichi KANESHIGE, Masayuki IKEMOTO, Tsutomu HATAKEYAMA, Akiya SCHICHIJOH
  • Publication number: 20160178445
    Abstract: A thermistor includes a case having a bottom section at one end and an opening section at the other end, a thermistor element housed in the case, a conducting wire housed in the case and connected to the thermistor element, and a lead wire connected to the conducting wire. The lead wire has a first portion including an insulating coating, and a second portion connected to the conducting wire and exposed from the insulating coating. A resin is filled up to a position away from an end edge of the opening section toward the bottom section so as to enclose at least the thermistor element, the conducting wire, and the second portion. The first portion is guided out of the resin to the outside of the case. An inner peripheral surface of the opening section is curved so as to increase an opening area of the opening section.
    Type: Application
    Filed: November 16, 2015
    Publication date: June 23, 2016
    Inventors: Satoru SHIRAKI, Keiichi KANESHIGE, Masashi MATSUMOTO, Masayuki IKEMOTO, Tsutomu HATAKEYAMA
  • Patent number: 7711885
    Abstract: A bus control apparatus includes a plurality of blocks configured to output a write command for writing data into memory via a bus, and a bus connection control unit provided in correspondence with each of the blocks. The bus connection control unit monitors signals between the bus and the block, and upon detecting a read command signal for reading data in a cause register of the block, blocks connection of a signal line between the block and the bus and outputs a dummy read command signal for the memory. The bus connection control unit releases blockage when a response signal for the dummy read command signal is received.
    Type: Grant
    Filed: April 9, 2008
    Date of Patent: May 4, 2010
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsutomu Hatakeyama
  • Publication number: 20080259700
    Abstract: A bus control apparatus includes a plurality of blocks configured to output a write command for writing data into memory via a bus, and a bus connection control unit provided in correspondence with each of the blocks. The bus connection control unit monitors signals between the bus and the block, and upon detecting a read command signal for reading data in a cause register of the block, blocks connection of a signal line between the block and the bus and outputs a dummy read command signal for the memory. The bus connection control unit releases blockage when a response signal for the dummy read command signal is received.
    Type: Application
    Filed: April 9, 2008
    Publication date: October 23, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tsutomu Hatakeyama
  • Patent number: 7414515
    Abstract: An object is to provide a PTC element capable of preventing lead terminals from delaminating from an element body. This PTC element 1 is a PTC element comprising an element body 10 in which an electroconductive filler is dispersed in a crystalline polymer, and a pair of terminal electrodes 12, 14 thermocompression-bonded with the element body 10 in between, wherein each of the pair of terminal electrodes 12, 14 has an overlapping region 121, 141 overlapping with the element body 10, and a nonoverlapping region 122, 142 not overlapping with the element body 10, and wherein the nonoverlapping region 122, 142 of each of the pair of terminal electrodes 12, 14 is constructed of a succession of a wide portion 122a a width of which is large across a direction in which the terminal electrode 12, 14 extends from the element body 10, and a narrow portion 122b a width of which is smaller than the width of the wide portion 122a.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: August 19, 2008
    Assignee: TDK Corporation
    Inventors: Noriaki Hirano, Kunio Mogi, Tsutomu Hatakeyama, Tsukasa Kon, Tokuhiko Handa, Hisanao Tosaka
  • Patent number: 7326889
    Abstract: A method of manufacturing a PTC element comprising a pair of lead terminals bonded together by thermocompression with a matrix held therebetween comprises a matrix preparing step of preparing a matrix constructed by dispersing a conductive filler into a crystalline polymer; a terminal preparing step of preparing a pair of lead terminals holding the matrix therebetween, a surface of each lead terminal facing the matrix being formed with a plurality of anchor protrusions separated from each other; a flattening step of flattening the anchor protrusions formed in respective nonoverlapping areas in the pair of lead terminals kept from overlapping the matrix; and a thermocompression bonding step of holding the matrix between respective overlapping areas in the pair of lead terminals overlapping the matrix, and securing the pair of lead terminals and the matrix together by thermocompression bonding.
    Type: Grant
    Filed: September 15, 2006
    Date of Patent: February 5, 2008
    Assignee: TDK Corporation
    Inventors: Hisanao Tosaka, Tokuhiko Handa, Hirokazu Satoh, Tsutomu Hatakeyama
  • Patent number: 7219197
    Abstract: A cache memory, comprising: a data storage capable of storing data which requires consistency of data with a main memory; and a storage controller which controls to store data which does not require consistency of data with said main memory in an arbitrary data region in said data storage.
    Type: Grant
    Filed: October 30, 2003
    Date of Patent: May 15, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsutomu Hatakeyama
  • Publication number: 20070069848
    Abstract: A method of manufacturing a PTC element comprising a pair of lead terminals bonded together by thermocompression with a matrix held therebetween comprises a matrix preparing step of preparing a matrix constructed by dispersing a conductive filler into a crystalline polymer; a terminal preparing step of preparing a pair of lead terminals holding the matrix therebetween, a surface of each lead terminal facing the matrix being formed with a plurality of anchor protrusions separated from each other; a flattening step of flattening the anchor protrusions formed in respective nonoverlapping areas in the pair of lead terminals kept from overlapping the matrix; and a thermocompression bonding step of holding the matrix between respective overlapping areas in the pair of lead terminals overlapping the matrix, and securing the pair of lead terminals and the matrix together by thermocompression bonding.
    Type: Application
    Filed: September 15, 2006
    Publication date: March 29, 2007
    Applicant: TDK CORPORATION
    Inventors: Hisanao Tosaka, Tokuhiko Handa, Hirokazu Satoh, Tsutomu Hatakeyama
  • Publication number: 20070046420
    Abstract: An object is to provide a PTC element capable of preventing lead terminals from delaminating from an element body. This PTC element 1 is a PTC element comprising an element body 10 in which an electroconductive filler is dispersed in a crystalline polymer, and a pair of terminal electrodes 12, 14 thermocompression-bonded with the element body 10 in between, wherein each of the pair of terminal electrodes 12, 14 has an overlapping region 121, 141 overlapping with the element body 10, and a nonoverlapping region 122, 142 not overlapping with the element body 10, and wherein the nonoverlapping region 122, 142 of each of the pair of terminal electrodes 12, 14 is constructed of a succession of a wide portion 122a a width of which is large across a direction in which the terminal electrode 12, 14 extends from the element body 10, and a narrow portion 122b a width of which is smaller than the width of the wide portion 122a.
    Type: Application
    Filed: August 24, 2006
    Publication date: March 1, 2007
    Applicant: TDK CORPORATION
    Inventors: Noriaki Hirano, Kunio Mogi, Tsutomu Hatakeyama, Tsukasa Kon, Tokuhiko Handa, Hisanao Tosaka
  • Patent number: 7047444
    Abstract: A microprocessor with built-in test, comprising: a register for retaining a test address of a test program; a next address generation logic for generating a command address of a command scheduled to be executed next, based on a command address of a command to be executed next; a first multiplexer for selecting, based on a test mode signal, any one of a boot address specifying a bootstrap program and the test address; a second multiplexer for selecting, based on a reset signal, any one of the command address of the command scheduled to be executed next and the address selected by the first multiplexer; and a program counter for retaining the address selected by the second multiplexer and for outputting the retained address to the next address generation logic as the command address of the command to be executed next.
    Type: Grant
    Filed: December 24, 2002
    Date of Patent: May 16, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsutomu Hatakeyama
  • Patent number: 6948097
    Abstract: By executing internal verification block instructions in a semiconductor device having a function verification capability, internal verification blocks (11-1, . . . , and 11-n) supply optional input data items to corresponding target verification blocks (12-1, . . . , and 12-n) at optional timings, and operation verification for the target verification blocks (12-1, . . . , and 12-n) is performed.
    Type: Grant
    Filed: January 14, 2002
    Date of Patent: September 20, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tsutomu Hatakeyama
  • Publication number: 20040139277
    Abstract: A cache memory, comprising: a data storage capable of storing data which requires consistency of data with a main memory; and a storage controller which controls to store data which does not require consistency of data with said main memory in an arbitrary data region in said data storage.
    Type: Application
    Filed: October 30, 2003
    Publication date: July 15, 2004
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tsutomu Hatakeyama
  • Publication number: 20030120973
    Abstract: A microprocessor with built-in test, comprising: a register for retaining a test address of a test program; a next address generation logic for generating a command address of a command scheduled to be executed next, based on a command address of a command to be executed next; a first multiplexer for selecting, based on a test mode signal, any one of a boot address specifying a bootstrap program and the test address; a second multiplexer for selecting, based on a reset signal, any one of the command address of the command scheduled to be executed next and the address selected by the first multiplexer; and a program counter for retaining the address selected by the second multiplexer and for outputting the retained address to the next address generation logic as the command address of the command to be executed next.
    Type: Application
    Filed: December 24, 2002
    Publication date: June 26, 2003
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tsutomu Hatakeyama
  • Publication number: 20020123368
    Abstract: The focus is positioned on one of the icons shown on a main menu screen and the focal icon is shown enlarged, while the remaining icons are visible.
    Type: Application
    Filed: August 20, 2001
    Publication date: September 5, 2002
    Inventors: Hitoshi Yamadera, Satoko Kojima, Kazumi Matsumoto, Minoru Ikeda, Kaori Kashimura, Tsutomu Hatakeyama, Takafumi Kawasaki
  • Publication number: 20020108056
    Abstract: By executing internal verification block instructions in a semiconductor device having a function verification capability, internal verification blocks (11-1, . . . , and 11-n) supply optional input data items to corresponding target verification blocks (12-1, . . . , and 12-n) at optional timings, and operation verification for the target verification blocks (12-1, . . . , and 12-n) is performed.
    Type: Application
    Filed: January 14, 2002
    Publication date: August 8, 2002
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Tsutomu Hatakeyama
  • Patent number: 6189783
    Abstract: A system and a method for aiding in the use of a facility arranged to equip each visitor with a portable information storing unit is provided for registering several visitors as a group in the portable information storing unit such as an IC card. One visitor holding the portable information storing unit can grasp how another visitor of the group is moving about the facility and exchange a message with another visitor. Further, the facility provides access terminals for the portable information storing unit, on which the visitable unit facilities, the visiting history of each visitor, and a waiting time of each unit facility are displayed.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: February 20, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Yukie Motomiya, Hiroki Kitagawa, Jun Furuya, Tsutomu Hatakeyama