Abstract: A device and method for encrypting content in an encryption device including a content-key storage section is disclosed.

Abstract: A copyright protection system comprises an encryption device and a decryption device. Cryptographic communication is performed between the encryption device and the decryption device using a contents key. The encryption device includes a contents storage section for storing contents, a first contents key generation section for generating the contents key based on a second decryption limitation obtained by updating a first decryption limitation, and a first encryption section for encrypting the contents using the contents key and outputting the encrypted contents. The decryption device includes a second contents key generation section for generating the contents key from the second decryption limitation, and a first decryption section for decrypting the encrypted contents using the contents key generated by the second contents key generation section.

Abstract: An authentication communication system includes an storage medium having an area for storing digital information and an access device for reading/writing digital information from/into the area. The access device authenticates whether the storage medium is authorized according to a challenge-response authentication protocol in which scrambled access information generated by scrambling the access information which shows the area is used. The storage medium authenticates whether the access device is authorized. When the access device and the storage medium have authenticated each other as authorized devices, the access device reads/writes digital information from/into the area in the storage medium according to the access information separated from the scrambled access information by the access device.

Abstract: A decryption device includes: an internal-key storage section for storing an internal-key; a content-key storage section for storing a content-key; a determination section for determining whether or not a value of the content-key storage section in its initial state and a current value of the content-key storage section are different; and an operation section, the operation section including a first decrypting section which, when an encrypted content-key is input to the operation section, decrypts the encrypted content-key using the internal-key so as to obtain a content-key and stores the content-key in the content-key storage section, and a second decrypting section which, when an encrypted content is input to the operation section and the determination section determines that the value of the content-key storage section in its initial state and the current value of the content-key storage section are different, decrypts the encrypted content using the current value of the content-key storage section as a c

Abstract: A request change unit outputs a command as a request under control of a judgment control unit. A response condition determination unit determines a condition that is to be matched by a correct response which is to be returned from the other device-in-communication in reply to the command if the other device-in-communication operates in conformity with a protocol. A check unit checks a response received from the other device-in-communication in reply to the command, against the condition. If the received response does not match the condition but is correctable to match the condition as a result of the check, a response correction unit corrects the received response to match the condition under control of the judgment control unit.

Abstract: When advance prediction is conducted for overflows and underflows, which are both types of buffer errors, and the occurrence of a buffer error is predicted, frames that a viewer will be unlikely to notice even if playback is omitted or conducted for a different duration from a predetermined standard duration are omitted or played for a different playback duration.

Abstract: A processor (10) manages, in an instruction management unit (103) and a data attribute management unit (105), secure attributes indicating whether instruction code and data stored in an instruction cache (102) and a data cache (104) of the processor (10) are confidential information. When the instruction code and the data are confidential information, the processor (10) also manages secure processing identification information for indicating in which secure process the confidential information is to be used. When the operating mode is switched from the secure mode to the normal mode, only the confidential information is disabled by a memory disabling unit (108). This prevents confidential information from being analyzed by the processor in the normal mode.

Abstract: A decryption device includes: an internal-key storage section for storing an internal-key; a content-key storage section for storing a content-key; a determination section for determining whether or not a value of the content-key storage section in its initial state and a current value of the content-key storage section are different; and an operation section, the operation section including a first decrypting section which, when an encrypted content-key is input to the operation section, decrypts the encrypted content-key using the internal-key so as to obtain a content-key and stores the content-key in the content-key storage section, and a second decrypting section which, when an encrypted content is input to the operation section and the determination section determines that the value of the content-key storage section in its initial state and the current value of the content-key storage section are different, decrypts the encrypted content using the current value of the content-key storage section as a c

Abstract: A server apparatus encrypts content, based on a distribution key, and transmits the encrypted content to a PC via a network. The PC, to which a memory card is connected, outputs the received encrypted content to the memory card. The memory card decrypts the encrypted content using the distribution key, converts the data format of the decrypted content, encrypts the content using a medium unique key that is unique to the memory card, and records the resulting re-encrypted content internally. A playback apparatus decrypts the re-encrypted content using the medium unique key, and plays back the decrypted content.

Abstract: A storing device can reduce the frequency of the saving operation at a step of rewriting data on the storing mediums. Where q is a size of all the data to write in storing mediums, m is the number of the storing mediums, and p is each block size, a quotient expressed by zm+w+y(z: 0?z (integer); w: 0?w<m (integer); y: 0?y<1) is calculated by dividing q by p. It is configured so that the data for zm blocks is written in parallel on m storing mediums, and then the data for q/p?zm blocks is written on w+1 storing mediums (win the case of y=0).

Abstract: A file management method, whereby inconsistencies can be prevented between a file recorded in a memory card and the file management information that a terminal apparatus manages, without leaking the information of a file made and stored in an in-card processing system. According to this method, a flash memory accessible from two processing systems 100 and 300 is provided. First processing system 100 requests a reservation of an use area of flash memory 200a to second processing system 300, which, upon receiving the request, implements a reservation processing for an area of the memory section and reflects the information of the reserve area upon file management section 230. First processing system 100 performs the processing of writing data into the area reserved by second processing system 300. Inconsistencies between the file management information that a terminal manages and a file actually recorded into the memory section of a secure card can be prevented.

Abstract: A memory device with a nonvolatile memory and RAM for accessing the nonvolatile memory is generally provided with a table to convert a logical address to a physical address, however, in the invention, the table is divided to a first table on RAM and a second table on the nonvolatile memory. The first table converts specific bits of the logical address to a first physical address indicating a location of the second table. The second table converts the other bits of the logical address to a physical address of a representative page of pages contained in a storage area corresponding to the logical address. A unit operable to access data (a writing unit operable to, a reading unit operable to, and an erasing unit operable to) reaches a target physical address based on the logical address. Such configuration can reduce the capacity of each conversion table.

Abstract: There are disclosed an extended key generator, encryption/decryption unit, and storage medium, in which as each of key transform functions, a transform process is done by an S box (substitution table) on the basis of a first key obtained from the inputted key, and an adder computes a corresponding one of extended keys on the basis of a value obtained by shifting the transformed result of the S box to the left, and a second key obtained from the inputted key.

Abstract: A cross-bus switch apparatus which establishes simultaneously two or more pairs of connections between (i) a source bus arbitrarily selected from a plurality of source buses connected to one or more source apparatuses and (ii) a destination bus arbitrarily selected from a plurality of destination buses connected to one or more destination apparatuses. The cross-bus switch apparatus includes: a plurality of cross-bus switch units. The plurality of source buses are grouped into a plurality of source bus groups which are each connected to one of the plurality of cross-bus switch units. The plurality of destination buses are grouped into a plurality of destination bus groups which are each connected to one of the plurality of cross-bus switch units. Each cross-bus switch unit is connected to either (i) a source bus group or a destination bus group, or (ii) a source bus group and a destination bus group.

Abstract: A system integrated circuit that identifies the cause of a malfunction even if the number of output terminals of a system LSI to be assigned to internal buses in the system LSI is strictly restricted. Comparators 11 to 15 are connected to any of a plurality of buses. Each comparator judges whether a certain expected value matches data transferred on a bus connected to the comparator. The selector unit 10 selects one of the plurality of buses in accordance with the judgement result of the comparator, and outputs data transferred on the selected bus to outside the system integrated circuit so that an observer can observe internal state of the system integrated circuit from outside.

Abstract: When advance prediction is conducted for overflows and underflows, which are both types of buffer errors, and the occurrence of a buffer error is predicted, frames that a viewer will be unlikely to notice even if playback is omitted or conducted for a different duration from a predetermined standard duration are omitted or played for a different playback duration.

Abstract: A copyright protection system comprises an encryption device and a decryption device. Cryptographic communication is performed between the encryption device and the decryption device using a contents key. The encryption device includes a contents storage section for storing contents, a first contents key generation section for generating the contents key based on a second decryption limitation obtained by updating a first decryption limitation, and a first encryption section for encrypting the contents using the contents key and outputting the encrypted contents. The decryption device includes a second contents key generation section for generating the contents key from the second decryption limitation, and a first decryption section for decrypting the encrypted contents using the contents key generated by the second contents key generation section.

Abstract: To precisely adjust a playback reference time counter in a host device by transmitting a time adjustment signal included in a broadcast signal from a broadcast reception apparatus to the host device so that transmission delay inequalities do not occur in a broadcast receive/play system constituted by the host device, which is a portable information terminal or the like that functions to playback stream data based on the MPEG-2 system standard or the like, and the broadcast reception apparatus, which has a card configuration or the like, is mountable in a card slot or the like of the host device, and operates when mounted in and having power supplied from the host device, the broadcast reception apparatus conducts transmission/reception of reception control commands, response data and so forth with the host device via a connection terminal in a first group in sync with a clock signal from the host device, and also, in sync with a clock signal generated within the broadcast reception apparatus, extracts stream

Abstract: A storing device in which the frequency of evacuation of existing data in an erasing step is reduced. With all data, the writing of which is requested from outside, as q, the number of storing mediums as m and the block size as p, the q of all the data is divided by the size p of the block to obtain a quotient zm+w+y (z: 0≦z (integer); w: 0≦w (integer)<m; y: 0≦y<1). And data for zm blocks are written on m pieces of storing mediums in parallel and after that, data for (q−zm) blocks are written on w+1 pieces (w in the case of y=0) of storing mediums. Thus, the frequency of evacuation in erasing can be reduced.

Abstract: A memory device that is free from problems resulted from the characteristics of nonvolatile memory chips. The problems are specifically those occurring at the time of data transfer between nonvolatile memory chips, e.g., data error or program error occurring after data transfer. In the memory device, an error correction code process unit applies error detection to data read from a nonvolatile memory chip to a data line for data transfer. For such detection, an error correction code for the data is referred to. At the time of data transfer between the nonvolatile memory chips, if the data is detected as containing a correctable error, a writing unit writes the corrected data to a nonvolatile memory, which is the transfer destination. In this manner, at the time of data transfer between the nonvolatile memory chips, the error never fails to be detected before data writing.