Patents by Inventor Tsuyoshi Fujiwara

Tsuyoshi Fujiwara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10916506
    Abstract: A semiconductor device includes a semiconductor substrate, an interlayer dielectric film, a plurality of pad parts, a wiring layer, and a surface protection film. The semiconductor substrate includes a semiconductor element on a surface of the semiconductor substrate. The interlayer dielectric film is disposed on the surface of the semiconductor substrate. The wiring layer is disposed in the interlayer dielectric film. The hard film is disposed opposite to the semiconductor substrate with respect to the interlayer dielectric film, and is harder than the interlayer dielectric film. The pad parts are disposed opposite to the interlayer dielectric film with respect to the hard film. The surface protection film is disposed in at least an opposing region where the pad parts oppose to each other. The surface protection film is a silicon nitride film or a silicon oxide film.
    Type: Grant
    Filed: March 18, 2019
    Date of Patent: February 9, 2021
    Assignee: DENSO CORPORATION
    Inventors: Youichi Ashida, Tsuyoshi Fujiwara
  • Publication number: 20210005597
    Abstract: A semiconductor device includes a plurality of capacitors with MIM structure disposed in an interconnection layer on a substrate. Each capacitor includes a first electrode and a second electrode provided by any two interconnection parts of the interconnection layer, in which the first electrode is one of the two interconnection parts located adjacent to the substrate and the second electrode is the other located opposite to the substrate with respect to the first electrode. One of the first and second electrode of each capacitor is provided by the same interconnection part as a subject electrode, and a distance between the first electrode and the second electrode is different among the plurality of capacitors to have different capacitances. The subject electrodes provided by the same interconnection part are covered with an insulating film of the interconnection layer, and have ends on a same plane.
    Type: Application
    Filed: September 22, 2020
    Publication date: January 7, 2021
    Inventors: Tsuyoshi FUJIWARA, Seiji NOMA
  • Publication number: 20200095115
    Abstract: A semiconductor device includes a first substrate having a first surface, and a second substrate having a second surface. A part of the second substrate is bonded to a part of the first surface with atmospheric pressure plasma. The semiconductor device further includes an oxide film disposed on the first surface of the first substrate, and a protection film layered on a surface of the oxide film opposite to the first substrate.
    Type: Application
    Filed: November 27, 2019
    Publication date: March 26, 2020
    Inventors: Takahiro KAWANO, Hisanori YOKURA, Tsuyoshi FUJIWARA
  • Patent number: 10403709
    Abstract: Roughness is eliminated and planarization is achieved by a metal oxide film on a surface of a lower electrode. Consequently, damage on a capacitive film caused by the roughness of the lower electrode is reduced. Furthermore, physical damage on the capacitive film is reduced by forming a first layer of an upper electrode by, for example, CVD. Consequently, the damage on the capacitive film is suppressed, and the reliability of the capacitive film is improved. Furthermore, not by forming the whole upper electrode by the CVD or the like, but by forming a second layer by PCD or the like on the first layer, an increase in resistance of the upper electrode is suppressed as well.
    Type: Grant
    Filed: November 17, 2016
    Date of Patent: September 3, 2019
    Assignee: DENSO CORPORATION
    Inventors: Youhei Oda, Tsuyoshi Fujiwara
  • Publication number: 20190214346
    Abstract: A semiconductor device includes a semiconductor substrate, an interlayer dielectric film, a plurality of pad parts, a wiring layer, and a surface protection film. The semiconductor substrate includes a semiconductor element on a surface of the semiconductor substrate. The interlayer dielectric film is disposed on the surface of the semiconductor substrate. The wiring layer is disposed in the interlayer dielectric film. The hard film is disposed opposite to the semiconductor substrate with respect to the interlayer dielectric film, and is harder than the interlayer dielectric film, The pad parts are disposed opposite to the interlayer dielectric film with respect to the hard film, The surface protection film is disposed in at least an opposing region where the pad parts oppose to each other. The surface protection film is a silicon nitride film or a silicon oxide film.
    Type: Application
    Filed: March 18, 2019
    Publication date: July 11, 2019
    Inventors: Youichi ASHIDA, Tsuyoshi FUJIWARA
  • Publication number: 20180350897
    Abstract: Roughness is eliminated and planarization is achieved by a metal oxide film on a surface of a lower electrode. Consequently, damage on a capacitive film caused by the roughness of the lower electrode is reduced. Furthermore, physical damage on the capacitive film is reduced by forming a first layer of an upper electrode by, for example, CVD. Consequently, the damage on the capacitive film is suppressed, and the reliability of the capacitive film is improved. Furthermore, not by forming the whole upper electrode by the CVD or the like, but by forming a second layer by PCD or the like on the first layer, an increase in resistance of the upper electrode is suppressed as well.
    Type: Application
    Filed: November 17, 2016
    Publication date: December 6, 2018
    Inventors: Youhei ODA, Tsuyoshi FUJIWARA
  • Publication number: 20170146835
    Abstract: A liquid crystal display device comprises a TFT substrate, forming a wiring made of a material shutting off UV rays on a peripheral region thereof, and a sealing layer, including a UV ray curable resin therein, and being formed on peripheral regions of the substrate, to enclose the liquid crystal layer. The wiring and the sealing layer formed on the peripheral region are so provided that they are put on each other, at least in part thereof, on the wiring are provided plural numbers of opening portions formed in region where the wiring and the sealing layer are put on each other, and the opening portions are divided into a first area beside a display region and a second area outside the first area, and an opening ratio of the opening portions of the first area is larger than the opening ratio of the opening portions of the second area.
    Type: Application
    Filed: December 16, 2016
    Publication date: May 25, 2017
    Inventor: Tsuyoshi FUJIWARA
  • Patent number: 9557607
    Abstract: A liquid crystal display device comprises a TFT substrate, forming a wiring made of a material shutting off UV rays on a peripheral region thereof, and a sealing layer, including a UV ray curable resin therein, and being formed on peripheral regions of the substrate, to enclose the liquid crystal layer. The wiring and the sealing layer formed on the peripheral region are so provided that they are put on each other, at least in part thereof, on the wiring are provided plural numbers of opening portions formed in region where the wiring and the sealing layer are put on each other, and the opening portions are divided into a first area beside a display region and a second area outside the first area, and an opening ratio of the opening portions of the first area is larger than the opening ratio of the opening portions of the second area.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: January 31, 2017
    Assignee: Japan Display Inc.
    Inventor: Tsuyoshi Fujiwara
  • Patent number: 9142608
    Abstract: A step of forming a stacked film serving as a lower electrode, a step of forming an insulating film serving as a capacitive film on the stacked film, and a step of patterning the insulating film and the stacked film are performed. In the step of forming the stacked film, a film containing titanium, a film containing titanium and nitrogen, a main conductive film containing aluminum, a film containing titanium, and a film containing titanium and nitrogen are sequentially formed from below. The ratio of the surface roughness of the upper surface of the stacked film to the thickness of the insulating film is 14% or less.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: September 22, 2015
    Assignee: Asahi Kasei Microdevices Corporation
    Inventors: Tsuyoshi Fujiwara, Kiyohiko Satoh, Daichi Matsumoto, Tsutomu Miyazaki
  • Publication number: 20150212353
    Abstract: A liquid crystal display device comprises a TFT substrate, forming a wiring made of a material shutting off UV rays on a peripheral region thereof, and a sealing layer, including a UV ray curable resin therein, and being formed on peripheral regions of the substrate, to enclose the liquid crystal layer. The wiring and the sealing layer formed on the peripheral region are so provided that they are put on each other, at least in part thereof, on the wiring are provided plural numbers of opening portions formed in region where the wiring and the sealing layer are put on each other, and the opening portions are divided into a first area beside a display region and a second area outside the first area, and an opening ratio of the opening portions of the first area is larger than the opening ratio of the opening portions of the second area.
    Type: Application
    Filed: April 9, 2015
    Publication date: July 30, 2015
    Inventor: Tsuyoshi FUJIWARA
  • Patent number: 9063381
    Abstract: A liquid crystal display device comprises a TFT substrate, forming a wiring made of a material shutting off UV rays on a peripheral region thereof, and a sealing layer, including a UV ray curable resin therein, and being formed on peripheral regions of the substrate, to enclose the liquid crystal layer. The wiring and the sealing layer formed on the peripheral region are so provided that they are put on each other, at least in part thereof, on the wiring are provided plural numbers of opening portions formed in region where the wiring and the sealing layer are put on each other, and the opening portions are divided into a first area beside a display region and a second area outside the first area, and an opening ratio of the opening portions of the first area is larger than the opening ratio of the opening portions of the second area.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: June 23, 2015
    Assignee: Japan Display Inc.
    Inventor: Tsuyoshi Fujiwara
  • Patent number: 8933514
    Abstract: The orientation polarization (positive and negative) of the Si—N bonds and the Si—O bonds is canceled, thereby enabling to minimize the polarization in a capacitive insulating film. As a result, a silicon oxynitride film with a small voltage secondary coefficient is formed, and is applied as a capacitive insulating film for use in a MIM capacitor. Specifically, the refractive index “n” of the silicon oxynitride film satisfies 1.47?n?1.53, for light with a wavelength of 633 nm.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: January 13, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Kiyohiko Sato, Ryohei Maeno, Tsuyoshi Fujiwara, Akira Otaguro, Yukino Ishii, Kiyomi Katsuyama, Hidenori Sato, Daichi Matsumoto
  • Publication number: 20140264748
    Abstract: A step of forming a stacked film serving as a lower electrode, a step of forming an insulating film serving as a capacitive film on the stacked film, and a step of patterning the insulating film and the stacked film are performed. In the step of forming the stacked film, a film containing titanium, a film containing titanium and nitrogen, a main conductive film containing aluminum, a film containing titanium, and a film containing titanium and nitrogen are sequentially formed from below. The ratio of the surface roughness of the upper surface of the stacked film to the thickness of the insulating film is 14% or less.
    Type: Application
    Filed: February 27, 2014
    Publication date: September 18, 2014
    Inventors: Tsuyoshi Fujiwara, Kiyohiko Satoh, Daichi Matsumoto, Tsutomu Miyazaki
  • Patent number: 8663426
    Abstract: The present invention relates to a method of producing a cellulose-fiber flat structure, the method including obtaining a cellulose-fiber flat structure by filtering a fine cellulose-fiber dispersion containing fine cellulose fibers having an average fiber diameter of 4 to 100 nm, using a filter material having a water permeability of not more than 100 ml/m2·s and an initial tensile modulus of 20 MPa or greater. The present invention is able to produce a cellulose-fiber flat structure by efficiently recovering fine cellulose fibers from a dispersion containing fine cellulose fibers having an average fiber diameter at the nano level. The method of producing a cellulose-fiber flat structure can also be applied to a continuous process.
    Type: Grant
    Filed: February 1, 2011
    Date of Patent: March 4, 2014
    Assignees: Mitsubishi Chemical Corporation, Oji Paper Co., Ltd.
    Inventors: Tsuyoshi Fujiwara, Naohide Ogita, Takashi Kawamukai
  • Publication number: 20130335690
    Abstract: A liquid crystal display device comprises a TFT substrate, forming a wiring made of a material shutting off UV rays on a peripheral region thereof, and a sealing layer, including a UV ray curable resin therein, and being formed on peripheral regions of the substrate, to enclose the liquid crystal layer. The wiring and the sealing layer formed on the peripheral region are so provided that they are put on each other, at least in part thereof, on the wiring are provided plural numbers of opening portions formed in region where the wiring and the sealing layer are put on each other, and the opening portions are divided into a first area beside a display region and a second area outside the first area, and an opening ratio of the opening portions of the first area is larger than the opening ratio of the opening portions of the second area.
    Type: Application
    Filed: June 13, 2013
    Publication date: December 19, 2013
    Inventor: Tsuyoshi FUJIWARA
  • Patent number: 8551857
    Abstract: The technique for manufacturing a high-capacitance and high-accuracy MIM electrostatic capacitor by a small number of steps is provided. After a lower electrode of the electrostatic capacitor and second wiring are formed at the same time on a first interlayer insulating film, an opening part is formed in a second interlayer insulating film deposited on the first interlayer insulating film. Next, a capacitance insulating film, a second metal film and a protective metal film are sequentially deposited on the second interlayer insulating film including the interior of the opening part, and the protective metal film, the second metal film and the capacitance insulating film on the second interlayer insulating film are polished and removed by a CMP method, thereby causing the capacitance insulating film, an upper electrode made of the second metal film and the protective metal film to remain in the opening part.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: October 8, 2013
    Assignees: Hitachi, Ltd., Asahi Kasei Microdevices Corporation
    Inventors: Yuji Imamura, Tsuyoshi Fujiwara, Toyohiko Kuno
  • Patent number: 8522485
    Abstract: A center-channel protector for a vehicle sash door is arranged between a main sash and a center channel. A body of the protector has an H-shaped upper-end surface which is compatible to cover the upper end of the center channel. The body integrally includes a pair of branch covering portions corresponding to a pair of branch portions constituting the center channel and a middle covering portion disposed between the branch covering portions so as to connect the both branch covering portions therewith. An engaging portion is provided with the body and is mechanically engaged, in a direction intersecting a vertical direction, with an engaged portion which is provided with a center channel side. In collaboration with the engaged portion, the engaging portion constitutes a fastening mechanism by which the protector is fastened on the center channel.
    Type: Grant
    Filed: March 6, 2012
    Date of Patent: September 3, 2013
    Assignee: Katayama Kogyo Co., Ltd.
    Inventors: Chikara Yamashita, Akihiro Terai, Hiromichi Torihata, Tsuyoshi Fujiwara
  • Patent number: 8354730
    Abstract: A structure obtaining a desired integrated circuit by sticking together a plurality of semiconductor substrates and electrically connecting integrated circuits formed on semiconductor chips of the respective semiconductor substrates is provided, and a penetrating electrode penetrating between a main surface and a rear surface of each of the semiconductor substrates and a penetrating separation portion separating the penetrating electrode are separately arranged. Thereby, after forming an insulation trench portion for formation of the penetrating separation portion on the semiconductor substrate, a MIS•FET is formed, and then, a conductive trench portion for formation of the penetrating electrode can be formed. Therefore, element characteristics of a semiconductor device having a three-dimensional structure can be improved.
    Type: Grant
    Filed: August 25, 2006
    Date of Patent: January 15, 2013
    Assignees: Hitachi, Ltd., Honda Motor Co., Ltd.
    Inventors: Satoshi Moriya, Toshio Saito, Goichi Yokoyama, Tsuyoshi Fujiwara, Hidenori Sato, Nobuaki Miyakawa
  • Publication number: 20120298319
    Abstract: The present invention relates to a method of producing a cellulose-fiber flat structure, the method including obtaining a cellulose-fiber flat structure by filtering a fine cellulose-fiber dispersion containing fine cellulose fibers having an average fiber diameter of 4 to 100 nm, using a filter material having a water permeability of not more than 100 ml/m2·s and an initial tensile modulus of 20 MPa or greater. The present invention is able to produce a cellulose-fiber flat structure by efficiently recovering fine cellulose fibers from a dispersion containing fine cellulose fibers having an average fiber diameter at the nano level. The method of producing a cellulose-fiber flat structure can also be applied to a continuous process.
    Type: Application
    Filed: February 1, 2011
    Publication date: November 29, 2012
    Applicants: OJI PAPER CO., LTD., MITSUBISHI CHEMICAL CORPORATION
    Inventors: Tsuyoshi Fujiwara, Naohide Ogita, Takashi Kawamukai
  • Patent number: 8212649
    Abstract: A semiconductor device according to the present invention includes: a lower-surface oxidation preventing insulating film formed on a lower surface of a metal resistor element; an upper-surface oxidation preventing insulating film formed on an upper surface of the metal resistor element; and a side-surface oxidation preventing insulating film formed only near a side surface of the metal resistor element by performing anisotropic etching after being deposited on a whole surface of a wafer in a process separated from the lower-surface oxidation preventing insulating film and the upper-surface oxidation preventing insulating film. According to the present invention, it is possible to prevent the increase of the resistance value due to the oxidation of the metal resistor element and also to prevent the increase of the parasitic capacitance between metal wiring layers without complicating the fabrication process.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: July 3, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Tsuyoshi Fujiwara, Toshinori Imai, Kenichi Takeda, Hiromi Shimamoto