Patents by Inventor Tsuyoshi Kawakami

Tsuyoshi Kawakami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10892352
    Abstract: In the present application, a power semiconductor device includes a first-conductive-type first base region having a first principal surface and a second principal surface opposite to the first principal surface, a second-conductive-type second base region disposed on the first principal surface and at least three groove parts parallel to each other disposed from a surface of the second base region. The device further includes insulating films covering inner walls of the respective groove parts, conductive trench gates filled on the insulating films, a first-conductive-type emitter region disposed in the second base region, and a second-conductive-type collector region disposed on the second principal surface of the first base region. The trench gates embedded in the first groove part and the third groove part are electrically connected to the gate electrode, and the trench gate embedded in the second groove part is electrically connected to the emitter electrode.
    Type: Grant
    Filed: December 6, 2018
    Date of Patent: January 12, 2021
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akihiko Furukawa, Shoichi Orita, Hiroki Muraoka, Atsushi Narazaki, Tsuyoshi Kawakami, Yuji Murakami
  • Patent number: 10559659
    Abstract: A power semiconductor device includes an emitter electrode disposed on a semiconductor substrate and through which a main current flows, a conductive layer that is disposed on the emitter electrode and is not a sintered compact, and a sintered metal layer that is disposed on the conductive layer and is a sintered compact. The sintered metal layer has a size to cover all the emitter electrode in plan view, and has higher heat conductivity than the conductive layer. The power semiconductor device can improve heat dissipation performance and adhesion.
    Type: Grant
    Filed: December 21, 2016
    Date of Patent: February 11, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Atsufumi Inoue, Seiji Oka, Tsuyoshi Kawakami, Akihiko Furukawa, Hidetada Tokioka, Mutsumi Tsuda, Yasushi Fujioka
  • Patent number: 10363843
    Abstract: For loading space extending from a carriage to a driving section in a multipurpose vehicle with a driving section and a carriage disposed to the rear of the driving section fitted with a driver seat and a passenger seat laterally: the passenger seat has a seat portion and a backrest portion forwardly rotatable about a fulcrum provided by each of a front lower portion and a lower portion; a front gate board disposed on a front end of a floor board constituting the carriage is configured such that a movable front gate board positioned rearward of the passenger seat is forwardly rotatable; and the seat portion and the backrest portion rotated forward, the movable front gate board rotatable and to place over the backrest portion for an extended loading space.
    Type: Grant
    Filed: October 30, 2015
    Date of Patent: July 30, 2019
    Assignee: YANMAR CO., LTD.
    Inventors: Tsuyoshi Kawakami, Masaaki Yamashita, Kiyoyuki Okuyama
  • Patent number: 10349572
    Abstract: In order to use a manned-travel work vehicle, such as a multi-purpose transport vehicle, for transporting machinery or material or for moving for the purpose of work, a rest or the like, and to cause an unmanned-travel work vehicle to reliably arrive at a destination using wireless communication, the present invention provides a work vehicle transport system. In the transport system, travel trajectory information about a travel trajectory of a first vehicle that is a manned-travel work vehicle to a work location is transmitted via wireless communication to a second vehicle, and it is determined whether the second vehicle is to perform unmanned-travel along the travel trajectory.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: July 16, 2019
    Assignee: YANMAR CO., LTD.
    Inventors: Masaaki Yamashita, Tsuyoshi Kawakami, Daisuke Hirata
  • Publication number: 20190152358
    Abstract: For loading space extending from a carriage to a driving section in a multipurpose vehicle with a driving section and a carriage disposed to the rear of the driving section fitted with a driver seat and a passenger seat laterally: the passenger seat has a seat portion and a backrest portion forwardly rotatable about a fulcrum provided by each of a front lower portion and a lower portion; a front gate board disposed on a front end of a floor board constituting the carriage is configured such that a movable front gate board positioned rearward of the passenger seat is forwardly rotatable; and the seat portion and the backrest portion rotated forward, the movable front gate board rotatable and to place over the backrest portion for an extended loading space.
    Type: Application
    Filed: October 30, 2015
    Publication date: May 23, 2019
    Inventors: Tsuyoshi KAWAKAMI, Masaaki YAMASHITA, Kiyoyuki OKUYAMA
  • Publication number: 20190109220
    Abstract: In the present application, a power semiconductor device includes a first-conductive-type first base region having a first principal surface and a second principal surface opposite to the first principal surface, a second-conductive-type second base region disposed on the first principal surface and at least three groove parts parallel to each other disposed from a surface of the second base region. The device further includes insulating films covering inner walls of the respective groove parts, conductive trench gates filled on the insulating films, a first-conductive-type emitter region disposed in the second base region, and a second-conductive-type collector region disposed on the second principal surface of the first base region. The trench gates embedded in the first groove part and the third groove part are electrically connected to the gate electrode, and the trench gate embedded in the second groove part is electrically connected to the emitter electrode.
    Type: Application
    Filed: December 6, 2018
    Publication date: April 11, 2019
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akihiko FURUKAWA, Shoichi Orita, Hiroki Muraoka, Atsushi Narazaki, Tsuyoshi Kawakami, Yuji Murakami
  • Publication number: 20190058037
    Abstract: A power semiconductor device includes an emitter electrode disposed on a semiconductor substrate and through which a main current flows, a conductive layer that is disposed on the emitter electrode and is not a sintered compact, and a sintered metal layer that is disposed on the conductive layer and is a sintered compact. The sintered metal layer has a size to cover all the emitter electrode in plan view, and has higher heat conductivity than the conductive layer. The power semiconductor device can improve heat dissipation performance and adhesion.
    Type: Application
    Filed: December 21, 2016
    Publication date: February 21, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Atsufumi INOUE, Seiji OKA, Tsuyoshi KAWAKAMI, Akihiko FURUKAWA, Hidetada TOKIOKA, Mutsumi TSUDA, Yasushi FUJIOKA
  • Patent number: 10192977
    Abstract: In the present application, a power semiconductor device includes a first-conductive-type first base region having a first principal surface and a second principal surface opposite to the first principal surface, a second-conductive-type second base region disposed on the first principal surface and at least three groove parts parallel to each other disposed from a surface of the second base region. The device further includes insulating films covering inner walls of the respective groove parts, conductive trench gates filled on the insulating films, a first-conductive-type emitter region disposed in the second base region, and a second-conductive-type collector region disposed on the second principal surface of the first base region. The trench gates embedded in the first groove part and the third groove part are electrically connected to the gate electrode, and the trench gate embedded in the second groove part is electrically connected to the emitter electrode.
    Type: Grant
    Filed: October 29, 2014
    Date of Patent: January 29, 2019
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akihiko Furukawa, Shoichi Orita, Hiroki Muraoka, Atsushi Narazaki, Tsuyoshi Kawakami, Yuji Murakami
  • Patent number: 10192978
    Abstract: A semiconductor apparatus includes: a p-type base layer provided on a top surface side of an n-type drift layer; an n-type emitter layer provided on a top surface side of the p-type base layer; a first control electrode having a trench gate electrode embedded so as to reach from a surface layer of the n-type emitter layer to the n-type drift layer; a second control electrode having a trench gate electrode embedded so as to reach from the p-type base layer to the n-type drift layer; a p-type collector layer provided on a bottom surface side of the n-type drift layer; and a diode whose anode side and cathode side are connected to the first control electrode and the second control electrodes, respectively. It is possible to improve the controllability of dV/dt by a gate resistor.
    Type: Grant
    Filed: October 6, 2016
    Date of Patent: January 29, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Satoshi Okuda, Akihiko Furukawa, Tsuyoshi Kawakami
  • Publication number: 20180323294
    Abstract: A semiconductor apparatus includes: a p-type base layer (7a, 7b) provided on a top surface side of an n-type drift layer (10); an n-type emitter layer (6) provided on a top surface side of the p-type base layer (7a); a first control electrode (1) having a trench gate electrode (15) embedded so as to reach from a surface layer of the n-type emitter layer (6) to the n-type drift layer (10); a second control electrode (2) having a trench gate electrode (15) embedded so as to reach from the p-type baes layer (7b) to the n-type drift layer (10); a p-type collector layer (12) provided on a bottom surface side of the n-type drift layer (10); and a diode (21) whose anode side and cathode side are connected to the first control electrode 1 and the second control electrodes 2, respectively. It is possible to improve the controllability of dV/dt by a gate resistor.
    Type: Application
    Filed: October 6, 2016
    Publication date: November 8, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Satoshi OKUDA, Akihhiko FURAKAWA, Tsuyoshi KAWAKAMI
  • Publication number: 20170318732
    Abstract: In order to use a manned-travel work vehicle, such as a multi-purpose transport vehicle, for transporting machinery or material or for moving for the purpose of work, a rest or the like, and to cause an unmanned-travel work vehicle to reliably arrive at a destination using wireless communication, the present invention provides a work vehicle transport system. In the transport system, travel trajectory information about a travel trajectory of a first vehicle that is a manned-travel work vehicle to a work location is transmitted via wireless communication to a second vehicle, and it is determined whether the second vehicle is to perform unmanned-travel along the travel trajectory.
    Type: Application
    Filed: November 12, 2015
    Publication date: November 9, 2017
    Applicant: YANMAR CO., LTD.
    Inventors: Masaaki YAMASHITA, Tsuyoshi KAWAKAMI, Daisuke HIRATA
  • Patent number: 9536942
    Abstract: A semiconductor device includes an active region formed in an upper layer portion of a semiconductor layer of a first conductivity type, and a plurality of electric field relaxation layers disposed from an edge of the active region toward the outside so as to surround the active region. The plurality of electric field relaxation layers include a plurality of first electric field relaxation layers and a plurality of second electric field relaxation layers alternately disposed adjacent to each other, the first electric field relaxation layer and the second electric field relaxation layer adjacent to each other forming a set. Impurities of a second conductivity type are implanted to the first electric field relaxation layers at a first surface density, widths of which becoming smaller as apart from the active region.
    Type: Grant
    Filed: August 2, 2012
    Date of Patent: January 3, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tsuyoshi Kawakami, Kenji Hamada, Kohei Ebihara, Akihiko Furukawa, Yuji Murakami
  • Publication number: 20160372585
    Abstract: In the present application, a power semiconductor device includes a first-conductive-type first base region having a first principal surface and a second principal surface opposite to the first principal surface, a second-conductive-type second base region disposed on the first principal surface and at least three groove parts parallel to each other disposed from a surface of the second base region. The device further includes insulating films covering inner walls of the respective groove parts, conductive trench gates filled on the insulating films, a first-conductive-type emitter region disposed in the second base region, and a second-conductive-type collector region disposed on the second principal surface of the first base region. The trench gates embedded in the first groove part and the third groove part are electrically connected to the gate electrode, and the trench gate embedded in the second groove part is electrically connected to the emitter electrode.
    Type: Application
    Filed: October 29, 2014
    Publication date: December 22, 2016
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Akihiko FURUKAWA, Shoichi ORITA, Hiroki MURAOKA, Atsushi NARAZAKI, Tsuyoshi KAWAKAMI, Yuji MURAKAMI
  • Patent number: 9508792
    Abstract: An electric field buffer layer is formed so as to surround an active region. The electric field buffer layer includes a plurality of P-type impurity layers. Each of the P-type impurity layers includes P-type implantation layers and P-type diffusion layers that are formed so as to respectively surround the P-type implantation layers and contain P-type impurities at a concentration lower than that of the P-type implantation layers. A first P-type implantation layer is formed to be in contact with or to partially overlap the active region. Each of the P-type diffusion layers is formed to have an expansion to a degree to which the first P-type diffusion layer is in contact with or overlaps a second P-type diffusion layer. Intervals between the P-type implantation layers increase from the active region toward the outer peripheral portion of the semiconductor substrate.
    Type: Grant
    Filed: May 1, 2013
    Date of Patent: November 29, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tsuyoshi Kawakami, Ze Chen, Akito Nishii, Fumihito Masuoka, Katsumi Nakamura, Akihiko Furukawa, Yuji Murakami
  • Patent number: 9385183
    Abstract: The termination region includes a ring region (LNFLR). A plurality of ring-shaped P-type ring layers are regularly arranged in the ring region (LNFLR). The ring region (LNFLR) is divided into a plurality of units which include the plurality of P-type ring layers respectively. A width of each unit is constant. A total number of P-type impurities in the ring region (LNFLR) is N, the target withstand voltage is BV [V], a width of each unit is SandL [?m], and the number of the plurality of units is num, following relationships are satisfied. N?(M×BV)?, M=104 to 105, ?=0.55 to 1.95, SandL×num×Ecri?2×?×BV, Ecri=2.0 to 3.0×105 [V/cm], ?=100 to 101. Widths of the P-type ring layers of the plurality of units linearly decrease toward an outside of the termination region.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: July 5, 2016
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Ze Chen, Tsuyoshi Kawakami, Katsumi Nakamura
  • Patent number: 9202940
    Abstract: A semiconductor device having high breakdown voltage and high reliability without forming an embedded injection layer with high position accuracy. The semiconductor device includes a base as an active area of a second conductivity type formed on a surface layer of a semiconductor layer of a first conductivity type to constitute a semiconductor element; guard rings as a plurality of first impurity regions of the second conductivity type formed on the surface layer of the semiconductor layer spaced apart from each other to respectively surround the base in plan view; and an embedded injection layer as a second impurity region of the second conductivity type embedded in the surface layer of the semiconductor layer to connect at least two bottom portions of the plurality of guard rings.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: December 1, 2015
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tsuyoshi Kawakami, Yoshiyuki Nakaki, Yoshio Fujii, Hiroshi Watanabe, Shuhei Nakata, Kohei Ebihara, Akihiko Furukawa
  • Publication number: 20150279931
    Abstract: The termination region includes a ring region (LNFLR). A plurality of ring-shaped P-type ring layers (12a˜120 are regularly arranged in the ring region (LNFLR). The ring region (LNFLR) is divided into a plurality of units which include the plurality of P-type ring layers (12a˜120 respectively. A width of each unit is constant. A total number of P-type impurities in the ring region (LNFLR) is N, the target withstand voltage is BV [V], a width of each unit is SandL [?m], and the number of the plurality of units is num, following relationships are satisfied. N?(M×BV)?, M=104 to 105, ?=0.55 to 1.95, SandL×num×Ecri?2×?×BV, Ecri=2.0 to 3.0×105 [V/cm], ?=100 to 101. Widths of the P-type ring layers (12a˜12f) of the plurality of units linearly decrease toward an outside of the termination region.
    Type: Application
    Filed: December 6, 2012
    Publication date: October 1, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Ze CHEN, Tsuyoshi KAWAKAMI, Katsumi NAKAMURA
  • Patent number: D763731
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: August 16, 2016
    Assignee: Yanmar Co., Ltd.
    Inventors: Kiyoyuki Okuyama, Masaaki Yamashita, Tsuyoshi Kawakami, Daisuke Hirata
  • Patent number: D763732
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: August 16, 2016
    Assignee: Yanmar Co., Ltd.
    Inventors: Kiyoyuki Okuyama, Masaaki Yamashita, Tsuyoshi Kawakami, Daisuke Hirata
  • Patent number: D764350
    Type: Grant
    Filed: May 8, 2015
    Date of Patent: August 23, 2016
    Assignee: Yanmar Co., Ltd.
    Inventors: Kiyoyuki Okuyama, Masaaki Yamashita, Tsuyoshi Kawakami, Daisuke Hirata