Patents by Inventor Umamaheswara VEMULAPATI

Umamaheswara VEMULAPATI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967638
    Abstract: A power diode comprises a plurality of diode cells (10). Each diode cell (10) comprises a first conductivity type first anode layer (40), a first conductivity type second anode layer (45) having a lower doping concentration than the first anode layer (40) and being separated from an anode electrode layer (20) by the first anode layer (40), a second conductivity type drift layer (50) forming a pn-junction with the second anode layer (45), a second conductivity type cathode layer (60) being in direct contact with the cathode electrode layer (60), and a cathode-side segmentation layer (67) being in direct contact with the cathode electrode layer (30). A material of the cathode-side segmentation layer (67) is a first conductivity type semiconductor, wherein an integrated doping content of the cathode-side, which is integrated along a direction perpendicular to the second main side (102), is below 2·1013 cm?2, or a material of the cathode-side segmentation layer (67) is an insulating material.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: April 23, 2024
    Assignee: Hitachi Energy Ltd
    Inventors: Tobias Wikstroem, Umamaheswara Vemulapati, Thomas Stiasny
  • Publication number: 20240038880
    Abstract: A bidirectional thyristor device (1) comprising a semiconductor body (2) extending between a first main surface (21) and a second main surface (22), is provided wherein a first main electrode (31) and a first gate electrode (41) are arranged on the first main surface and a second main electrode (32) and a second gate electrode (42) are arranged on the second main surface. The first main electrode comprises a plurality of first segments (310) that are spaced apart from one another, wherein at least some of the first segments are completely surrounded by the first gate electrode in a view onto the first main surface. The second main electrode comprises a plurality of second segments (320) that are spaced apart from one another, wherein at least some of the second segments are completely surrounded by the second gate electrode in a view onto the second main surface.
    Type: Application
    Filed: November 22, 2021
    Publication date: February 1, 2024
    Inventors: Jan VOBECKY, Umamaheswara VEMULAPATI
  • Patent number: 11824091
    Abstract: An integrated gate-commutated thyristor (IGCT) includes a semiconductor wafer having a first main side and a second main side opposite to the first main side and a plurality of first type thyristor cells and second type thyristor cells. The cathode electrode of the first type thyristor cells forms an ohmic contact with the cathode region and the cathode electrode of the second type thyristor cells is insulated from the cathode region. A predefined percentage of second type thyristor cells of the overall amount of first type thyristor cells and second type thyristor cells in a segment ring is greater than 0% and less than or equal to 75%.
    Type: Grant
    Filed: February 22, 2021
    Date of Patent: November 21, 2023
    Assignee: Hitachi Energy Switzerland AG
    Inventors: Tobias Wikstroem, Umamaheswara Vemulapati
  • Publication number: 20230317818
    Abstract: Disclosed is a power semiconductor device comprising a semiconductor wafer having a first main side and second main side. The semiconductor wafer comprises parallel thyristor cells, which each comprises (a) a cathode electrode and gate electrode on the first main side; (b) a cathode layer comprising a cathode region of a first conductivity type, forming an ohmic contact with the cathode electrode; (c) a first base layer of a second conductivity type, wherein the cathode region forms a p-n junction between the first base layer and cathode region; (d) a second base layer of the first conductivity type forming a second p-n junction with the first base layer; (e) an anode layer of the second conductivity type separated from the first base layer by the second base layer. The gate electrodes of the plurality of thyristor cells form a gate design comprising multiple polygons each comprising at least four struts.
    Type: Application
    Filed: August 19, 2021
    Publication date: October 5, 2023
    Inventors: Jan VOBECKY, Umamaheswara VEMULAPATI
  • Publication number: 20230111333
    Abstract: An integrated gate-commutated thyristor (IGCT) includes a semiconductor wafer having a first main side and a second main side opposite to the first main side and a plurality of first type thyristor cells and second type thyristor cells. The cathode electrode of the first type thyristor cells forms an ohmic contact with the cathode region and the cathode electrode of the second type thyristor cells is insulated from the cathode region. A predefined percentage of second type thyristor cells of the overall amount of first type thyristor cells and second type thyristor cells in a segment ring is greater than 0% and less than or equal to 75%.
    Type: Application
    Filed: February 22, 2021
    Publication date: April 13, 2023
    Inventors: Tobias Wikstroem, Umamaheswara Vemulapati
  • Publication number: 20230046742
    Abstract: A reverse conducting power semiconductor device includes a plurality of thyristor cells and a freewheeling diode are integrated in a semiconductor wafer. The freewheeling diode includes a diode anode layer, a diode anode electrode, a diode cathode layer, and a diode cathode electrode. The diode cathode layer includes diode cathode layer segments, each of which is stripe-shaped and arranged within a corresponding stripe-shaped first diode anode layer segment such that a longitudinal main axis of each diode cathode layer segment extends along the longitudinal main axis of the corresponding one of the first diode anode layer segments.
    Type: Application
    Filed: February 3, 2021
    Publication date: February 16, 2023
    Inventors: Tobias Wikstroem, Umamaheswara Vemulapati
  • Publication number: 20220393023
    Abstract: An insulated gate bipolar transistor includes a source electrode, a collector electrode, a source layer, a base layer, a drift layer and a collector layer. Trench gate electrodes extend through the base layer into the drift layer. A channel is located between the source layer, the base layer and the drift layer. A trench Schottky electrode is adjacent to one of the trench gate electrodes and includes an electrically conductive Schottky layer arranged lateral to the base layer and extends through the base layer into the drift layer. The Schottky layer is electrically connected to the source electrode. Collection areas are located in the drift layer at a respective trench gate electrode bottom of the trench gate electrodes or of the trench Schottky electrode. The Schottky layer forms a Schottky contact to the collection area at a contact area.
    Type: Application
    Filed: November 6, 2020
    Publication date: December 8, 2022
    Inventors: Florin Udrea, Marina Antoniou, Neophytos Lophitis, Chiara Corvasce, Luca De-Michielis, Umamaheswara Vemulapati, Uwe Badstuebner, Munaf Rahimo
  • Publication number: 20220181473
    Abstract: A power diode comprises a plurality of diode cells (10). Each diode cell (10) comprises a first conductivity type first anode layer (40), a first conductivity type second anode layer (45) having a lower doping concentration than the first anode layer (40) and being separated from an anode electrode layer (20) by the first anode layer (40), a second conductivity type drift layer (50) forming a pn-junction with the second anode layer (45), a second conductivity type cathode layer (60) being in direct contact with the cathode electrode layer (60), and a cathode-side segmentation layer (67) being in direct contact with the cathode electrode layer (30). A material of the cathode-side segmentation layer (67) is a first conductivity type semiconductor, wherein an integrated doping content of the cathode-side, which is integrated along a direction perpendicular to the second main side (102), is below 2·1013 cm?2, or a material of the cathode-side segmentation layer (67) is an insulating material.
    Type: Application
    Filed: April 1, 2020
    Publication date: June 9, 2022
    Inventors: Tobias Wikstroem, Umamaheswara Vemulapati, Thomas Stiasny
  • Patent number: 11107740
    Abstract: A power semiconductor module including at least one power semiconductor chip providing a power electronics switch; and a semiconductor wafer, to which the at least one power semiconductor chip is bonded; wherein the semiconductor wafer is doped, such that it includes a field blocking region and an electrically conducting region on the field blocking region, to which electrically conducting region the at least one power semiconductor chip is bonded.
    Type: Grant
    Filed: August 2, 2017
    Date of Patent: August 31, 2021
    Assignee: ABB Power Grids Switzerland AG
    Inventors: Jürgen Schuderer, Umamaheswara Vemulapati, Marco Bellini, Jan Vobecky
  • Patent number: 11056582
    Abstract: A bidirectional thyristor device includes a semiconductor wafer with a number of layers forming pn junctions. A first main electrode and a first gate electrode are arranged on a first main side of the wafer. A second main electrode and a second gate electrode are arranged on a second main side of the wafer. First emitter shorts penetrate through a first semiconductor layer and second emitter shorts penetrate through a fifth semiconductor layer. In an orthogonal projection onto a plane parallel to the first main side, a first area occupied by the first semiconductor layer and the first emitter shorts overlaps in an overlapping area with a second area occupied by the fifth semiconductor layer and the second emitter shorts. The overlapping area, in which the first area overlaps with the second area, encompasses at least 50% of a total wafer area occupied by the semiconductor wafer.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: July 6, 2021
    Assignee: ABB Power Grids Switzerland AG
    Inventors: Jan Vobecky, Umamaheswara Vemulapati, Munaf Rahimo
  • Patent number: 11043943
    Abstract: A semiconductor module comprises reverse conducting IGBT connected in parallel with a wide bandgap MOSFET, wherein each of the reverse conducting IGBT and the wide bandgap MOSFET comprises an internal anti-parallel diode. A method for operating a semiconductor module with the method including the steps of: determining a reverse conduction start time, in which the semiconductor module starts to conduct a current in a reverse direction, which reverse direction is a conducting direction of the internal anti-parallel diodes; applying a positive gate signal to the wide bandgap MOSFET after the reverse conduction start time; determining a reverse conduction end time based on the reverse conduction start time, in which the semiconductor module ends to conduct a current in the reverse direction; and applying a reduced gate signal to the wide bandgap MOSFET a blanking time interval before the reverse conduction end time, the reduced gate signal being adapted for switching the wide bandgap MOSFET into a blocking state.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: June 22, 2021
    Assignee: ABB Power Grids Switzerland AG
    Inventors: Umamaheswara Vemulapati, Ulrich Schlapbach, Munaf Rahimo
  • Patent number: 11031473
    Abstract: A power semiconductor device includes a semiconductor wafer having a first main side surface and a second main side surface. The semiconductor wafer includes a first semiconductor layer having a first conductivity type and a plurality of columnar or plate-shaped first semiconductor regions extending in the first semiconductor layer between the first main side surface and the second main side surface in a vertical direction perpendicular to the first main side surface and the second main side surface. The first semiconductor regions have a second conductivity type, which is different from the first conductivity type. Therein, the first semiconductor is a layer of hexagonal silicon carbide. The first semiconductor regions are regions of 3C polytype silicon carbide.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: June 8, 2021
    Assignee: ABB POWER GRIDS SWITZERLAND AG
    Inventors: Friedhelm Bauer, Lars Knoll, Marco Bellini, Renato Minamisawa, Umamaheswara Vemulapati
  • Publication number: 20200411674
    Abstract: A bidirectional thyristor device includes a semiconductor wafer with a number of layers forming pn junctions. A first main electrode and a first gate electrode are arranged on a first main side of the wafer. A second main electrode and a second gate electrode are arranged on a second main side of the wafer. First emitter shorts penetrate through a first semiconductor layer and second emitter shorts penetrate through a fifth semiconductor layer. In an orthogonal projection onto a plane parallel to the first main side, a first area occupied by the first semiconductor layer and the first emitter shorts overlaps in an overlapping area with a second area occupied by the fifth semiconductor layer and the second emitter shorts. The overlapping area, in which the first area overlaps with the second area, encompasses at least 50% of a total wafer area occupied by the semiconductor wafer.
    Type: Application
    Filed: February 13, 2019
    Publication date: December 31, 2020
    Inventors: Jan Vobecky, Umamaheswara Vemulapati, Munaf Rahimo
  • Patent number: 10629677
    Abstract: A high power semiconductor device with a floating field ring termination includes a wafer, wherein a plurality of floating field rings is formed in an edge termination region adjacent to a first main side surface of the wafer. At least in the termination region a drift layer, in which the floating field rings are formed, includes a surface layer and a bulk layer wherein the surface layer is formed adjacent to the first main side surface to separate the bulk layer from the first main side surface and has an average doping concentration which is less than 50% of the minimum doping concentration of the bulk layer. The drift layer includes a plurality of enhanced doping regions, wherein each one of the enhanced doping regions is in direct contact with a corresponding one of the floating field rings at least on a lateral side of this floating field ring, which faces towards the active region.
    Type: Grant
    Filed: May 29, 2018
    Date of Patent: April 21, 2020
    Assignee: ABB Schweiz AG
    Inventors: Friedhelm Bauer, Umamaheswara Vemulapati
  • Patent number: 10566463
    Abstract: In a power semiconductor device of the application a total number n of floating field rings (10_1 to 10_n) formed in a termination area is at least 10. For any integer i in a range from i=2 to i=n, a ring-to-ring separation di,i?i between an i-th floating field ring and a directly adjacent (i?1)-th floating field ring, when counting the floating field rings (10_1 to 10_n) along a straight line starting from a main pn-junction and extending in a lateral direction away from the main pn-junction, is given by the following formula: di,i?1=d1,0+?j=1j=i?1 ?j for i=2 to n, wherein d1,0 is a distance between the innermost floating field ring (10_1) closest to the main pn-junction and the main pn-junction, and wherein: ?zone1?0.05·?zone2<?j<?zone1+0.05·?zone2 for j=1 to I?2, 2·?zone2<|?j|<10·?zone2. for j=I?1, 0.95·?zone2<?j<1.05·?zone2 for j=I to n?1, ?zone2>0.1 ?m, and ??zone2/2<?zone1<?zone2/2, wherein I is an integer, for which 3?l?n/2.
    Type: Grant
    Filed: May 23, 2019
    Date of Patent: February 18, 2020
    Assignee: ABB Schweiz
    Inventors: Friedhelm Bauer, Umamaheswara Vemulapati, Marco Bellini
  • Publication number: 20200006496
    Abstract: A power semiconductor device includes a semiconductor wafer having a first main side surface and a second main side surface. The semiconductor wafer includes a first semiconductor layer having a first conductivity type and a plurality of columnar or plate-shaped first semiconductor regions extending in the first semiconductor layer between the first main side surface and the second main side surface in a vertical direction perpendicular to the first main side surface and the second main side surface. The first semiconductor regions have a second conductivity type, which is different from the first conductivity type. Therein, the first semiconductor is a layer of hexagonal silicon carbide. The first semiconductor regions are regions of 3C polytype silicon carbide.
    Type: Application
    Filed: September 3, 2019
    Publication date: January 2, 2020
    Inventors: Friedhelm Bauer, Lars Knoll, Marco Bellini, Renato Minamisawa, Umamaheswara Vemulapati
  • Patent number: 10461157
    Abstract: The invention relates to a turn-off power semiconductor device comprising a plurality of thyristor cells, each thyristor cell comprising a cathode region; a base layer; a drift layer; an anode layer; a gate electrode which is arranged lateral to the cathode region in contact with the base layer; a cathode electrode; and an anode electrode. Interfaces between the cathode regions and the cathode electrodes as well as interfaces between the base layers and the gate electrodes of the plurality of thyristor cells are flat and coplanar.
    Type: Grant
    Filed: March 12, 2018
    Date of Patent: October 29, 2019
    Assignee: ABB Schweiz AG
    Inventors: Martin Arnold, Umamaheswara Vemulapati
  • Publication number: 20190288124
    Abstract: In a power semiconductor device of the application a total number n of floating field rings (10_1 to 10_n) formed in a termination area is at least 10. For any integer i in a range from i=2 to i=n, a ring-to-ring separation di,1?i between an i-th floating field ring and a directly adjacent (i?1)-th floating field ring, when counting the floating field rings (10_1 to 10_n) along a straight line starting from a main pn-junction and extending in a lateral direction away from the main pn-junction, is given by the following formula: di,i?1=d1,0+?j=1j=i?1 ?j for i=2 to n, wherein d1,0 is a distance between the innermost floating field ring (10_1) closest to the main pn-junction and the main pn-junction, and wherein: ?zone1?0.05·?zone2<?j<?zone1+0.05·?zone2 for j=1 to I-2, 2·?zone2<zone2<Aj<Azonel +0.05 A zone2 <|?j|<10·?zone2. for j=I?1, 0.95·?zone2<?j<1.05·?zone2 for j=I to n?1, ?zone2<0.1 ?m, and ??zone2/2 <?zone1<?zone2/2 , wherein I is an integer, for which 3?l?n/2.
    Type: Application
    Filed: May 23, 2019
    Publication date: September 19, 2019
    Inventors: Friedhelm Bauer, Umamaheswara Vemulapati, Marco Bellini
  • Publication number: 20190273493
    Abstract: A semiconductor module comprises reverse conducting IGBT connected in parallel with a wide bandgap MOSFET, wherein each of the reverse conducting IGBT and the wide bandgap MOSFET comprises an internal anti-parallel diode.
    Type: Application
    Filed: May 14, 2019
    Publication date: September 5, 2019
    Inventors: Umamaheswara Vemulapati, Ulrich Schlapbach, Munaf Rahimo
  • Publication number: 20190035884
    Abstract: A high power semiconductor device with a floating field ring termination includes a wafer, wherein a plurality of floating field rings is formed in an edge termination region adjacent to a first main side surface of the wafer. At least in the termination region a drift layer, in which the floating field rings are formed, includes a surface layer and a bulk layer wherein the surface layer is formed adjacent to the first main side surface to separate the bulk layer from the first main side surface and has an average doping concentration which is less than 50% of the minimum doping concentration of the bulk layer. The drift layer includes a plurality of enhanced doping regions, wherein each one of the enhanced doping regions is in direct contact with a corresponding one of the floating field rings at least on a lateral side of this floating field ring, which faces towards the active region.
    Type: Application
    Filed: May 29, 2018
    Publication date: January 31, 2019
    Inventors: Friedhelm Bauer, Umamaheswara Vemulapati