Abstract: Systems and methods are described for the implementation of a full band cable receiver by using a combination of tuners (e.g., ultra-low power Tuners) and Analog-to-Digital Converters (ADCs) to attain the goal of digitization with reduced power and/or cost. The full-band capture cable receiver can overcome the constraints of conventional cable receiver systems and deliver multiple channels, thereby allowing operators to provide consumers with an increased number of services.

Abstract: A system and method is provided for estimating the channel in OFDM transmission with inter-carrier interference (ICI). A channel in a data subcarrier in a subchannel shared between pilot subcarriers and data subcarriers can be estimated by performing interpolation based on estimated channels in pilot subcarriers in the same OFDM symbol as the subcarrier, such as through spline interpolation. A second estimate of the channel in the subcarrier can be produced by averaging an estimate of the channel in a subcarrier in the subchannel in a previous OFDM symbol and an estimate of the channel in a subcarrier in the subchannel in a succeeding OFDM symbol. A third estimate of the channel in the subcarrier can be produced through a linear combination of the first estimate and the second estimate. The channel in data subcarriers can be estimated through a weighted sum of the channel in nearest subcarriers.

Abstract: Various embodiments describe systems and methods for calibrating gain mismatches and timing errors in and between individual ADC channels of a time-interleaved ADC. In some embodiments, a calibration signal (e.g., a DC signal) can be selectively applied to each ADC channel of a time-interleaved ADC to estimate a gain mismatch of the corresponding ADC channel. The gain mismatch can then be compensated by a gain correction circuit at the digital backend of the time-interleaved ADC. In some embodiments, timing errors between ADC channels of a time-interleaved ADC can be measured by applying a time varying signal to the ADC channels of the time-interleaved ADC. The timing errors can be calibrated by applying a feedback signal to a clock phase generator of the time-interleaved ADC.

Abstract: An example method includes extracting calibration coefficients of each stage of a pipeline analog-to-digital convertor (ADC). The calculation of the corrected digital output of the pipeline ADC can be based on the digital output of each pipeline stage and the estimated calibration coefficient of the corresponding stage. Therefore, a relaxed design of the operational amplifier and sizing of capacitors in a high speed asynchronous ADC can be achieved.

Abstract: Approaches enable multi-standard communications between wireless sensor nodes for wireless sensor networks. For example, approaches enable wireless communications between devices where each device may use a different wireless transmission protocols, via one or more multi-standard intermediate devices. The multi-standard intermediate device can include a multi-band radio frequency front-end unit that includes a first frequency digitalization pathway and a second frequency digitalization pathway, and a multi-band radio frequency back-end unit that includes a multi-band analog pathway to implement such approaches.

Abstract: A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.

Abstract: A RF tuner is described for handling RF signals in a broad frequency range and a broad power range while maintaining high linearity and tolerating high power blockers. A continuous feedback loop comprising a substantially linear LNA and a radio frequency RSSI can adjust the power of the RF signal on the RF side. On the IF side, a continuous feedback loop comprising a substantially linear, variable gain transconductor and a RSSI can adjust the power of the IF signal.

Abstract: Systems and methods are described for synchronizing a receiver to a received signal and other signal processing approaches and/or components associated with the receiver. For example, a signal (e.g., a radio frequency (RF) signal such as a broadband TV signal in UHF and VHF frequencies) can be received at a receiver. Before the signal is provided to other components of the receiver, the signal can be processed in a component of the receiver commonly known as the digital front-end, where such processing can include amongst others, various synchronization and acquisition techniques.

Abstract: A system and method are provided for calibrating the IQ-imbalance in a low-IF receiver. A Test Signal can be generated in a mirror frequency and conveyed to the receiver. The power of the signal produced in the receiver from the conveyed Test Signal can be measured. In the absence of an IQ-imbalance, the Test Signal can be completely eliminated in the receiver and the corresponding measured power of the produced signal can be minimized. Accordingly, a two dimensional algorithm is described for calibrating a receiver and correcting the IQ-imbalance by adjusting the phase and gain difference between the I and Q channels in the receiver based on the measured power of the signal produced in the receiver.

Abstract: A RF tuner is described for handling RF signals in a broad frequency range and a broad power range while maintaining high linearity and tolerating high power blockers. A continuous feedback loop comprising a substantially linear LNA and a radio frequency RSSI can adjust the power of the RF signal on the RF side. On the IF side, a continuous feedback loop comprising a substantially linear, variable gain transconductor and a RSSI can adjust the power of the IF signal.

Abstract: A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.

Abstract: A system and method are provided for calibrating the IQ-imbalance in a low-IF receiver. A Test Signal can be generated in a mirror frequency and conveyed to the receiver. The power of the signal produced in the receiver from the conveyed Test Signal can be measured. In the absence of an IQ-imbalance, the Test Signal can be completely eliminated in the receiver and the corresponding measured power of the produced signal can be minimized. Accordingly, a two dimensional algorithm is described for calibrating a receiver and correcting the IQ-imbalance by adjusting the phase and gain difference between the I and Q channels in the receiver based on the measured power of the signal produced in the receiver.

Abstract: Systems and methods are described for the implementation of a full band cable receiver by using a combination of tuners (e.g., ultra-low power Tuners) and Analog-to-Digital Converters (ADCs) to attain the goal of digitization with reduced power and/or cost. The full-band capture cable receiver can overcome the constraints of conventional cable receiver systems and deliver multiple channels, thereby allowing operators to provide consumers with an increased number of services.

Abstract: Systems and methods are described for the implementation of a full band cable receiver by using a combination of tuners (e.g., ultra-low power Tuners) and Analog-to-Digital Converters (ADCs) to attain the goal of digitization with reduced power and/or cost. The full-band capture cable receiver can overcome the constraints of conventional cable receiver systems and deliver multiple channels, thereby allowing operators to provide consumers with an increased number of services.

Abstract: A system and method is provided for estimating the channel in OFDM transmission with inter-carrier interference (ICI). A channel in a data subcarrier in a subchannel shared between pilot subcarriers and data subcarriers can be estimated by performing interpolation based on estimated channels in pilot subcarriers in the same OFDM symbol as the subcarrier, such as through spline interpolation. A second estimate of the channel in the subcarrier can be produced by averaging an estimate of the channel in a subcarrier in the subchannel in a previous OFDM symbol and an estimate of the channel in a subcarrier in the subchannel in a succeeding OFDM symbol. A third estimate of the channel in the subcarrier can be produced through a linear combination of the first estimate and the second estimate. The channel in data subcarriers can be estimated through a weighted sum of the channel in nearest subcarriers.

Abstract: A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.

Abstract: A system and method is provided for filtering and amplifying a signal where amplification can be distributed between stages of a filter and gain can be assigned throughout the filter to optimize system performance. Such a system can be implemented in the baseband section of RF receivers. VGAs can be implemented between filter stages, such as biquads, or VGAs can be incorporated in filter stages. Substantially linear VGAs comprising a parallel resistor array can be incorporated in the circuitry of the filter stages to reduce distortion. Gain can be assigned dynamically in the amplification stages to improve noise and/or linearity performance. For example, gain assignments can be implemented so that high power undesired signal components are filtered out before amplification to prevent component saturation, and low power signals are amplified before they are filtered to improve noise performance.

Abstract: An RE receiver is described comprising a common gate common source LNA with a variable resistor in the source of the common gate transistor, a variable resistor in the source of the common source transistor, and a variable resistor in the RE input. A Smart Gain Control varies the resistance in the resistors to produce linear amplification in the LNA while maintaining input matching. Further, a broad dynamic range RSSI is described that implements a feedback control loop to maintain signal power within a sensitivity range of the power detector in the RSSI.

Abstract: A system and method is provided for estimating the channel in OFDM transmission with inter-carrier interference (ICI). A channel in a data subcarrier in a subchannel shared between pilot subcarriers and data subcarriers can be estimated by performing interpolation based on estimated channels in pilot subcarriers in the same OFDM symbol as the subcarrier, such as through spline interpolation. A second estimate of the channel in the subcarrier can be produced by averaging an estimate of the channel in a subcarrier in the subchannel in a previous OFDM symbol and an estimate of the channel in a subcarrier in the subchannel in a succeeding OFDM symbol. A third estimate of the channel in the subcarrier can be produced through a linear combination of the first estimate and the second estimate. The channel in data subcarriers can be estimated through a weighted sum of the channel in nearest subcarriers.

Abstract: An RF receiver is described comprising a common gate common source LNA with a variable resistor in the source of the common gate transistor, a variable resistor in the source of the common source transistor, and a variable resistor in the RF input. A Smart Gain Control varies the resistance in the resistors to produce linear amplification in the LNA while maintaining input matching. Further, a broad dynamic range RSSI is described that implements a feedback control loop to maintain signal power within a sensitivity range of the power detector in the RSSI.