Patents by Inventor Valuri R. M. Rao

Valuri R. M. Rao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Substrate interconnect for power distribution on integrated circuits
    Patent number: 6495454
    Abstract: A backside interconnect structure is used to deliver power through the substrate to the front side of an integrated circuit. One or more power planes are formed on the backside of the substrate and coupled to power nodes on the front side by deep vias in the substrate. In a specific embodiment of the invention, power planes are coupled through the substrate to front side metal lines, well taps and external connection points. Placing power planes on the opposite side of the substrate from the signal interconnects allows the use of low dielectric constant materials between signal lines, while using high dielectric constant materials between power planes thus increasing decoupling capacitance without increasing parasitic capacitance between signal lines.
    Type: Grant
    Filed: September 12, 2001
    Date of Patent: December 17, 2002
    Assignee: Intel Corporation
    Inventors: Richard H. Livengood, Paul Winer, Valuri R. M. Rao
  • Substrate interconnect for power distribution on integrated circuits
    Patent number: 6355950
    Abstract: A backside interconnect structure is used to deliver power through the substrate to the front side of an integrated circuit. One or more power planes are formed on the backside of the substrate and coupled to power nodes on the front side by deep vias in the substrate. In a specific embodiment of the invention, power planes are coupled through the substrate to front side metal lines, well taps and external connection points. Placing power planes on the opposite side of the substrate from the signal interconnects allows the use of low dielectric constant materials between signal lines, while using high dielectric constant materials between power planes thus increasing decoupling capacitance without increasing parasitic capacitance between signal lines.
    Type: Grant
    Filed: September 23, 1998
    Date of Patent: March 12, 2002
    Assignee: Intel Corporation
    Inventors: Richard H. Livengood, Paul Winer, Valuri R. M. Rao
  • Substrate interconnect for power distribution on integrated circuits
    Publication number: 20020020862
    Abstract: A backside interconnect structure is used to deliver power through the substrate to the front side of an integrated circuit. One or more power planes are formed on the backside of the substrate and coupled to power nodes on the front side by deep vias in the substrate. In a specific embodiment of the invention, power planes are coupled through the substrate to front side metal lines, well taps and external connection points. Placing power planes on the opposite side of the substrate from the signal interconnects allows the use of low dielectric constant materials between signal lines, while using high dielectric constant materials between power planes thus increasing decoupling capacitance without increasing parasitic capacitance between signal lines.
    Type: Application
    Filed: September 12, 2001
    Publication date: February 21, 2002
    Inventors: Richard H. Livengood, Paul Winer, Valuri R.M. Rao