Abstract: A method of selective formation of silicide on a semiconductor wafer, wherein the metal layer is deposited over the entire wafer prior to application of the SiProt mask such that any etching of the mask does not cause any surface deterioration of the silicon wafer.

Abstract: A method of selective formation of suicide on a semiconductor wafer, wherein the metal layer (12) is deposited over the entire wafer prior to application of the SiProt mask (10, 16, 22) such that any etching of the mask (10, 16, 22) does not cause any surface deterioration of the silicon wafer.

Abstract: An embedded DRAM memory device comprising one or more cylinder type cell capacitors. Contact pillars (25) are provided in a PMD layer (27) on a substrate (10), and the lower (or storage mode) electrodes of the capacitors are formed by depositing an end stop layer (40) over the contact pillars (25) and then forming second contact trenches (62) in an oxide layer (60) provided over the PMD layer (27). The second contact trenches (62) are aligned with respective contact pillars (25) and filled with, for example, a barrier material plus tungsten. The oxide layer (60) is selectively etched at the location of the contact trench (62) to the end stop layer (40). The end stop layer etched and the PMD layer (27) is subsequently etched along a portion of the length of the first contact pillar (25) to form a trench (62). Finally, the tungsten in the second contact trench (62) is selectively etched through the barrier layer, so as to leave a barrier layer (64) e.