Patents by Inventor Vidyut Mukund Naware

Vidyut Mukund Naware has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230171235
    Abstract: Techniques are disclosed in which an edge user computing device pre-processes a stream of user data prior to using the stream of data to train a machine learning model at the edge device. The edge device receives the stream of user data, where the stream of data includes a first set of characteristics associated with the edge device and a second set of characteristics associated with a plurality of user requests received from a user of the edge device. The edge device repeatedly generates, using the stream of data, sets of pre-processed user data by performing pre-processing techniques on characteristics included in the stream of data. The edge device repeatedly trains, using the sets of pre-processed data, a baseline model to generate a device-trained model, where the baseline model is trained at the edge device without providing user data included in the stream of data to a server computer system.
    Type: Application
    Filed: December 1, 2021
    Publication date: June 1, 2023
    Inventors: Abhishek Chhibber, Darshankumar Bhadrasinh Desai, Michael Charles Todasco, Vidyut Mukund Naware, Nitin S. Sharma
  • Publication number: 20230041015
    Abstract: Techniques are disclosed in which a computer system receives a transaction request and uses a federated machine learning model to analyze the transaction request. A server computer system may generate a federated machine learning model and distribute portions of the federated machine learning models to other components of the computer system including a user device and/or edge servers. In various embodiments, various components of the computer system apply transaction request evaluation factors to the portions of the federated machine learning model to generate scores. The server computer system uses the scores to determine a response to the transaction request.
    Type: Application
    Filed: August 5, 2021
    Publication date: February 9, 2023
    Inventors: Abhishek Chhibber, Darshankumar Bhadrasinh Desai, Michael Charles Todasco, Vidyut Mukund Naware, Nitin S. Sharma
  • Publication number: 20230040721
    Abstract: Techniques are disclosed in which a computer system receives a transaction request and uses a federated machine learning model to analyze the transaction request. A server computer system may generate a federated machine learning model and distribute portions of the federated machine learning models to other components of the computer system including a user device and/or edge servers. In various embodiments, various components of the computer system apply transaction request evaluation factors to the portions of the federated machine learning model to generate scores. The server computer system uses the scores to determine a response to the transaction request.
    Type: Application
    Filed: August 5, 2021
    Publication date: February 9, 2023
    Inventors: Abhishek Chhibber, Darshankumar Bhadrasinh Desai, Michael Charles Todasco, Vidyut Mukund Naware, Nitin S. Sharma
  • Publication number: 20220414529
    Abstract: Techniques are disclosed in which a computer system receives, from a plurality of user computing devices, a plurality of device-trained models and obfuscated sets of user data stored at the plurality of user computing devices, where the device-trained models are trained at respective ones of the plurality of user computing devices using respective sets of user data prior to obfuscation. In some embodiments, the server computer system determines similarity scores for the plurality of device-trained models, wherein the similarity scores are determined based on a performance of the device-trained models. In some embodiments, the server computer system identifies, based on the similarity scores, at least one of the plurality of device-trained models as a low-performance model. In some embodiments, the server computer system transmits, to the user computing device corresponding to the low-performance model, an updated model.
    Type: Application
    Filed: June 24, 2021
    Publication date: December 29, 2022
    Inventors: Abhishek Chhibber, Darshankumar Bhadrasinh Desai, Michael Charles Todasco, Vidyut Mukund Naware, Nitin S. Sharma
  • Publication number: 20220414528
    Abstract: Techniques are disclosed in which a computing device repeatedly trains, using a stream of user data received at the computing device, a baseline model to generate a device-trained model, wherein the baseline model is trained at the computing device without providing user data included in the stream to a server computer system. In some embodiments, the computing device inputs, to the device-trained model, a set of characteristics associated with a user request received from a user of the computing device, wherein the device-trained model outputs a score for the user request. In some embodiments, the computing device transmits, to the server computer system, the score for the user request, wherein the transmitting includes requesting a decision for the user request. In some embodiments, the computing device performs an action associated with the user request in response to receiving a decision for the user request from the server computer system.
    Type: Application
    Filed: June 24, 2021
    Publication date: December 29, 2022
    Inventors: Abhishek Chhibber, Darshankumar Bhadrasinh Desai, Michael Charles Todasco, Vidyut Mukund Naware, Nitin S. Sharma
  • Patent number: 9236884
    Abstract: A method, an apparatus, and a computer program product for communication within a wireless terminal. The method can be implemented using dedicated logic and managed and controlled by state machines and/or sequencers. Data received or provided in a memory of a first integrated circuit of a terminal is encoded and transmitted in a data packet to a second integrated circuit. A header identifying the data type and providing a destination is included in the data packet. The destination may be identified as a memory address memory of the second integrated circuit that is mapped to a corresponding memory address of the first integrated circuit at which the data is received. In an aspect, the apparatus receives a header, detects an error in the received header, determines a failure to identify a packet boundary when the error is detected, and performs a search operation to identify the packet boundary.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: January 12, 2016
    Assignee: QUALCOMM Incorporated
    Inventors: Hans Georg Gruber, Subra Dravida, Parvathanathan Subrahmanya, Vidyut Mukund Naware, Helena Deirdre O'Shea, Garret Webster Shih, Jason Thurston