Patents by Inventor Vinay Prabhakar

Vinay Prabhakar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11558187
    Abstract: An apparatus and method for joining an Internet of Things (IoT) network are provided, the apparatus including a communicator configured to receive, from an electronic device, an encrypted auto-onboard configuration data associated with the IoT network, a sensor configured to detect a user command, and at least one processor configured to generate a decryption key based on features extracted from the user command, decrypt the encrypted auto-onboard configuration data using the decryption key, and join the IoT network.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: January 17, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Vinay Kumar, Vijaya Kumar Tukka, Deepraj Prabhakar Patkar, Sravana Kumar Karivedala, Ashok Babu Channa, Sujay M, Rakesh Kumar
  • Patent number: 11539526
    Abstract: Provided is an apparatus for managing user authentication in a blockchain network and the apparatus comprises a processor configured to transmit, to a server, a request for a snapshot identifier (ID) with user data comprising at least one of one-time password, biometric data, context data, routine data, or device metadata, receive the snapshot ID generated based on the user data, initiate a transaction with the snapshot ID in the blockchain network comprising a blockchain server which authenticates the snapshot ID, and output blockchain transaction data associated with the transaction based on the authentication of the snapshot ID.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: December 27, 2022
    Inventors: Ashok Babu Channa, Abhishek Sharma, Amogha D Shanbhag, Vinay Kumar, Vijaya Kumar Tukka, Deepraj Prabhakar Patkar, Sravana Kumar Karivedala
  • Patent number: 11515176
    Abstract: Exemplary substrate processing systems may include chamber body defining a transfer region. The systems may include a lid plate seated on the chamber body. The lid plate may define a first plurality of apertures through the lid plate and a second plurality of apertures through the lid plate. The systems may include a plurality of lid stacks equal to a number of apertures of the first plurality of apertures defined through the lid plate. Each lid stack of the plurality of lid stacks may include a choke plate seated on the lid plate along a first surface of the choke plate. The choke plate may define a first aperture axially aligned with an associated aperture of the first plurality of apertures. The choke plate may define a second aperture axially aligned with an associated aperture of the second plurality of apertures.
    Type: Grant
    Filed: April 14, 2020
    Date of Patent: November 29, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Siva Chandrasekar, Satish Radhakrishnan, Rajath Kumar Lakkenahalli Hiriyannaiah, Viren Kalsekar, Vinay Prabhakar
  • Patent number: 11515129
    Abstract: An example semiconductor processing system may include a chamber body having sidewalls and a base. The processing system may also include a substrate support extending through the base of the chamber body. The substrate support may include a support platen configured to support a semiconductor substrate, and a shaft coupled with the support platen. The processing system may further include a plate coupled with the shaft of the substrate support. The plate may have an emissivity greater than 0.5. In some embodiments, the plate may include a radiation shied disposed proximate the support platen. In some embodiments, the plate may include a pumping plate disposed proximate the base of the chamber body. In some embodiments, the emissivity of the plate may range between about 0.5 and about 0.95.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: November 29, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Elizabeth Neville, Satish Radhakrishnan, Kartik Shah, Vinay Prabhakar, Venkata Sharat Chandra Parimi, Sungwon Ha
  • Publication number: 20220322183
    Abstract: Communications are transferred from being including a connection between User Equipment (UE) and a source node to including a connection between the UE and a target node, without requiring use of an X2 gateway. The method includes (1) ceasing to send messages from a source node, along the communications path, to User Equipment (UE), (2) then waiting a period of time, and (3) after the waiting, beginning to send messages along a new communication path from the target to the UE. The period of time is chosen to be adequate for flushing messages from a queue associated with the first communication path.
    Type: Application
    Filed: March 29, 2022
    Publication date: October 6, 2022
    Inventors: Srinivasan Balasubramanian, Vinay Anneboina, Mehmet Yavuz, Puneet Prabhakar Shetty
  • Publication number: 20220122823
    Abstract: Exemplary processing methods may include forming a plasma of a cleaning precursor in a remote region of a semiconductor processing chamber. The methods may include flowing plasma effluents of the cleaning precursor into a processing region of the semiconductor processing chamber. The methods may include contacting a substrate support with the plasma effluents for a first period of time. The methods may include lowering the substrate support from a first position to a second position while continuing to flow plasma effluents of the cleaning precursor. The methods may include cleaning the processing region of the semiconductor processing chamber for a second period of time.
    Type: Application
    Filed: October 15, 2020
    Publication date: April 21, 2022
    Applicant: Applied Materials, Inc.
    Inventors: Fei Wu, Abdul Aziz Khaja, Sungwon Ha, Ganesh Balasubramanian, Vinay Prabhakar
  • Publication number: 20210320017
    Abstract: Exemplary substrate processing systems may include a plurality of processing regions. The systems may include a transfer region housing defining a transfer region fluidly coupled with the plurality of processing regions. The systems may include a plurality of substrate supports, and each substrate support of the plurality of substrate supports may be vertically translatable between the transfer region and an associated processing region of the plurality of processing regions. The systems may include a transfer apparatus including a rotatable shaft extending through the transfer region housing. The transfer apparatus may include an end effector coupled with the rotatable shaft. The end effector may include a central hub defining a central aperture fluidly coupled with a purge source. The end effector may also include a plurality of arms having a number of arms equal to a number of substrate supports of the plurality of substrate supports.
    Type: Application
    Filed: April 9, 2020
    Publication date: October 14, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Nitin Pathak, Vinay Prabhakar, Badri N. Ramamurthi, Viren Kalsekar, Tuan A. Nguyen, Juan Carlos Rocha-Alvarez
  • Publication number: 20210320018
    Abstract: Exemplary substrate processing systems may include chamber body defining a transfer region. The systems may include a lid plate seated on the chamber body. The lid plate may define a first plurality of apertures through the lid plate and a second plurality of apertures through the lid plate. The systems may include a plurality of lid stacks equal to a number of apertures of the first plurality of apertures defined through the lid plate. Each lid stack of the plurality of lid stacks may include a choke plate seated on the lid plate along a first surface of the choke plate. The choke plate may define a first aperture axially aligned with an associated aperture of the first plurality of apertures. The choke plate may define a second aperture axially aligned with an associated aperture of the second plurality of apertures.
    Type: Application
    Filed: April 14, 2020
    Publication date: October 14, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Siva Chandrasekar, Satish Radhakrishnan, Rajath Kumar Lakkenahalli Hiriyannaiah, Viren Kalsekar, Vinay Prabhakar
  • Publication number: 20210202218
    Abstract: Exemplary semiconductor processing chambers may include a chamber body including sidewalls and a base. The chambers may include a substrate support extending through the base of the chamber body. The substrate support may include a support platen configured to support a semiconductor substrate. The substrate support may include a shaft coupled with the support platen. The substrate support may include a shield coupled with the shaft of the substrate support. The shield may include a plurality of apertures defined through the shield. The substrate support may include a block seated in an aperture of the shield.
    Type: Application
    Filed: December 27, 2019
    Publication date: July 1, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Venkata Sharat Chandra Parimi, Satish Radhakrishnan, Xiaoquan Min, Sarah Michelle Bobek, Sungwon Ha, Prashant Kumar Kulshreshtha, Vinay Prabhakar
  • Publication number: 20210166921
    Abstract: An example semiconductor processing system may include a chamber body having sidewalls and a base. The processing system may also include a substrate support extending through the base of the chamber body. The substrate support may include a support platen configured to support a semiconductor substrate, and a shaft coupled with the support platen. The processing system may further include a plate coupled with the shaft of the substrate support. The plate may have an emissivity greater than 0.5. In some embodiments, the plate may include a radiation shied disposed proximate the support platen. In some embodiments, the plate may include a pumping plate disposed proximate the base of the chamber body. In some embodiments, the emissivity of the plate may range between about 0.5 and about 0.95.
    Type: Application
    Filed: December 3, 2019
    Publication date: June 3, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Elizabeth Neville, Satish Radhakrishnan, Kartik Shah, Vinay Prabhakar, Venkata Sharat Chandra Parimi, Sungwon Ha
  • Publication number: 20210035781
    Abstract: A processing chamber may include a gas distribution member, a metal ring member below the gas distribution member, and an isolating assembly coupled with the metal ring member and isolating the metal ring member from the gas distribution member. The isolating assembly may include an outer isolating member coupled with the metal ring member. The outer isolating member may at least in part define a chamber wall. The isolating assembly may further include an inner isolating member coupled with the outer isolating member. The inner isolating member may be disposed radially inward from the metal ring member about an central axis of the processing chamber. The inner isolating member may define a plurality of openings configured to provide fluid access into a radial gap between the metal ring member and the inner isolating member.
    Type: Application
    Filed: July 22, 2020
    Publication date: February 4, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Vishwas Kumar Pandey, Vinay Prabhakar, Bushra Afzal, Badri Ramamurthi, Juan C. Rocha
  • Publication number: 20210025056
    Abstract: Embodiments of the disclosure relate to an improved electrostatic chuck for use in a processing chamber to fabricate semiconductor devices. In one embodiment, a processing chamber includes a chamber body having a processing volume defined therein and an electrostatic chuck disposed within the processing volume. The electrostatic chuck includes a support surface with a plurality of mesas located thereon, one or more electrodes disposed within the electrostatic chuck, and a seasoning layer deposited on the support surface over the plurality of mesas. The support surface is made from an aluminum containing material. The one or more electrodes are configured to form electrostatic charges to electrostatically secure a substrate to the support surface. The seasoning layer is configured to provide cushioning support to the substrate when the substrate is electrostatically secured to the support surface.
    Type: Application
    Filed: October 8, 2018
    Publication date: January 28, 2021
    Inventors: Prashant Kumar KULSHRESHTHA, Zheng John YE, Kwangduk Douglas LEE, Dong Hyung LEE, Vinay PRABHAKAR, Juan Carlos ROCHA-ALVAREZ, Xiaoquan MIN
  • Publication number: 20210013069
    Abstract: Exemplary substrate processing systems may include a chamber body defining a transfer region. The systems may include a first lid plate seated on the chamber body along a first surface of the first lid plate and defining a plurality of apertures through the plate. The first lid plate may also define a recessed ledge about each aperture. The systems may include a plurality of lid stacks equal to a number of apertures of the plurality of apertures. Each lid stack may be seated on the first lid plate on a separate recessed ledge of the first lid plate. The plurality of lid stacks may at least partially define a plurality of processing regions vertically offset from the transfer region. The systems may also include a second lid plate coupled with the plurality of lid stacks.
    Type: Application
    Filed: July 7, 2020
    Publication date: January 14, 2021
    Applicant: Applied Materials, Inc.
    Inventors: Viren Kalsekar, Vinay Prabhakar
  • Patent number: 10629427
    Abstract: Methods for processing a substrate, such as bevel etch processing, are provided. In one embodiment, a method includes placing a substrate on a cover plate inside of a processing chamber, where the substrate has a center and a bevel edge and contains a dielectric layer thereon, the processing chamber contains a mask disposed above the substrate and an edge ring disposed under the substrate, the edge ring has an annular body, and the cover plate is disposed on a support assembly. The method further includes heating the substrate with a heater attached to the support assembly, raising the edge ring to contact the mask, flowing a process gas containing an etchant along an outer surface of the mask and to the bevel edge, where the process gas is ignited to produce a plasma, and exposing an upper surface of the substrate at the bevel edge to the process gas.
    Type: Grant
    Filed: March 13, 2019
    Date of Patent: April 21, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Zonghui Su, Vinay Prabhakar, Abdul Aziz Khaja, Jeongmin Lee
  • Patent number: 10599043
    Abstract: Implementations described herein generally relate to methods for leveling a component above a substrate. In one implementation, a test substrate is placed on a substrate support inside of a processing chamber. A component, such as a mask, is located above the substrate. The component is lowered to a position so that the component and the substrate are in contact. The component is then lifted and the particle distribution on the test substrate is reviewed. Based on the particle distribution, the component may be adjusted. A new test substrate is placed on the substrate support inside of the processing chamber, and the component is lowered to a position so that the component and the new test substrate are in contact. The particle distribution on the new test substrate is reviewed. The process may be repeated until a uniform particle distribution is shown on a test substrate.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: March 24, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Hiroyuki Ogiso, Jianhua Zhou, Zonghui Su, Juan Carlos Rocha-Alvarez, Jeongmin Lee, Karthik Thimmavajjula Narasimha, Rick Gilbert, Sang Heon Park, Abdul Aziz Khaja, Vinay Prabhakar
  • Patent number: 10446430
    Abstract: A chuck for wafer processing that counters the deleterious effects of thermal expansion of the wafer. Also, a combination of chuck and shadow mask arrangement that maintains relative alignment between openings in the mask and the wafer in spite of thermal expansion of the wafer. A method for fabricating a solar cell by ion implant, while maintaining relative alignment of the implanted features during thermal expansion of the wafer.
    Type: Grant
    Filed: January 19, 2017
    Date of Patent: October 15, 2019
    Assignee: INTEVAC, INC.
    Inventors: Terry Bluck, Babak Adibi, Vinay Prabhakar, William Eugene Runstadler, Jr.
  • Publication number: 20190214249
    Abstract: Methods for processing a substrate, such as bevel etch processing, are provided. In one embodiment, a method includes placing a substrate on a cover plate inside of a processing chamber, where the substrate has a center and a bevel edge and contains a dielectric layer thereon, the processing chamber contains a mask disposed above the substrate and an edge ring disposed under the substrate, the edge ring has an annular body, and the cover plate is disposed on a support assembly. The method further includes heating the substrate with a heater attached to the support assembly, raising the edge ring to contact the mask, flowing a process gas containing an etchant along an outer surface of the mask and to the bevel edge, where the process gas is ignited to produce a plasma, and exposing an upper surface of the substrate at the bevel edge to the process gas.
    Type: Application
    Filed: March 13, 2019
    Publication date: July 11, 2019
    Inventors: Zonghui SU, Vinay PRABHAKAR, Abdul Aziz KHAJA, Jeongmin LEE
  • Patent number: 10276364
    Abstract: Implementations described herein generally relate to methods and apparatus for processing a substrate. More particularly, implementations described herein relate to methods and an apparatus for bevel etch processing. In one embodiment, a method of cleaning a bevel edge of a semiconductor substrate is provided. The method includes placing a substrate on a cover plate inside of a processing chamber, the substrate having a deposition layer, which includes a center, and a bevel edge. A mask is placed over the substrate. The edge ring is disposed around/under the substrate. The method also includes flowing a process gas mixture adjacent the bevel edge, and flowing a purge gas through a first hole, a second hole, and a third hole of the mask in the center of the substrate adjacent a top of the substrate.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: April 30, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Zonghui Su, Vinay Prabhakar, Abdul Aziz Khaja, Jeongmin Lee
  • Publication number: 20180323062
    Abstract: Implementations described herein generally relate to methods and apparatus for processing a substrate. More particularly, implementations described herein relate to methods and an apparatus for bevel etch processing. In one embodiment, a method of cleaning a bevel edge of a semiconductor substrate is provided. The method includes placing a substrate on a cover plate inside of a processing chamber, the substrate having a deposition layer, which includes a center, and a bevel edge. A mask is placed over the substrate. The edge ring is disposed around/under the substrate. The method also includes flowing a process gas mixture adjacent the bevel edge, and flowing a purge gas through a first hole, a second hole, and a third hole of the mask in the center of the substrate adjacent a top of the substrate.
    Type: Application
    Filed: July 19, 2017
    Publication date: November 8, 2018
    Inventors: Zonghui SU, Vinay PRABHAKAR, Abdul Aziz KHAJA, Jeongmin LEE
  • Publication number: 20180046088
    Abstract: Implementations described herein generally relate to methods for leveling a component above a substrate. In one implementation, a test substrate is placed on a substrate support inside of a processing chamber. A component, such as a mask, is located above the substrate. The component is lowered to a position so that the component and the substrate are in contact. The component is then lifted and the particle distribution on the test substrate is reviewed. Based on the particle distribution, the component may be adjusted. A new test substrate is placed on the substrate support inside of the processing chamber, and the component is lowered to a position so that the component and the new test substrate are in contact. The particle distribution on the new test substrate is reviewed. The process may be repeated until a uniform particle distribution is shown on a test substrate.
    Type: Application
    Filed: August 11, 2017
    Publication date: February 15, 2018
    Inventors: Hiroyuki OGISO, Jianhua ZHOU, Zonghui SU, Juan Carlos ROCHA-ALVAREZ, Jeongmin LEE, Karthik Thimmavajjula NARASIMHA, Rick GILBERT, Sang Heon PARK, Abdul Aziz KHAJA, Vinay PRABHAKAR