Patents by Inventor VINCENT DEMAIORIBUS

VINCENT DEMAIORIBUS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180323105
    Abstract: Improved methods and apparatuses for singulating integrated circuit (IC) dies that reduce or eliminate die collisions and work well with very small dies. Embodiments simultaneously separate dies in two dimensions by utilizing a break and expansion system that avoids die collisions by maintaining IC die separation after singulation. Singulation is achieved by placing the joined dies of the wafer substrate on a dicing tape, scoring the wafer substrate between the joined dies, and imposing a bending action by pressing a curved surface against the scored wafer substrate, which also expands the wafer substrate by stretching the dicing tape. After breaking, an inner expansion grip ring is pressed into an outer expansion grip ring in a nested configuration so as to maintain the stretched state of the dicing tape after the curved surface is fully removed, thereby maintaining the dicing tape in tension and the singulated die in spaced apart relation.
    Type: Application
    Filed: April 19, 2018
    Publication date: November 8, 2018
    Inventors: Vincent DeMaioribus, John James
  • Publication number: 20180233410
    Abstract: Wafer dicing methods that simplify the singulation process for certain types of integrated circuit (IC) wafer substrates that improve device reliability and die strength, reduce the width of the cutting kerf, reduce cost, and improve yield. A first method includes making ablative scribing cuts on the front side of a wafer substrate along cutting streets around the perimeter of IC dies, followed by stealth laser dicing through the backside of the wafer substrate and in substantial alignment with the ablative scribing cuts. A second method includes making stealth laser dicing through the backside of the wafer substrate and in substantial alignment with cutting streets around the perimeter of IC dies, followed by ablative scribing cuts on the front side of a wafer substrate along the cutting streets.
    Type: Application
    Filed: February 14, 2017
    Publication date: August 16, 2018
    Inventors: JOHN JAMES, SERGEI VORONOV, NIRMAL SHARMA, KIRBY KOETZ, VINCENT DEMAIORIBUS, DOUGLAS A. HAWKS