Patents by Inventor Vinod K. Sangwan

Vinod K. Sangwan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10784848
    Abstract: Van der Waals heterojunctions are extended to semiconducting p-type single-walled carbon nanotube (s-SWCNT) and n-type film that can be solution-processed with high spatial uniformity at the wafer scale. The resulting large-area, low-voltage p-n heterojunctions can exhibit anti-ambipolar transfer characteristics with high on/off ratios. The charge transport can be efficiently utilized in analog circuits such as frequency doublers and keying circuits that are widely used, for example, in telecommunication and wireless data transmission technologies.
    Type: Grant
    Filed: November 19, 2019
    Date of Patent: September 22, 2020
    Assignees: Northwestern University, Regent of the University of Minnesota
    Inventors: Deep M. Jariwala, Vinod K. Sangwan, Weichao Xu, Hyungil Kim, Tobin J. Marks, Mark C. Hersam
  • Publication number: 20200091904
    Abstract: Van der Waals heterojunctions are extended to semiconducting p-type single-walled carbon nanotube (s-SWCNT) and n-type film that can be solution-processed with high spatial uniformity at the wafer scale. The resulting large-area, low-voltage p-n heterojunctions can exhibit anti-ambipolar transfer characteristics with high on/off ratios. The charge transport can be efficiently utilized in analog circuits such as frequency doublers and keying circuits that are widely used, for example, in telecommunication and wireless data transmission technologies.
    Type: Application
    Filed: November 19, 2019
    Publication date: March 19, 2020
    Applicant: Northwestern University
    Inventors: Deep M. Jariwala, Vinod K. Sangwan, Weichao Xu, Hyungil Kim, Tobin J. Marks, Mark C. Hersam
  • Publication number: 20200083440
    Abstract: Thermally activated memristors from solution-processed two-dimensional (2D) semiconductors, fabricating methods and applications of the same. The memristor includes a semiconductor film formed on a nanoporous membrane, and at least two electrodes spatial-apart formed on the semiconductor film and electrically coupled with the semiconductor film to define a channel in the semiconductor film between the at least two electrodes, where the channel has one or more filaments, one or more dendrite, or a combination of them formed in the semiconductor film. The underlying switching mechanism applies generally to a range of 2D semiconductors including, but not limited to, MoS2, MoSe2, WS2, ReS2, InSe, or related 2D semiconductor materials.
    Type: Application
    Filed: July 11, 2019
    Publication date: March 12, 2020
    Inventors: Mark C. Hersam, Vinod K. Sangwan
  • Patent number: 10491206
    Abstract: Van der Waals heterojunctions are extended to semiconducting p-type single-walled carbon nanotube (s-SWCNT) and n-type film that can be solution-processed with high spatial uniformity at the wafer scale. The resulting large-area, low-voltage p-n heterojunctions can exhibit anti-ambipolar transfer characteristics with high on/off ratios. The charge transport can be efficiently utilized in analog circuits such as frequency doublers and keying circuits that are widely used, for example, in telecommunication and wireless data transmission technologies.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: November 26, 2019
    Assignee: Northwestern University
    Inventors: Deep M. Jariwala, Vinod K. Sangwan, Weichao Xu, Hyungil Kim, Tobin J. Marks, Mark C. Hersam
  • Publication number: 20180183423
    Abstract: Van der Waals heterojunctions are extended to semiconducting p-type single-walled carbon nanotube (s-SWCNT) and n-type film that can be solution-processed with high spatial uniformity at the wafer scale. The resulting large-area, low-voltage p-n heterojunctions can exhibit anti-ambipolar transfer characteristics with high on/off ratios. The charge transport can be efficiently utilized in analog circuits such as frequency doublers and keying circuits that are widely used, for example, in telecommunication and wireless data transmission technologies.
    Type: Application
    Filed: February 15, 2018
    Publication date: June 28, 2018
    Applicants: Northwestern University, Regents of the University of Minnesota
    Inventors: Deep M. Jariwala, Vinod K. Sangwan, Weichao Xu, Hyungil Kim, Tobin J. Marks, Mark C. Hersam
  • Patent number: 9972799
    Abstract: A method of fabricating a diode includes forming a first semiconductor layer having a first portion and a second portion extending from the first portion on a substrate; forming first and second electrodes on the substrate, the first electrode extending over and being in contact with the first portion of the first semiconductor layer; forming an insulting film to cover the first electrode and the first portion of the first semiconductor layer; and forming a second semiconductor layer having a first portion and a second portion extending from the first portion on the substrate. The second portion of the second semiconductor layer overlapping with the second portion of the first semiconductor layer to define a vertically stacked heterojunction therewith. The first portion of the second semiconductor layer extending over and being in contact with the second electrode. Each of the first and second semiconductor layers includes an atomically thin semiconductor.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: May 15, 2018
    Assignee: NORTHWESTERN UNIVERSITY
    Inventors: Mark C. Hersam, Deep M. Jariwala, Vinod K. Sangwan
  • Patent number: 9929725
    Abstract: Van der Waals heterojunctions are extended to semiconducting p-type single-walled carbon nanotube (s-SWCNT) and n-type film that can be solution-processed with high spatial uniformity at the wafer scale. The resulting large-area, low-voltage p-n heterojunctions can exhibit anti-ambipolar transfer characteristics with high on/off ratios. The charge transport can be efficiently utilized in analog circuits such as frequency doublers and keying circuits that are widely used, for example, in telecommunication and wireless data transmission technologies.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: March 27, 2018
    Assignees: Northwestern University, Regents of the University of Minnesota
    Inventors: Deep M. Jariwala, Vinod K. Sangwan, Weichao Xu, Hyungil Kim, Tobin J. Marks, Mark C. Hersam
  • Publication number: 20170141333
    Abstract: A method of fabricating a diode includes forming a first semiconductor layer having a first portion and a second portion extending from the first portion on a substrate; forming first and second electrodes on the substrate, the first electrode extending over and being in contact with the first portion of the first semiconductor layer; forming an insulting film to cover the first electrode and the first portion of the first semiconductor layer; and forming a second semiconductor layer having a first portion and a second portion extending from the first portion on the substrate. The second portion of the second semiconductor layer overlapping with the second portion of the first semiconductor layer to define a vertically stacked heterojunction therewith. The first portion of the second semiconductor layer extending over and being in contact with the second electrode. Each of the first and second semiconductor layers includes an atomically thin semiconductor.
    Type: Application
    Filed: September 14, 2016
    Publication date: May 18, 2017
    Inventors: Mark C. Hersam, Deep M. Jariwala, Vinod K. Sangwan
  • Patent number: 9515257
    Abstract: In one aspect of the invention, the memristor includes a monolayer film formed of an atomically thin material, where the monolayer film has at least one grain boundary (GB), a first electrode and a second electrode electrically coupled with the monolayer film to define a memristor channel therebetween, such that the at least one GB is located in the memristor channel, and a gate electrode capacitively coupled with the memristor channel.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: December 6, 2016
    Assignee: NORTHWESTERN UNIVERSITY
    Inventors: Mark C. Hersam, Vinod K. Sangwan, Deep M. Jariwala, In Soo Kim, Tobin J. Marks, Lincoln J. Lauhon
  • Patent number: 9472686
    Abstract: One aspect of the invention relates to a gate-tunable p-n heterojunction diode including a vertical stacked heterojunction of two ultrathin semiconductors. In one embodiment, single-layer molybdenum disulphide of an n-type semiconductor are stacked below semiconducting single-walled carbon nanotubes of a p-type semiconductor with each of them connected to a gold electrodes to form a p-n heterojunction. The electrical properties of the p-n heterojunction can be modulated by a gate voltage applied to a gate electrode and range from an insulator to a linear-response resistor to a highly rectifying diode. The gate tunability of the p-n heterojunction also allows spectral control over the photoresponse.
    Type: Grant
    Filed: August 1, 2014
    Date of Patent: October 18, 2016
    Assignee: NORTHWESTERN UNIVERSITY
    Inventors: Mark C. Hersam, Deep M. Jariwala, Vinod K. Sangwan
  • Publication number: 20160248007
    Abstract: In one aspect of the invention, the memristor includes a monolayer film formed of an atomically thin material, where the monolayer film has at least one grain boundary (GB), a first electrode and a second electrode electrically coupled with the monolayer film to define a memristor channel therebetween, such that the at least one GB is located in the memristor channel, and a gate electrode capacitively coupled with the memristor channel.
    Type: Application
    Filed: February 17, 2016
    Publication date: August 25, 2016
    Inventors: Mark C. Hersam, Vinod K. Sangwan, Deep M. Jariwala, In Soo Kim, Tobin J. Marks, Lincoln J. Lauhon
  • Publication number: 20160204773
    Abstract: Van der Waals heterojunctions are extended to semiconducting p-type single-walled carbon nanotube (s-SWCNT) and n-type film that can be solution-processed with high spatial uniformity at the wafer scale. The resulting large-area, low-voltage p-n heterojunctions can exhibit anti-ambipolar transfer characteristics with high on/off ratios. The charge transport can be efficiently utilized in analog circuits such as frequency doublers and keying circuits that are widely used, for example, in telecommunication and wireless data transmission technologies.
    Type: Application
    Filed: December 28, 2015
    Publication date: July 14, 2016
    Inventors: Deep M. Jariwala, Vinod K. Sangwan, Weichao Xu, Hyungil Kim, Tobin J. Marks, Mark C. Hersam
  • Publication number: 20150034907
    Abstract: One aspect of the invention relates to a gate-tunable p-n heterojunction diode including a vertical stacked heterojunction of two ultrathin semiconductors. In one embodiment, single-layer molybdenum disulphide of an n-type semiconductor are stacked below semiconducting single-walled carbon nanotubes of a p-type semiconductor with each of them connected to a gold electrodes to form a p-n heterojunction. The electrical properties of the p-n heterojunction can be modulated by a gate voltage applied to a gate electrode and range from an insulator to a linear-response resistor to a highly rectifying diode. The gate tunability of the p-n heterojunction also allows spectral control over the photoresponse.
    Type: Application
    Filed: August 1, 2014
    Publication date: February 5, 2015
    Inventors: Mark C. Hersam, Deep M. Jariwala, Vinod K. Sangwan