Patents by Inventor Virginie Drugeon

Virginie Drugeon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11936886
    Abstract: An encoder includes memory and circuitry coupled to the memory. The circuitry, for each of temporal sub-layers for temporal scalability different from spatial scalability, stores first parameters into buffering period supplemental enhancement information (SEI) and encodes the first parameters. The first parameters present initial delays in timing to extract data from a coded picture buffer (CPB). The circuitry stores a second parameter into the buffering period SEI and encodes the second parameter. The second parameter indicates a total number of the temporal sub-layers. A value of the second parameter is equal to a value of a third parameter that is encoded into a sequence parameter set and indicates a total number of the temporal sub-layers.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: March 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Patent number: 11936887
    Abstract: An encoder includes circuitry, and memory coupled to the circuitry. The circuitry, in operation, for each of a plurality of sub-bitstreams having mutually different frame rates, encodes identification information into a header of a bitstream including the plurality of sub-bitstreams, the identification information indicating a temporal ID that is an identifier of a temporal layer related to a temporal scalability and corresponds to the sub-bitstream, and encodes level information indicating a conformance level of the sub-bitstream.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: March 19, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Publication number: 20240064330
    Abstract: An encoder includes: circuitry; and memory coupled to the circuitry. In operation, the circuitry: controls whether to change a resolution of a picture from a resolution of a previous picture preceding the picture in one of display order and encoding order, according to a constraint that allows the changing only when the picture is a random access picture among one or more random access pictures; and when a resolution of a reference picture to be used in encoding of an inter-predicted picture is different from a resolution of the inter-predicted picture, resamples a reference image in the reference picture according to a difference between the resolution of the reference picture and the resolution of the inter-predicted picture, and encodes an image in the inter-predicted picture using the reference image resampled.
    Type: Application
    Filed: October 31, 2023
    Publication date: February 22, 2024
    Applicant: Panasonic Intellectual Property Corporation of America
    Inventors: Virginie DRUGEON, Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20240031586
    Abstract: A decoding method includes: decoding, from a bitstream, cropping information indicating an amount of cropping corresponding to an amount of padding of a first subpicture that is a subpicture (i) which is among a plurality of subpictures constituting a picture, (ii) in which at least one end of the subpicture is included in at least one end of the picture, (iii) to which at least one subpicture is adjacent on a side opposite to the at least one end of the subpicture, and (iv) which is padded so that a size of the subpicture reaches an integer multiple of a preconfigured coding unit size in at least one direction; decoding the first subpicture from the bitstream; and cropping the first subpicture according to the amount of cropping.
    Type: Application
    Filed: September 27, 2023
    Publication date: January 25, 2024
    Inventors: Virginie DRUGEON, Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Publication number: 20230403402
    Abstract: An encoder includes circuitry and memory. The circuitry, using the memory: derives a one-dimensional array of a plurality of reference samples for intra prediction; performs smoothing on the one-dimensional array of the plurality of reference samples which has been derived; and generates a prediction image using the plurality of reference samples. In deriving the one-dimensional array, the circuitry projects a value of at least one decoded pixel located on a first line onto a second line perpendicular to the first line, to derive at least one of the plurality of reference samples, and the smoothing is performed on the at least one decoded pixel projected onto the second line.
    Type: Application
    Filed: August 21, 2023
    Publication date: December 14, 2023
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Patent number: 11778207
    Abstract: An encoder includes circuitry and memory. The circuitry, using the memory: derives a one-dimensional array of a plurality of reference samples for intra prediction; performs smoothing on the one-dimensional array of the plurality of reference samples which has been derived; and generates a prediction image using the plurality of reference samples. In deriving the one-dimensional array, the circuitry projects a value of at least one decoded pixel located on a first line onto a second line perpendicular to the first line, to derive at least one of the plurality of reference samples, and the smoothing is performed on the at least one decoded pixel projected onto the second line.
    Type: Grant
    Filed: May 26, 2022
    Date of Patent: October 3, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
  • Publication number: 20230308690
    Abstract: A data generation method is for generating video data that covers a second luminance dynamic range wider than a first luminance dynamic range and has reproduction compatibility with a first device that does not support reproduction of video having the second luminance dynamic range and supports reproduction of video having the first luminance dynamic range, and includes: generating a video signal to be included in the video data using a second OETF; storing, into VUI in the video data, first transfer function information for identifying a first OETF to be referred to by the first device when the first device decodes the video data; and storing, into SEI in the video data, second transfer function information for identifying a second OETF to be referred to by a second device supporting reproduction of video having the second luminance dynamic range when the second device decodes the video data.
    Type: Application
    Filed: May 31, 2023
    Publication date: September 28, 2023
    Inventors: Virginie DRUGEON, Takahiro NISHI, Tadamasa TOMA
  • Patent number: 11765392
    Abstract: A data generation method is for generating video data that covers a second luminance dynamic range wider than a first luminance dynamic range and has reproduction compatibility with a first device that does not support reproduction of video having the second luminance dynamic range and supports reproduction of video having the first luminance dynamic range, and includes: generating a video signal to be included in the video data using a second OETF; storing, into VUI in the video data, first transfer function information for identifying a first OETF to be referred to by the first device when the first device decodes the video data; and storing, into SEI in the video data, second transfer function information for identifying a second OETF to be referred to by a second device supporting reproduction of video having the second luminance dynamic range when the second device decodes the video data.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: September 19, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Virginie Drugeon, Takahiro Nishi, Tadamasa Toma
  • Publication number: 20230283806
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: writes, into a sequence parameter set which is header information of a sequence, video usability information syntax which is information for realizing an additional function in display of an image, and syntax different from the video usability information syntax. The syntax includes at least one parameter related to display timing of the image.
    Type: Application
    Filed: April 11, 2023
    Publication date: September 7, 2023
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Yusuke KATO
  • Publication number: 20230269390
    Abstract: An encoder is an encoder that encodes a block in a picture using a prediction image of the block, and includes circuitry and memory. Using the memory, the circuitry: calculates a first average pixel value which is an average pixel value of first reference samples out of the first reference samples and second reference samples, The first reference samples are referable and located outside the block and adjacent to a first side of the block. The second reference samples are referable and located outside the block and adjacent to a second side of the block. When generating the prediction image, the circuitry applies the same prediction pixel value to inner samples among current samples to be processed that are included in the block. The inner samples constitute a quadrilateral region including at least two current samples in each of a horizontal direction and a vertical direction.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 24, 2023
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Publication number: 20230262254
    Abstract: An encoder is an encoder that encodes a block in a picture using a prediction image of the block, and includes circuitry and memory. Using the memory, the circuitry: calculates a first average pixel value which is an average pixel value of first reference samples out of the first reference samples and second reference samples, The first reference samples are referable and located outside the block and adjacent to a first side of the block. The second reference samples are referable and located outside the block and adjacent to a second side of the block. When generating the prediction image, the circuitry applies the same prediction pixel value to inner samples among current samples to be processed that are included in the block. The inner samples constitute a quadrilateral region including at least two current samples in each of a horizontal direction and a vertical direction.
    Type: Application
    Filed: April 20, 2023
    Publication date: August 17, 2023
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH
  • Publication number: 20230217065
    Abstract: A reproduction apparatus includes circuitry and memory coupled to the circuitry. In operation, the circuitry: obtains a first segment including first subpictures corresponding to points of time and a second segment including second subpictures corresponding to the points of time; combines the first subpictures and the second subpictures to generate access units corresponding to the points of time; and reproduces the access units generated.
    Type: Application
    Filed: February 27, 2023
    Publication date: July 6, 2023
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Risa ISHIHARA, Nobuhiko HASHIDA
  • Patent number: 11671617
    Abstract: An encoder is an encoder that encodes a block in a picture using a prediction image of the block, and includes circuitry and memory. Using the memory, the circuitry: calculates a first average pixel value which is an average pixel value of first reference samples out of the first reference samples and second reference samples, The first reference samples are referable and located outside the block and adjacent to a first side of the block. The second reference samples are referable and located outside the block and adjacent to a second side of the block. When generating the prediction image, the circuitry applies the same prediction pixel value to inner samples among current samples to be processed that are included in the block. The inner samples constitute a quadrilateral region including at least two current samples in each of a horizontal direction and a vertical direction.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: June 6, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
  • Patent number: 11665370
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, the circuitry: writes, into a sequence parameter set which is header information of a sequence, video usability information syntax which is information for realizing an additional function in display of an image, and syntax different from the video usability information syntax. The syntax includes at least one parameter related to display timing of the image.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: May 30, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Publication number: 20230080963
    Abstract: An encoder includes circuitry, and memory coupled to the circuitry. The circuitry, in operation, for each of a plurality of sub-bitstreams having mutually different frame rates, encodes identification information into a header of a bitstream including the plurality of sub-bitstreams, the identification information indicating a temporal ID that is an identifier of a temporal layer related to a temporal scalability and corresponds to the sub-bitstream, and encodes level information indicating a conformance level of the sub-bitstream.
    Type: Application
    Filed: November 16, 2022
    Publication date: March 16, 2023
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Yusuke KATO
  • Publication number: 20230059074
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. In operation, in the case where a video parameter set is used for encoding a video, the circuitry writes a first parameter into the video parameter set. The first parameter indicates the maximum number of one or more temporal sublayers in a layer set unit. The circuitry writes a second parameter into a sequence parameter set. The second parameter indicates the maximum number of one or more temporal sublayers in a sequence unit. In the case where the video parameter set is used for encoding the video, the second parameter is limited to less than or equal to the first parameter. In the case where the video parameter set is not used for encoding the video, the second parameter is limited to less than or equal to a fixed value.
    Type: Application
    Filed: October 31, 2022
    Publication date: February 23, 2023
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE
  • Publication number: 20230015486
    Abstract: An encoder includes circuitry and memory coupled to circuitry. In operation, circuitry: designs each of subpictures included in a picture in such a manner that at least one pixel included in the subpicture is included in a conformance cropping window; encodes arrangement information indicating an arrangement of each of the subpictures; and encodes each of the subpictures.
    Type: Application
    Filed: September 9, 2022
    Publication date: January 19, 2023
    Inventors: Virginie DRUGEON, Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA
  • Patent number: 11553195
    Abstract: An encoder includes circuitry, and memory coupled to the circuitry. The circuitry, in operation, for each of a plurality of sub-bitstreams having mutually different frame rates, encodes identification information into a header of a bitstream including the plurality of sub-bitstreams, the identification information indicating a temporal ID that is an identifier of a temporal layer related to a temporal scalability and corresponds to the sub-bitstream, and encodes level information indicating a conformance level of the sub-bitstream.
    Type: Grant
    Filed: July 29, 2021
    Date of Patent: January 10, 2023
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Yusuke Kato
  • Publication number: 20220408100
    Abstract: An image processing apparatus includes circuitry and memory coupled to the circuitry. In operation, the circuitry: derives a size of a subpicture included in a picture using a size of the picture, a position of the subpicture, and a size of a coding tree block (CTB) included in the picture, when the subpicture is located at a right border or a bottom border of the picture, the position of the subpicture being indicated using the size of the CTB; and extracts a sub-bitstream of the subpicture from a bitstream of the picture.
    Type: Application
    Filed: August 23, 2022
    Publication date: December 22, 2022
    Inventors: Virginie DRUGEON, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE
  • Patent number: 11509908
    Abstract: An encoder includes circuitry and a memory connected to the circuitry. In operation, the circuitry: generates a plurality of predicted values of a pixel in a current picture to be encoded, using a plurality of reference pixels in the current picture, and enables or disables a process of determining a predicted value of the pixel on a block-by-block basis based on availability of at least one reference pixel among the plurality of reference pixels by filtering the plurality of predicted values based on a position of the pixel.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: November 22, 2022
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Virginie Drugeon, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe