Patents by Inventor Walf Chikhaoui
Walf Chikhaoui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12224269Abstract: An optoelectronic device includes pixels that each have at least one primary sub-pixel having a primary light-emitting diode formed on a support face a substrate provided with a first primary semiconductive portion that has an overall elongated wire-like shape having a top end, a primary lattice parameter accommodation layer arranged on the top end of the first primary semiconductive portion, a second primary active semiconductive portion arranged at least on the primary lattice parameter accommodation layer, and a third primary semiconductive portion arranged on the second primary active semiconductive portion. The primary lattice parameter accommodation layer has, with the second primary active semiconductive portion, a first difference in primary lattice parameters between 2.12% and 0.93% relative to the second primary active semiconductive portion.Type: GrantFiled: June 26, 2020Date of Patent: February 11, 2025Assignee: ALEDIAInventors: Walf Chikhaoui, Vishnuvarthan Kumaresan, Philippe Gilet
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Patent number: 12206040Abstract: A method of manufacturing an optoelectronic device including-light-emitting diodes comprising the forming of three-dimensional semiconductor elements made of a III-V compound, each comprising a lower portion and an upper portion and, for each semiconductor element, the forming of an active area covering the top of the upper portion and the forming of at least one semiconductor area of the III-V compound covering the active area. The upper portions are formed by vapor deposition at a pressure lower than 1.33 mPa.Type: GrantFiled: June 25, 2020Date of Patent: January 21, 2025Assignees: Aledia, Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Universite Grenoble AlpesInventors: Bruno-Jules Daudin, Walf Chikhaoui, Marion Gruart, Philippe Gilet
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Patent number: 12199076Abstract: A light-emitting diode manufacturing method including the forming of three-dimensional semiconductor elements, extending along parallel axes, made of a III-V compound, each having a lower portion and a flared upper portion inscribed within a frustum of half apical angle ?. The method further comprises, for each semiconductor element, the forming of an active area covering the top of the upper portion and the forming of at least one semiconductor layer of the III-V compound covering the active area by vapor deposition at a pressure lower than 10 mPa, by using a flux of the group-III element along a direction inclined by an angle ?III and a flux of the group-V element along a direction inclined by an angle ?V with respect to the vertical axis, angles ?III and ?V being smaller than angle ?.Type: GrantFiled: June 25, 2020Date of Patent: January 14, 2025Assignees: Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Aledia, Universite Grenoble AlpesInventors: Bruno-Jules Daudin, Walf Chikhaoui, Marion Gruart
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Publication number: 20240274747Abstract: A method for manufacturing a 3D LED including the next formations of the axial portions, according to (z), a lower portion, an active region bearing on the lower portion, an upper portion bearing on the active region, the method further includes forming a radial portion, including a carrier blocking layer extending in contact with the base or with the top of the active region, and completely covering the walls of an axial portion, the radial formation being interposed between two consecutive axial formations.Type: ApplicationFiled: June 9, 2022Publication date: August 15, 2024Inventors: Vishnuvarthan KUMARESAN, Walf CHIKHAOUI, Marion GRUART, Philippe GILET, Benoît AMSTATT
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Patent number: 12051678Abstract: A light-emitting diode manufacturing method including the forming of three-dimensional semiconductor elements, extending along parallel axes, made of a III-V compound, each having a lower portion and a flared upper portion inscribed within a frustum of half apical angle ?. The method further comprises, for each semiconductor element, the forming of an active area covering the top of the upper portion and the forming of at least one semiconductor layer of the III-V compound covering the active area by vapor deposition at a pressure lower than 10 mPa, by using a flux of the group-III element along a direction inclined by an angle ?III and a flux of the group-V element along a direction inclined by an angle ?V with respect to the vertical axis, angles ?III and ?V being smaller than angle ?.Type: GrantFiled: June 25, 2020Date of Patent: July 30, 2024Assignees: Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Aledia, Universite Grenoble AlpesInventors: Bruno-Jules Daudin, Walf Chikhaoui, Marion Gruart
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Publication number: 20230361152Abstract: An optoelectronic device including first, second, and third three-dimensional light-emitting diodes having an axial configuration. Each light-emitting diode includes a semiconductor element and an active region resting on the semiconductor element. Each semiconductor element corresponds to a microwire, a nanowire, a nanometer- or micrometer-range conical or frustoconical element. The first, second, and third light-emitting diodes are configured to respectively emit first, second, and third radiations at first, second, and third wavelengths. The semiconductor elements of the first, second, and third light-emitting diodes respectively have first, second, and third diameters. The first diameter is smaller than the second diameter and the second diameter is smaller than the third diameter, the first wavelength being greater than the third wavelength and the second wavelength being greater than the first wavelength.Type: ApplicationFiled: September 28, 2021Publication date: November 9, 2023Applicant: AlediaInventors: Mehdi Daanoune, Walf Chikhaoui
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Publication number: 20220376131Abstract: A light-emitting diode manufacturing method including the forming of three-dimensional semiconductor elements, extending along parallel axes, made of a III-V compound, each having a lower portion and a flared upper portion inscribed within a frustum of half apical angle ?. The method further comprises, for each semiconductor element, the forming of an active area covering the top of the upper portion and the forming of at least one semiconductor layer of the III-V compound covering the active area by vapor deposition at a pressure lower than 10 mPa, by using a flux of the group-III element along a direction inclined by an angle ?III and a flux of the group-V element along a direction inclined by an angle ?V with respect to the vertical axis, angles ?III and ?V being smaller than angle ?.Type: ApplicationFiled: June 25, 2020Publication date: November 24, 2022Applicants: Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Aledia, Universite Grenoble AlpesInventors: Bruno-Jules Daudin, Walf Chikhaoui, Marion Gruart
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Publication number: 20220359782Abstract: A method of manufacturing an optoelectronic device including-light-emitting diodes comprising the forming of three-dimensional semiconductor elements made of a III-V compound, each comprising a lower portion and an upper portion and, for each semiconductor element, the forming of an active area covering the top of the upper portion and the forming of at least one semiconductor area of the III-V compound covering the active area. The upper portions are formed by vapor deposition at a pressure lower than 1.33 mPa.Type: ApplicationFiled: June 25, 2020Publication date: November 10, 2022Applicants: Aledia, Commissariat à I'Énergie Atomique et aux Énergies Alternatives, Universite Grenoble AlpesInventors: Bruno-Jules Daudin, Walf Chikhaoui, Marion Gruart, Philippe Gilet
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Publication number: 20220278081Abstract: An optoelectronic device includes pixels that each have at least one primary sub-pixel having a primary light-emitting diode formed on a support face a substrate provided with a first primary semiconductive portion that has an overall elongated wire-like shape having a top end, a primary lattice parameter accommodation layer arranged on the top end of the first primary semiconductive portion, a second primary active semiconductive portion arranged at least on the primary lattice parameter accommodation layer, and a third primary semiconductive portion arranged on the second primary active semiconductive portion. The primary lattice parameter accommodation layer has, with the second primary active semiconductive portion, a first difference in primary lattice parameters between 2.12% and 0.93% relative to the second primary active semiconductive portion.Type: ApplicationFiled: June 26, 2020Publication date: September 1, 2022Inventors: Walf CHIKHAOUI, Vishnuvarthan KUMARESAN, Philippe GILET
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Publication number: 20220238753Abstract: A method of manufacturing an optoelectronic device including light-emitting diodes comprising forming three-dimensional semiconductor elements, extending along parallel axes, made of a III-V compound, with a polarity of the group-III element, the method further including, for each semiconductor element, forming an active area covering the semiconductor element and a stack of semiconductor layers covering the active area, the active area being formed by vapor deposition at low pressure and comprising quantum wells separated by barrier layers, each quantum well including a ternary alloy having at least one first group-III element, the group-V element, and a second group-III element, the ratio of the atomic flux of the group-III elements to the atomic flux of the group-V element is in the range from 1 to 1.8.Type: ApplicationFiled: June 25, 2020Publication date: July 28, 2022Applicants: Aledia, Commissariat à I'Énergie Atomique et aux Énergies Alternatives, Universite Grenoble AlpesInventors: Marion Gruart, Bruno-Jules Daudin, Walf Chikhaoui
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Publication number: 20220238495Abstract: An optoelectronic device including one or a plurality of light-emitting diodes, each light-emitting diode including a three-dimensional semiconductor element, an active area resting on the three-dimensional semiconductor element and a stack of semiconductor layers covering the active area, the active area including a plurality of quantum wells, said stack being in mechanical contact with a plurality of quantum wells.Type: ApplicationFiled: June 25, 2020Publication date: July 28, 2022Applicants: Aledia, Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Universite Grenoble AlpesInventors: Marion Gruart, Bruno-Jules Daudin, Walf Chikhaoui
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Publication number: 20220205133Abstract: Deposition methods using a Ga-based alloy to incorporate dopants into GaN-based materials are generally described.Type: ApplicationFiled: April 23, 2020Publication date: June 30, 2022Applicant: AlediaInventors: Olga Kryliouk, Walf Chikhaoui, Jerome Napierala, Vishnuvarthan Kumaresan