Patents by Inventor Walter Steinmaier

Walter Steinmaier has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240313495
    Abstract: A crimping unit for radially crimping a crimp barrel along a circumference of the crimp barrel onto a cable includes a plurality of radially displaceable crimping jaws arranged in a circumferential direction, which press the crimp barrel onto the cable in a crimping position. The crimping unit further includes a retaining ring, in which the crimping jaws are accommodated in a radially displaceable manner, and an actuating ring axially displaceable relative to the retaining ring. An axial displacement of the actuating ring in a first direction enables radial displacement of the crimping jaws in the retaining ring into the crimping position. An axial displacement of the actuating ring in a second direction enables an active section of the actuating ring to interact with an active surface of a crimping jaw such that it is movable from the crimping position into a radially spaced position.
    Type: Application
    Filed: March 8, 2024
    Publication date: September 19, 2024
    Inventors: Lukas STEINMAIER, Walter LANG, Jens HERMES
  • Patent number: 4139402
    Abstract: A method of manufacturing a semiconductor device, in particular a device having two complementary insulated gate field effect transistors, in which an aperture is provided in a masking layer and in said aperture a zone is diffused in the body from a highly doped layer, in particular a phosphorus glass layer. According to the invention, a thermal oxide layer is formed in the aperture in a first heating step during the diffusion, after which the doping layer is removed without using a mask and while maintaining the thermal oxide layer, and the dopant is then further diffused in a second heating step. The thermal oxide layer serves as a partial masking against the diffusion, as an etchant stopper and in many cases also as a mask against ion implantation.
    Type: Grant
    Filed: April 13, 1977
    Date of Patent: February 13, 1979
    Assignee: U.S. Philips Corporation
    Inventors: Walter Steinmaier, Jose Solo de Zaldivar
  • Patent number: 4005453
    Abstract: A semiconductor device having a region of a first conductivity type, a semiconductor layer present thereon, a buried layer of the second conductivity type provided locally between the said layer and the region, a buried layer of the first conductivity type provided on said buried layer and an inset pattern of an insulating material which adjoins the buried layer of the second conductivity type and surrounds two islands of the semiconductor layer connected by the buried layer of the first conductivity type in one of which a semiconductor circuit element is provided which is contacted via the other island. Suited in particular for integration of insulated complementary transistor pairs.
    Type: Grant
    Filed: January 9, 1975
    Date of Patent: January 25, 1977
    Assignee: U.S. Philips Corporation
    Inventors: Claude Jan Principe Frederic Le Can, Else Kooi, Walter Steinmaier
  • Patent number: 3974516
    Abstract: A method of manufacturing a semiconductor device having an insulated gate field effect transistor in which a second region of the second conductivity type is indiffused in a first region of the first conductivity type and source and drain zones of the first conductivity type are provided in said second region. According to the invention, after the indiffusion, the doping material of the second region is outdiffused in an atmosphere of reduced pressure, preferably in a vacuum, in which a zone of maximum doping concentration is formed which may advantageously be used as a channel stopper and the source and drain zones are provided in the part of the second region having a doping concentration which increases from the surface. The method is preferably used for the manufacture of structures having complementary field effect transistors.
    Type: Grant
    Filed: December 19, 1974
    Date of Patent: August 10, 1976
    Assignee: U.S. Philips Corporation
    Inventor: Walter Steinmaier