Patents by Inventor Wanxun He

Wanxun He has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10978556
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate, forming a gate structure on the substrate, forming a hard mask on the substrate and the gate structure, patterning the hard mask to form trenches exposing part of the substrate, and forming raised epitaxial layers in the trenches. Preferably, the gate structure is extended along a first direction on the substrate and the raised epitaxial layers are elongated along a second direction adjacent to two sides of the gate structure.
    Type: Grant
    Filed: February 20, 2019
    Date of Patent: April 13, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing
  • Patent number: 10347645
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region and the substrate comprises a semiconductor layer on top of an insulating layer; forming a first front gate on the first region of the substrate and a second front gate on the second region of the substrate; removing part of the insulating layer under the first front gate; forming a first back gate on the insulating layer under the first front gate; and forming a second back gate under the second front gate.
    Type: Grant
    Filed: December 2, 2018
    Date of Patent: July 9, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing
  • Patent number: 10347733
    Abstract: A radiofrequency switch device includes an insulation layer, a semiconductor layer, a gate structure, a first doped region, a second doped region, an epitaxial layer, a first silicide layer, and a second silicide layer. The semiconductor layer is disposed on the insulation layer. The gate structure is disposed on the semiconductor layer. The first doped region and the second doped region are disposed in the semiconductor layer at two opposite sides of the gate structure respectively. The epitaxial layer is disposed on the first doped region. The first silicide layer is disposed on the epitaxial layer. The second silicide layer is disposed in the second doped region.
    Type: Grant
    Filed: November 2, 2017
    Date of Patent: July 9, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing
  • Publication number: 20190189738
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate, forming a gate structure on the substrate, forming a hard mask on the substrate and the gate structure, patterning the hard mask to form trenches exposing part of the substrate, and forming raised epitaxial layers in the trenches. Preferably, the gate structure is extended along a first direction on the substrate and the raised epitaxial layers are elongated along a second direction adjacent to two sides of the gate structure.
    Type: Application
    Filed: February 20, 2019
    Publication date: June 20, 2019
    Inventors: Wanxun HE, Su Xing
  • Publication number: 20190109200
    Abstract: A radiofrequency switch device includes an insulation layer, a semiconductor layer, a gate structure, a first doped region, a second doped region, an epitaxial layer, a first silicide layer, and a second silicide layer. The semiconductor layer is disposed on the insulation layer. The gate structure is disposed on the semiconductor layer. The first doped region and the second doped region are disposed in the semiconductor layer at two opposite sides of the gate structure respectively. The epitaxial layer is disposed on the first doped region. The first silicide layer is disposed on the epitaxial layer. The second silicide layer is disposed in the second doped region.
    Type: Application
    Filed: November 2, 2017
    Publication date: April 11, 2019
    Inventors: WANXUN HE, Su Xing
  • Patent number: 10256297
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate, forming a gate structure on the substrate, forming a hard mask on the substrate and the gate structure, patterning the hard mask to form trenches exposing part of the substrate, and forming raised epitaxial layers in the trenches. Preferably, the gate structure is extended along a first direction on the substrate and the raised epitaxial layers are elongated along a second direction adjacent to two sides of the gate structure.
    Type: Grant
    Filed: December 1, 2016
    Date of Patent: April 9, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing
  • Publication number: 20190103408
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region and the substrate comprises a semiconductor layer on top of an insulating layer; forming a first front gate on the first region of the substrate and a second front gate on the second region of the substrate; removing part of the insulating layer under the first front gate; forming a first back gate on the insulating layer under the first front gate; and forming a second back gate under the second front gate.
    Type: Application
    Filed: December 2, 2018
    Publication date: April 4, 2019
    Inventors: WANXUN HE, Su Xing
  • Patent number: 10177156
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region and the substrate includes a semiconductor layer on top of an insulating layer; forming a first front gate on the first region of the substrate and a second front gate on the second region of the substrate; removing part of the insulating layer under the first front gate; forming a first back gate on the insulating layer under the first front gate; and forming a second back gate under the second front gate.
    Type: Grant
    Filed: April 19, 2017
    Date of Patent: January 8, 2019
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing
  • Publication number: 20180269212
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a first region and a second region and the substrate includes a semiconductor layer on top of an insulating layer; forming a first front gate on the first region of the substrate and a second front gate on the second region of the substrate; removing part of the insulating layer under the first front gate; forming a first back gate on the insulating layer under the first front gate; and forming a second back gate under the second front gate.
    Type: Application
    Filed: April 19, 2017
    Publication date: September 20, 2018
    Inventors: WANXUN HE, Su Xing
  • Patent number: 10062701
    Abstract: The present invention provides a SRAM unit cell which includes a semiconductor substrate, six transistors, a first well, two first doped regions and two second doped regions. The transistors are disposed on the semiconductor substrate, and include a first gate line and a second gate line. The first well is disposed in the semiconductor substrate, and the first well has a first conductive type, wherein the first gate line and the second gate line extend onto the first well. The first doped regions are disposed in the first well at two sides of the first gate line, and the second doped regions are disposed in the first well at two sides of the second gate line.
    Type: Grant
    Filed: November 24, 2016
    Date of Patent: August 28, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing
  • Patent number: 10062734
    Abstract: A method for fabricating a semiconductor device includes the steps of: forming a channel layer on a substrate; forming a gate dielectric layer on the channel layer; forming a source layer near one side of the gate dielectric layer and a drain layer near another side of the gate dielectric layer; forming a bottom gate on the gate dielectric layer; forming a phase change layer on the bottom gate; and forming a top gate on the phase change layer.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: August 28, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing
  • Publication number: 20180190714
    Abstract: A method for fabricating a semiconductor device includes the steps of: forming a channel layer on a substrate; forming a gate dielectric layer on the channel layer; forming a source layer and a drain layer adjacent two sides of the gate dielectric layer; forming a bottom gate on the gate dielectric layer; forming a phase change layer on the bottom gate; and forming a top gate on the phase change layer.
    Type: Application
    Filed: December 20, 2017
    Publication date: July 5, 2018
    Inventors: WANXUN HE, Su Xing
  • Patent number: 10008614
    Abstract: A dual channel transistor includes a first gate electrode, a second gate electrode, a first gate insulation layer, a second gate insulation layer, a silicon semiconductor channel layer, and an oxide semiconductor channel layer. The first gate insulation layer is disposed on the first gate electrode. The silicon semiconductor channel layer is disposed on the first gate insulation layer. The oxide semiconductor channel layer is disposed on the silicon semiconductor channel layer. The second gate insulation layer is disposed on the oxide semiconductor channel layer. The second gate electrode is disposed on the second gate insulation layer.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: June 26, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing
  • Patent number: 9997627
    Abstract: A semiconductor device includes: a channel layer surrounded by a source layer; a first dielectric layer around the source layer; a gate layer around the channel layer and on the source layer; a first oxide semiconductor layer between the gate layer and the channel layer; a second oxide semiconductor layer between the gate layer and the drain layer; a second gate dielectric layer between the second oxide semiconductor layer and the drain layer; a drain layer on the gate layer and around the channel layer; and a second dielectric layer around the drain layer.
    Type: Grant
    Filed: September 19, 2017
    Date of Patent: June 12, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing
  • Publication number: 20180145081
    Abstract: The present invention provides a SRAM unit cell which includes a semiconductor substrate, six transistors, a first well, two first doped regions and two second doped regions. The transistors are disposed on the semiconductor substrate, and include a first gate line and a second gate line. The first well is disposed in the semiconductor substrate, and the first well has a first conductive type, wherein the first gate line and the second gate line extend onto the first well. The first doped regions are disposed in the first well at two sides of the first gate line, and the second doped regions are disposed in the first well at two sides of the second gate line.
    Type: Application
    Filed: November 24, 2016
    Publication date: May 24, 2018
    Inventors: WANXUN HE, Su Xing
  • Publication number: 20180122897
    Abstract: A method for fabricating semiconductor device includes the steps of first providing a substrate, forming a gate structure on the substrate, forming a hard mask on the substrate and the gate structure, patterning the hard mask to form trenches exposing part of the substrate, and forming raised epitaxial layers in the trenches. Preferably, the gate structure is extended along a first direction on the substrate and the raised epitaxial layers are elongated along a second direction adjacent to two sides of the gate structure.
    Type: Application
    Filed: December 1, 2016
    Publication date: May 3, 2018
    Inventors: WANXUN HE, Su Xing
  • Publication number: 20180102434
    Abstract: A semiconductor device includes: a channel layer surrounded by a source layer; a first dielectric layer around the source layer; a gate layer around the channel layer and on the source layer; a first oxide semiconductor layer between the gate layer and the channel layer; a second oxide semiconductor layer between the gate layer and the drain layer; a second gate dielectric layer between the second oxide semiconductor layer and the drain layer; a drain layer on the gate layer and around the channel layer; and a second dielectric layer around the drain layer.
    Type: Application
    Filed: September 19, 2017
    Publication date: April 12, 2018
    Inventors: WANXUN HE, Su Xing
  • Patent number: 9887238
    Abstract: A semiconductor device and a method for fabricating the semiconductor device have been provided. The method for fabricating a semiconductor device includes the steps of: forming a channel layer on a substrate; forming a gate dielectric layer on the channel layer; forming a source layer and a drain layer adjacent two sides of the gate dielectric layer; forming a bottom gate on the gate dielectric layer; forming a phase change layer on the bottom gate; and forming a top gate on the phase change layer.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: February 6, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing
  • Patent number: 9871049
    Abstract: A static random access memory device includes two body contacts and two resistive-switching devices. The body contacts are disposed in a wafer and are exposed from a back side of the wafer, wherein the body contacts electrically connect a static random access memory cell through a metal interconnect in the wafer. The resistive-switching devices connect the two body contacts respectively from the back side of the wafer. A method of forming a static random access memory device is also provided in the following. A wafer having two body contacts exposed from a back side of the wafer and a metal interconnect electrically connecting a static random access memory cell to the body contacts is provided. Two resistive-switching devices are formed to connect the two body contacts respectively from the back side of the wafer.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: January 16, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing
  • Patent number: 9865654
    Abstract: A semiconductor structure includes a front side and a back side opposite to the front side, at least a transistor device formed on the front side of the substrate, and an adjustable resistor formed on the back side of the substrate. The adjustable resistor includes at least a phase change material PCM layer.
    Type: Grant
    Filed: January 6, 2017
    Date of Patent: January 9, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wanxun He, Su Xing